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Lines 158-168
struct gcc_dcas_x86
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} |
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} |
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else |
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else |
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{ |
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{ |
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#if defined(__clang__) |
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// Note that despite const qualification cmpxchg8b below may issue a store to the storage. The storage value |
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// Clang cannot allocate eax:edx register pairs but it has sync intrinsics |
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// will not change, but this prevents the storage to reside in read-only memory. |
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value = __sync_val_compare_and_swap(&storage, (storage_type)0, (storage_type)0); |
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#elif defined(BOOST_ATOMIC_DETAIL_X86_NO_ASM_AX_DX_PAIRS) |
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#if defined(BOOST_ATOMIC_DETAIL_X86_NO_ASM_AX_DX_PAIRS) |
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uint32_t value_bits[2]; |
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uint32_t value_bits[2]; |
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// We don't care for comparison result here; the previous value will be stored into value anyway. |
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// We don't care for comparison result here; the previous value will be stored into value anyway. |
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// Also we don't care for ebx and ecx values, they just have to be equal to eax and edx before cmpxchg8b. |
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// Also we don't care for ebx and ecx values, they just have to be equal to eax and edx before cmpxchg8b. |
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__asm__ __volatile__ |
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__asm__ __volatile__ |
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Lines 175-181
struct gcc_dcas_x86
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: BOOST_ATOMIC_DETAIL_ASM_CLOBBER_CC_COMMA "memory" |
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: BOOST_ATOMIC_DETAIL_ASM_CLOBBER_CC_COMMA "memory" |
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); |
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); |
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BOOST_ATOMIC_DETAIL_MEMCPY(&value, value_bits, sizeof(value)); |
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BOOST_ATOMIC_DETAIL_MEMCPY(&value, value_bits, sizeof(value)); |
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#else // defined(BOOST_ATOMIC_DETAIL_X86_NO_ASM_AX_DX_PAIRS) |
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#else // defined(BOOST_ATOMIC_DETAIL_X86_NO_ASM_AX_DX_PAIRS) |
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// We don't care for comparison result here; the previous value will be stored into value anyway. |
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// We don't care for comparison result here; the previous value will be stored into value anyway. |
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// Also we don't care for ebx and ecx values, they just have to be equal to eax and edx before cmpxchg8b. |
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// Also we don't care for ebx and ecx values, they just have to be equal to eax and edx before cmpxchg8b. |
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__asm__ __volatile__ |
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__asm__ __volatile__ |
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Lines 187-192
struct gcc_dcas_x86
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: [storage] "m" (storage) |
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: [storage] "m" (storage) |
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: BOOST_ATOMIC_DETAIL_ASM_CLOBBER_CC_COMMA "memory" |
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: BOOST_ATOMIC_DETAIL_ASM_CLOBBER_CC_COMMA "memory" |
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); |
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); |
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#endif // defined(BOOST_ATOMIC_DETAIL_X86_NO_ASM_AX_DX_PAIRS) |
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#endif // defined(BOOST_ATOMIC_DETAIL_X86_NO_ASM_AX_DX_PAIRS) |
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} |
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} |
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Lines 401-415
struct gcc_dcas_x86_64
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static BOOST_FORCEINLINE storage_type load(storage_type const volatile& storage, memory_order) BOOST_NOEXCEPT |
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static BOOST_FORCEINLINE storage_type load(storage_type const volatile& storage, memory_order) BOOST_NOEXCEPT |
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{ |
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{ |
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#if defined(__clang__) |
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// Note that despite const qualification cmpxchg16b below may issue a store to the storage. The storage value |
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// will not change, but this prevents the storage to reside in read-only memory. |
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// Clang cannot allocate rax:rdx register pairs but it has sync intrinsics |
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#if defined(BOOST_ATOMIC_DETAIL_X86_NO_ASM_AX_DX_PAIRS) |
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storage_type value = storage_type(); |
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return __sync_val_compare_and_swap(&storage, value, value); |
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#elif defined(BOOST_ATOMIC_DETAIL_X86_NO_ASM_AX_DX_PAIRS) |
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// Some compilers can't allocate rax:rdx register pair either and also don't support 128-bit __sync_val_compare_and_swap |
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uint64_t value_bits[2]; |
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uint64_t value_bits[2]; |
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// We don't care for comparison result here; the previous value will be stored into value anyway. |
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// We don't care for comparison result here; the previous value will be stored into value anyway. |