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(-)b/share/man/man4/iwmfw.4 (-6 / +9 lines)
Lines 22-28 Link Here
22
.\"
22
.\"
23
.\" $FreeBSD$
23
.\" $FreeBSD$
24
.\"
24
.\"
25
.Dd October 29, 2017
25
.Dd November 1, 2019
26
.Dt IWMFW 4
26
.Dt IWMFW 4
27
.Os
27
.Os
28
.Sh NAME
28
.Sh NAME
Lines 48-57 of the following: Link Here
48
.Cd "device iwm7265fw"
48
.Cd "device iwm7265fw"
49
.Cd "device iwm8000Cfw"
49
.Cd "device iwm8000Cfw"
50
.Cd "device iwm8265fw"
50
.Cd "device iwm8265fw"
51
.Cd "device iwm9000fw"
52
.Cd "device iwm9260fw"
51
.Ed
53
.Ed
52
.Pp
54
.Pp
53
Alternatively, to load the driver as a
55
Alternatively, to load the driver as a
54
module at boot time, place the following line in
56
module at boot time, place one of the following lines in
55
.Xr loader.conf 5 :
57
.Xr loader.conf 5 :
56
.Bd -literal -offset indent
58
.Bd -literal -offset indent
57
iwm3160fw_load="YES"
59
iwm3160fw_load="YES"
Lines 61-73 iwm7265fw_load="YES" Link Here
61
iwm7265Dfw_load="YES"
63
iwm7265Dfw_load="YES"
62
iwm8000Cfw_load="YES"
64
iwm8000Cfw_load="YES"
63
iwm8265fw_load="YES"
65
iwm8265fw_load="YES"
66
iwm9000fw_load="YES"
67
iwm9260fw_load="YES"
64
.Ed
68
.Ed
65
.Sh DESCRIPTION
69
.Sh DESCRIPTION
66
This module provides access to firmware sets for the
70
This module provides access to firmware sets for the
67
Intel Dual Band Wireless WiFi 3160, 3165, 3168, 7260, 7265, 8000, and 8260 series of
71
Intel Dual Band Wireless WiFi 3160, 3165, 3168, 7260, 7265, 8000, 8260,
68
IEEE 802.11n/11ac adapters.
72
9000 and 9260 series of IEEE 802.11n/11ac adapters.
69
It may be
73
It may be statically linked into the kernel, or loaded as a module.
70
statically linked into the kernel, or loaded as a module.
71
.Sh SEE ALSO
74
.Sh SEE ALSO
72
.Xr iwm 4 ,
75
.Xr iwm 4 ,
73
.Xr firmware 9
76
.Xr firmware 9
(-)b/sys/dev/iwm/if_iwm.c (-184 / +435 lines)
Lines 322-337 static int iwm_mvm_load_ucode_wait_alive(struct iwm_softc *, Link Here
322
static int	iwm_run_init_mvm_ucode(struct iwm_softc *, int);
322
static int	iwm_run_init_mvm_ucode(struct iwm_softc *, int);
323
static int	iwm_mvm_config_ltr(struct iwm_softc *sc);
323
static int	iwm_mvm_config_ltr(struct iwm_softc *sc);
324
static int	iwm_rx_addbuf(struct iwm_softc *, int, int);
324
static int	iwm_rx_addbuf(struct iwm_softc *, int, int);
325
static int	iwm_mvm_get_signal_strength(struct iwm_softc *,
326
					    struct iwm_rx_phy_info *);
327
static void	iwm_mvm_rx_rx_phy_cmd(struct iwm_softc *,
325
static void	iwm_mvm_rx_rx_phy_cmd(struct iwm_softc *,
328
                                      struct iwm_rx_packet *);
326
                                      struct iwm_rx_packet *);
329
static int	iwm_get_noise(struct iwm_softc *,
327
static int	iwm_get_noise(struct iwm_softc *,
330
		    const struct iwm_mvm_statistics_rx_non_phy *);
328
		    const struct iwm_mvm_statistics_rx_non_phy *);
331
static void	iwm_mvm_handle_rx_statistics(struct iwm_softc *,
329
static void	iwm_mvm_handle_rx_statistics(struct iwm_softc *,
332
		    struct iwm_rx_packet *);
330
		    struct iwm_rx_packet *);
333
static boolean_t iwm_mvm_rx_rx_mpdu(struct iwm_softc *, struct mbuf *,
331
static bool	iwm_mvm_rx_mpdu(struct iwm_softc *, struct mbuf *,
334
				    uint32_t, boolean_t);
332
		    uint32_t, bool);
335
static int	iwm_mvm_rx_tx_cmd_single(struct iwm_softc *,
333
static int	iwm_mvm_rx_tx_cmd_single(struct iwm_softc *,
336
                                         struct iwm_rx_packet *,
334
                                         struct iwm_rx_packet *,
337
				         struct iwm_node *);
335
				         struct iwm_node *);
Lines 793-799 iwm_read_firmware(struct iwm_softc *sc) Link Here
793
			break;
791
			break;
794
		}
792
		}
795
793
796
		case 48: /* undocumented TLV */
794
		case IWM_UCODE_TLV_CMD_VERSIONS:
797
		case IWM_UCODE_TLV_SDIO_ADMA_ADDR:
795
		case IWM_UCODE_TLV_SDIO_ADMA_ADDR:
798
		case IWM_UCODE_TLV_FW_GSCAN_CAPA:
796
		case IWM_UCODE_TLV_FW_GSCAN_CAPA:
799
			/* ignore, not used by current driver */
797
			/* ignore, not used by current driver */
Lines 864-873 iwm_read_firmware(struct iwm_softc *sc) Link Here
864
862
865
		default:
863
		default:
866
			device_printf(sc->sc_dev,
864
			device_printf(sc->sc_dev,
867
			    "%s: unknown firmware section %d, abort\n",
865
			    "%s: unknown firmware section %d\n",
868
			    __func__, tlv_type);
866
			    __func__, tlv_type);
869
			error = EINVAL;
867
			break;
870
			goto parse_out;
871
		}
868
		}
872
	}
869
	}
873
870
Lines 929-947 static int Link Here
929
iwm_alloc_rx_ring(struct iwm_softc *sc, struct iwm_rx_ring *ring)
926
iwm_alloc_rx_ring(struct iwm_softc *sc, struct iwm_rx_ring *ring)
930
{
927
{
931
	bus_size_t size;
928
	bus_size_t size;
932
	int i, error;
929
	size_t descsz;
930
	int count, i, error;
933
931
934
	ring->cur = 0;
932
	ring->cur = 0;
933
	if (sc->cfg->mqrx_supported) {
934
		count = IWM_RX_MQ_RING_COUNT;
935
		descsz = sizeof(uint64_t);
936
	} else {
937
		count = IWM_RX_LEGACY_RING_COUNT;
938
		descsz = sizeof(uint32_t);
939
	}
935
940
936
	/* Allocate RX descriptors (256-byte aligned). */
941
	/* Allocate RX descriptors (256-byte aligned). */
937
	size = IWM_RX_RING_COUNT * sizeof(uint32_t);
942
	size = count * descsz;
938
	error = iwm_dma_contig_alloc(sc->sc_dmat, &ring->desc_dma, size, 256);
943
	error = iwm_dma_contig_alloc(sc->sc_dmat, &ring->free_desc_dma, size,
944
	    256);
939
	if (error != 0) {
945
	if (error != 0) {
940
		device_printf(sc->sc_dev,
946
		device_printf(sc->sc_dev,
941
		    "could not allocate RX ring DMA memory\n");
947
		    "could not allocate RX ring DMA memory\n");
942
		goto fail;
948
		goto fail;
943
	}
949
	}
944
	ring->desc = ring->desc_dma.vaddr;
950
	ring->desc = ring->free_desc_dma.vaddr;
945
951
946
	/* Allocate RX status area (16-byte aligned). */
952
	/* Allocate RX status area (16-byte aligned). */
947
	error = iwm_dma_contig_alloc(sc->sc_dmat, &ring->stat_dma,
953
	error = iwm_dma_contig_alloc(sc->sc_dmat, &ring->stat_dma,
Lines 953-958 iwm_alloc_rx_ring(struct iwm_softc *sc, struct iwm_rx_ring *ring) Link Here
953
	}
959
	}
954
	ring->stat = ring->stat_dma.vaddr;
960
	ring->stat = ring->stat_dma.vaddr;
955
961
962
	if (sc->cfg->mqrx_supported) {
963
		size = count * sizeof(uint32_t);
964
		error = iwm_dma_contig_alloc(sc->sc_dmat, &ring->used_desc_dma,
965
		    size, 256);
966
		if (error != 0) {
967
			device_printf(sc->sc_dev,
968
			    "could not allocate RX ring DMA memory\n");
969
			goto fail;
970
		}
971
	}
972
956
        /* Create RX buffer DMA tag. */
973
        /* Create RX buffer DMA tag. */
957
        error = bus_dma_tag_create(sc->sc_dmat, 1, 0,
974
        error = bus_dma_tag_create(sc->sc_dmat, 1, 0,
958
            BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL,
975
            BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL,
Lines 972-981 iwm_alloc_rx_ring(struct iwm_softc *sc, struct iwm_rx_ring *ring) Link Here
972
		    __func__, error);
989
		    __func__, error);
973
		goto fail;
990
		goto fail;
974
	}
991
	}
992
975
	/*
993
	/*
976
	 * Allocate and map RX buffers.
994
	 * Allocate and map RX buffers.
977
	 */
995
	 */
978
	for (i = 0; i < IWM_RX_RING_COUNT; i++) {
996
	for (i = 0; i < count; i++) {
979
		struct iwm_rx_data *data = &ring->data[i];
997
		struct iwm_rx_data *data = &ring->data[i];
980
		error = bus_dmamap_create(ring->data_dmat, 0, &data->map);
998
		error = bus_dmamap_create(ring->data_dmat, 0, &data->map);
981
		if (error != 0) {
999
		if (error != 0) {
Lines 1013-1024 iwm_reset_rx_ring(struct iwm_softc *sc, struct iwm_rx_ring *ring) Link Here
1013
static void
1031
static void
1014
iwm_free_rx_ring(struct iwm_softc *sc, struct iwm_rx_ring *ring)
1032
iwm_free_rx_ring(struct iwm_softc *sc, struct iwm_rx_ring *ring)
1015
{
1033
{
1016
	int i;
1034
	int count, i;
1017
1035
1018
	iwm_dma_contig_free(&ring->desc_dma);
1036
	iwm_dma_contig_free(&ring->free_desc_dma);
1019
	iwm_dma_contig_free(&ring->stat_dma);
1037
	iwm_dma_contig_free(&ring->stat_dma);
1038
	iwm_dma_contig_free(&ring->used_desc_dma);
1039
1040
	count = sc->cfg->mqrx_supported ? IWM_RX_MQ_RING_COUNT :
1041
	    IWM_RX_LEGACY_RING_COUNT;
1020
1042
1021
	for (i = 0; i < IWM_RX_RING_COUNT; i++) {
1043
	for (i = 0; i < count; i++) {
1022
		struct iwm_rx_data *data = &ring->data[i];
1044
		struct iwm_rx_data *data = &ring->data[i];
1023
1045
1024
		if (data->m != NULL) {
1046
		if (data->m != NULL) {
Lines 1315-1326 iwm_stop_device(struct iwm_softc *sc) Link Here
1315
	/* Stop the device, and put it in low power state */
1337
	/* Stop the device, and put it in low power state */
1316
	iwm_apm_stop(sc);
1338
	iwm_apm_stop(sc);
1317
1339
1318
	/* Upon stop, the APM issues an interrupt if HW RF kill is set.
1340
	/* stop and reset the on-board processor */
1319
	 * Clean again the interrupt here
1341
	IWM_SETBITS(sc, IWM_CSR_RESET, IWM_CSR_RESET_REG_FLAG_SW_RESET);
1342
	DELAY(5000);
1343
1344
	/*
1345
	 * Upon stop, the APM issues an interrupt if HW RF kill is set.
1320
	 */
1346
	 */
1321
	iwm_disable_interrupts(sc);
1347
	iwm_disable_interrupts(sc);
1322
	/* stop and reset the on-board processor */
1323
	IWM_WRITE(sc, IWM_CSR_RESET, IWM_CSR_RESET_REG_FLAG_SW_RESET);
1324
1348
1325
	/*
1349
	/*
1326
	 * Even if we stop the HW, we still want the RF kill
1350
	 * Even if we stop the HW, we still want the RF kill
Lines 1328-1333 iwm_stop_device(struct iwm_softc *sc) Link Here
1328
	 */
1352
	 */
1329
	iwm_enable_rfkill_int(sc);
1353
	iwm_enable_rfkill_int(sc);
1330
	iwm_check_rfkill(sc);
1354
	iwm_check_rfkill(sc);
1355
1356
	iwm_prepare_card_hw(sc);
1331
}
1357
}
1332
1358
1333
/* iwlwifi: mvm/ops.c */
1359
/* iwlwifi: mvm/ops.c */
Lines 1356-1362 iwm_mvm_nic_config(struct iwm_softc *sc) Link Here
1356
	reg_val |= radio_cfg_step << IWM_CSR_HW_IF_CONFIG_REG_POS_PHY_STEP;
1382
	reg_val |= radio_cfg_step << IWM_CSR_HW_IF_CONFIG_REG_POS_PHY_STEP;
1357
	reg_val |= radio_cfg_dash << IWM_CSR_HW_IF_CONFIG_REG_POS_PHY_DASH;
1383
	reg_val |= radio_cfg_dash << IWM_CSR_HW_IF_CONFIG_REG_POS_PHY_DASH;
1358
1384
1359
	IWM_WRITE(sc, IWM_CSR_HW_IF_CONFIG_REG, reg_val);
1385
	IWM_WRITE(sc, IWM_CSR_HW_IF_CONFIG_REG,
1386
	    IWM_CSR_HW_IF_CONFIG_REG_MSK_MAC_DASH |
1387
	    IWM_CSR_HW_IF_CONFIG_REG_MSK_MAC_STEP |
1388
	    IWM_CSR_HW_IF_CONFIG_REG_MSK_PHY_STEP |
1389
	    IWM_CSR_HW_IF_CONFIG_REG_MSK_PHY_DASH |
1390
	    IWM_CSR_HW_IF_CONFIG_REG_MSK_PHY_TYPE |
1391
	    IWM_CSR_HW_IF_CONFIG_REG_BIT_RADIO_SI |
1392
	    IWM_CSR_HW_IF_CONFIG_REG_BIT_MAC_SI |
1393
	    reg_val);
1360
1394
1361
	IWM_DPRINTF(sc, IWM_DEBUG_RESET,
1395
	IWM_DPRINTF(sc, IWM_DEBUG_RESET,
1362
	    "Radio type=0x%x-0x%x-0x%x\n", radio_cfg_type,
1396
	    "Radio type=0x%x-0x%x-0x%x\n", radio_cfg_type,
Lines 1375-1386 iwm_mvm_nic_config(struct iwm_softc *sc) Link Here
1375
}
1409
}
1376
1410
1377
static int
1411
static int
1378
iwm_nic_rx_init(struct iwm_softc *sc)
1412
iwm_nic_rx_mq_init(struct iwm_softc *sc)
1413
{
1414
	int enabled;
1415
1416
	if (!iwm_nic_lock(sc))
1417
		return EBUSY;
1418
1419
	/* Stop RX DMA. */
1420
	iwm_write_prph(sc, IWM_RFH_RXF_DMA_CFG, 0);
1421
	/* Disable RX used and free queue operation. */
1422
	iwm_write_prph(sc, IWM_RFH_RXF_RXQ_ACTIVE, 0);
1423
1424
	iwm_write_prph64(sc, IWM_RFH_Q0_FRBDCB_BA_LSB,
1425
	    sc->rxq.free_desc_dma.paddr);
1426
	iwm_write_prph64(sc, IWM_RFH_Q0_URBDCB_BA_LSB,
1427
	    sc->rxq.used_desc_dma.paddr);
1428
	iwm_write_prph64(sc, IWM_RFH_Q0_URBD_STTS_WPTR_LSB,
1429
	    sc->rxq.stat_dma.paddr);
1430
	iwm_write_prph(sc, IWM_RFH_Q0_FRBDCB_WIDX, 0);
1431
	iwm_write_prph(sc, IWM_RFH_Q0_FRBDCB_RIDX, 0);
1432
	iwm_write_prph(sc, IWM_RFH_Q0_URBDCB_WIDX, 0);
1433
1434
	/* We configure only queue 0 for now. */
1435
	enabled = ((1 << 0) << 16) | (1 << 0);
1436
1437
	/* Enable RX DMA, 4KB buffer size. */
1438
	iwm_write_prph(sc, IWM_RFH_RXF_DMA_CFG,
1439
	    IWM_RFH_DMA_EN_ENABLE_VAL |
1440
	    IWM_RFH_RXF_DMA_RB_SIZE_4K |
1441
	    IWM_RFH_RXF_DMA_MIN_RB_4_8 |
1442
	    IWM_RFH_RXF_DMA_DROP_TOO_LARGE_MASK |
1443
	    IWM_RFH_RXF_DMA_RBDCB_SIZE_512);
1444
1445
	/* Enable RX DMA snooping. */
1446
	iwm_write_prph(sc, IWM_RFH_GEN_CFG,
1447
	    IWM_RFH_GEN_CFG_RFH_DMA_SNOOP |
1448
	    IWM_RFH_GEN_CFG_SERVICE_DMA_SNOOP |
1449
	    (sc->cfg->integrated ? IWM_RFH_GEN_CFG_RB_CHUNK_SIZE_64 :
1450
	    IWM_RFH_GEN_CFG_RB_CHUNK_SIZE_128));
1451
1452
	/* Enable the configured queue(s). */
1453
	iwm_write_prph(sc, IWM_RFH_RXF_RXQ_ACTIVE, enabled);
1454
1455
	iwm_nic_unlock(sc);
1456
1457
	IWM_WRITE_1(sc, IWM_CSR_INT_COALESCING, IWM_HOST_INT_TIMEOUT_DEF);
1458
1459
	IWM_WRITE(sc, IWM_RFH_Q0_FRBDCB_WIDX_TRG, 8);
1460
1461
	return (0);
1462
}
1463
1464
static int
1465
iwm_nic_rx_legacy_init(struct iwm_softc *sc)
1379
{
1466
{
1380
	/*
1381
	 * Initialize RX ring.  This is from the iwn driver.
1382
	 */
1383
	memset(sc->rxq.stat, 0, sizeof(*sc->rxq.stat));
1384
1467
1385
	/* Stop Rx DMA */
1468
	/* Stop Rx DMA */
1386
	iwm_pcie_rx_stop(sc);
1469
	iwm_pcie_rx_stop(sc);
Lines 1396-1402 iwm_nic_rx_init(struct iwm_softc *sc) Link Here
1396
1479
1397
	/* Set physical address of RX ring (256-byte aligned). */
1480
	/* Set physical address of RX ring (256-byte aligned). */
1398
	IWM_WRITE(sc,
1481
	IWM_WRITE(sc,
1399
	    IWM_FH_RSCSR_CHNL0_RBDCB_BASE_REG, sc->rxq.desc_dma.paddr >> 8);
1482
	    IWM_FH_RSCSR_CHNL0_RBDCB_BASE_REG,
1483
	    sc->rxq.free_desc_dma.paddr >> 8);
1400
1484
1401
	/* Set physical address of RX status (16-byte aligned). */
1485
	/* Set physical address of RX status (16-byte aligned). */
1402
	IWM_WRITE(sc,
1486
	IWM_WRITE(sc,
Lines 1425-1443 iwm_nic_rx_init(struct iwm_softc *sc) Link Here
1425
	if (sc->cfg->host_interrupt_operation_mode)
1509
	if (sc->cfg->host_interrupt_operation_mode)
1426
		IWM_SETBITS(sc, IWM_CSR_INT_COALESCING, IWM_HOST_INT_OPER_MODE);
1510
		IWM_SETBITS(sc, IWM_CSR_INT_COALESCING, IWM_HOST_INT_OPER_MODE);
1427
1511
1428
	/*
1429
	 * Thus sayeth el jefe (iwlwifi) via a comment:
1430
	 *
1431
	 * This value should initially be 0 (before preparing any
1432
	 * RBs), should be 8 after preparing the first 8 RBs (for example)
1433
	 */
1434
	IWM_WRITE(sc, IWM_FH_RSCSR_CHNL0_WPTR, 8);
1435
1436
	iwm_nic_unlock(sc);
1512
	iwm_nic_unlock(sc);
1437
1513
1514
	IWM_WRITE(sc, IWM_FH_RSCSR_CHNL0_WPTR, 8);
1515
1438
	return 0;
1516
	return 0;
1439
}
1517
}
1440
1518
1519
static int
1520
iwm_nic_rx_init(struct iwm_softc *sc)
1521
{
1522
	if (sc->cfg->mqrx_supported)
1523
		return iwm_nic_rx_mq_init(sc);
1524
	else
1525
		return iwm_nic_rx_legacy_init(sc);
1526
}
1527
1441
static int
1528
static int
1442
iwm_nic_tx_init(struct iwm_softc *sc)
1529
iwm_nic_tx_init(struct iwm_softc *sc)
1443
{
1530
{
Lines 1466-1472 iwm_nic_tx_init(struct iwm_softc *sc) Link Here
1466
		    (unsigned long) (txq->desc_dma.paddr >> 8));
1553
		    (unsigned long) (txq->desc_dma.paddr >> 8));
1467
	}
1554
	}
1468
1555
1469
	iwm_write_prph(sc, IWM_SCD_GP_CTRL, IWM_SCD_GP_CTRL_AUTO_ACTIVE_MODE);
1556
	iwm_set_bits_prph(sc, IWM_SCD_GP_CTRL,
1557
	    IWM_SCD_GP_CTRL_AUTO_ACTIVE_MODE |
1558
	    IWM_SCD_GP_CTRL_ENABLE_31_QUEUES);
1470
1559
1471
	iwm_nic_unlock(sc);
1560
	iwm_nic_unlock(sc);
1472
1561
Lines 1503-1527 iwm_nic_init(struct iwm_softc *sc) Link Here
1503
int
1592
int
1504
iwm_enable_txq(struct iwm_softc *sc, int sta_id, int qid, int fifo)
1593
iwm_enable_txq(struct iwm_softc *sc, int sta_id, int qid, int fifo)
1505
{
1594
{
1595
	int qmsk;
1596
1597
	qmsk = 1 << qid;
1598
1506
	if (!iwm_nic_lock(sc)) {
1599
	if (!iwm_nic_lock(sc)) {
1507
		device_printf(sc->sc_dev,
1600
		device_printf(sc->sc_dev, "%s: cannot enable txq %d\n",
1508
		    "%s: cannot enable txq %d\n",
1601
		    __func__, qid);
1509
		    __func__,
1510
		    qid);
1511
		return EBUSY;
1602
		return EBUSY;
1512
	}
1603
	}
1513
1604
1514
	IWM_WRITE(sc, IWM_HBUS_TARG_WRPTR, qid << 8 | 0);
1605
	IWM_WRITE(sc, IWM_HBUS_TARG_WRPTR, qid << 8 | 0);
1515
1606
1516
	if (qid == IWM_MVM_CMD_QUEUE) {
1607
	if (qid == IWM_MVM_CMD_QUEUE) {
1517
		/* unactivate before configuration */
1608
		/* Disable the scheduler. */
1609
		iwm_write_prph(sc, IWM_SCD_EN_CTRL, 0);
1610
1611
		/* Stop the TX queue prior to configuration. */
1518
		iwm_write_prph(sc, IWM_SCD_QUEUE_STATUS_BITS(qid),
1612
		iwm_write_prph(sc, IWM_SCD_QUEUE_STATUS_BITS(qid),
1519
		    (0 << IWM_SCD_QUEUE_STTS_REG_POS_ACTIVE)
1613
		    (0 << IWM_SCD_QUEUE_STTS_REG_POS_ACTIVE) |
1520
		    | (1 << IWM_SCD_QUEUE_STTS_REG_POS_SCD_ACT_EN));
1614
		    (1 << IWM_SCD_QUEUE_STTS_REG_POS_SCD_ACT_EN));
1521
1615
1522
		iwm_nic_unlock(sc);
1616
		iwm_nic_unlock(sc);
1523
1617
1524
		iwm_clear_bits_prph(sc, IWM_SCD_AGGR_SEL, (1 << qid));
1618
		/* Disable aggregations for this queue. */
1619
		iwm_clear_bits_prph(sc, IWM_SCD_AGGR_SEL, qmsk);
1525
1620
1526
		if (!iwm_nic_lock(sc)) {
1621
		if (!iwm_nic_lock(sc)) {
1527
			device_printf(sc->sc_dev,
1622
			device_printf(sc->sc_dev,
Lines 1531-1537 iwm_enable_txq(struct iwm_softc *sc, int sta_id, int qid, int fifo) Link Here
1531
		iwm_write_prph(sc, IWM_SCD_QUEUE_RDPTR(qid), 0);
1626
		iwm_write_prph(sc, IWM_SCD_QUEUE_RDPTR(qid), 0);
1532
		iwm_nic_unlock(sc);
1627
		iwm_nic_unlock(sc);
1533
1628
1534
		iwm_write_mem32(sc, sc->scd_base_addr + IWM_SCD_CONTEXT_QUEUE_OFFSET(qid), 0);
1629
		iwm_write_mem32(sc,
1630
		    sc->scd_base_addr + IWM_SCD_CONTEXT_QUEUE_OFFSET(qid), 0);
1535
		/* Set scheduler window size and frame limit. */
1631
		/* Set scheduler window size and frame limit. */
1536
		iwm_write_mem32(sc,
1632
		iwm_write_mem32(sc,
1537
		    sc->scd_base_addr + IWM_SCD_CONTEXT_QUEUE_OFFSET(qid) +
1633
		    sc->scd_base_addr + IWM_SCD_CONTEXT_QUEUE_OFFSET(qid) +
Lines 1551-1556 iwm_enable_txq(struct iwm_softc *sc, int sta_id, int qid, int fifo) Link Here
1551
		    (fifo << IWM_SCD_QUEUE_STTS_REG_POS_TXF) |
1647
		    (fifo << IWM_SCD_QUEUE_STTS_REG_POS_TXF) |
1552
		    (1 << IWM_SCD_QUEUE_STTS_REG_POS_WSL) |
1648
		    (1 << IWM_SCD_QUEUE_STTS_REG_POS_WSL) |
1553
		    IWM_SCD_QUEUE_STTS_REG_MSK);
1649
		    IWM_SCD_QUEUE_STTS_REG_MSK);
1650
1651
		/* Enable the scheduler for this queue. */
1652
		iwm_write_prph(sc, IWM_SCD_EN_CTRL, qmsk);
1554
	} else {
1653
	} else {
1555
		struct iwm_scd_txq_cfg_cmd cmd;
1654
		struct iwm_scd_txq_cfg_cmd cmd;
1556
		int error;
1655
		int error;
Lines 1577-1585 iwm_enable_txq(struct iwm_softc *sc, int sta_id, int qid, int fifo) Link Here
1577
			return EBUSY;
1676
			return EBUSY;
1578
	}
1677
	}
1579
1678
1580
	iwm_write_prph(sc, IWM_SCD_EN_CTRL,
1581
	    iwm_read_prph(sc, IWM_SCD_EN_CTRL) | qid);
1582
1583
	iwm_nic_unlock(sc);
1679
	iwm_nic_unlock(sc);
1584
1680
1585
	IWM_DPRINTF(sc, IWM_DEBUG_XMIT, "%s: enabled txq %d FIFO %d\n",
1681
	IWM_DPRINTF(sc, IWM_DEBUG_XMIT, "%s: enabled txq %d FIFO %d\n",
Lines 1651-1657 iwm_trans_pcie_fw_alive(struct iwm_softc *sc, uint32_t scd_base_addr) Link Here
1651
	iwm_nic_unlock(sc);
1747
	iwm_nic_unlock(sc);
1652
1748
1653
	/* Enable L1-Active */
1749
	/* Enable L1-Active */
1654
	if (sc->cfg->device_family != IWM_DEVICE_FAMILY_8000) {
1750
	if (sc->cfg->device_family < IWM_DEVICE_FAMILY_8000) {
1655
		iwm_clear_bits_prph(sc, IWM_APMG_PCIDEV_STT_REG,
1751
		iwm_clear_bits_prph(sc, IWM_APMG_PCIDEV_STT_REG,
1656
		    IWM_APMG_PCIDEV_STT_VAL_L1_ACT_DIS);
1752
		    IWM_APMG_PCIDEV_STT_VAL_L1_ACT_DIS);
1657
	}
1753
	}
Lines 2069-2075 static int Link Here
2069
iwm_get_sku(const struct iwm_softc *sc, const uint16_t *nvm_sw,
2165
iwm_get_sku(const struct iwm_softc *sc, const uint16_t *nvm_sw,
2070
	    const uint16_t *phy_sku)
2166
	    const uint16_t *phy_sku)
2071
{
2167
{
2072
	if (sc->cfg->device_family != IWM_DEVICE_FAMILY_8000)
2168
	if (sc->cfg->device_family < IWM_DEVICE_FAMILY_8000)
2073
		return le16_to_cpup(nvm_sw + IWM_SKU);
2169
		return le16_to_cpup(nvm_sw + IWM_SKU);
2074
2170
2075
	return le32_to_cpup((const uint32_t *)(phy_sku + IWM_SKU_8000));
2171
	return le32_to_cpup((const uint32_t *)(phy_sku + IWM_SKU_8000));
Lines 2078-2084 iwm_get_sku(const struct iwm_softc *sc, const uint16_t *nvm_sw, Link Here
2078
static int
2174
static int
2079
iwm_get_nvm_version(const struct iwm_softc *sc, const uint16_t *nvm_sw)
2175
iwm_get_nvm_version(const struct iwm_softc *sc, const uint16_t *nvm_sw)
2080
{
2176
{
2081
	if (sc->cfg->device_family != IWM_DEVICE_FAMILY_8000)
2177
	if (sc->cfg->device_family < IWM_DEVICE_FAMILY_8000)
2082
		return le16_to_cpup(nvm_sw + IWM_NVM_VERSION);
2178
		return le16_to_cpup(nvm_sw + IWM_NVM_VERSION);
2083
	else
2179
	else
2084
		return le32_to_cpup((const uint32_t *)(nvm_sw +
2180
		return le32_to_cpup((const uint32_t *)(nvm_sw +
Lines 2089-2095 static int Link Here
2089
iwm_get_radio_cfg(const struct iwm_softc *sc, const uint16_t *nvm_sw,
2185
iwm_get_radio_cfg(const struct iwm_softc *sc, const uint16_t *nvm_sw,
2090
		  const uint16_t *phy_sku)
2186
		  const uint16_t *phy_sku)
2091
{
2187
{
2092
        if (sc->cfg->device_family != IWM_DEVICE_FAMILY_8000)
2188
        if (sc->cfg->device_family < IWM_DEVICE_FAMILY_8000)
2093
                return le16_to_cpup(nvm_sw + IWM_RADIO_CFG);
2189
                return le16_to_cpup(nvm_sw + IWM_RADIO_CFG);
2094
2190
2095
        return le32_to_cpup((const uint32_t *)(phy_sku + IWM_RADIO_CFG_8000));
2191
        return le32_to_cpup((const uint32_t *)(phy_sku + IWM_RADIO_CFG_8000));
Lines 2100-2106 iwm_get_n_hw_addrs(const struct iwm_softc *sc, const uint16_t *nvm_sw) Link Here
2100
{
2196
{
2101
	int n_hw_addr;
2197
	int n_hw_addr;
2102
2198
2103
	if (sc->cfg->device_family != IWM_DEVICE_FAMILY_8000)
2199
	if (sc->cfg->device_family < IWM_DEVICE_FAMILY_8000)
2104
		return le16_to_cpup(nvm_sw + IWM_N_HW_ADDRS);
2200
		return le16_to_cpup(nvm_sw + IWM_N_HW_ADDRS);
2105
2201
2106
	n_hw_addr = le32_to_cpup((const uint32_t *)(nvm_sw + IWM_N_HW_ADDRS_8000));
2202
	n_hw_addr = le32_to_cpup((const uint32_t *)(nvm_sw + IWM_N_HW_ADDRS_8000));
Lines 2112-2118 static void Link Here
2112
iwm_set_radio_cfg(const struct iwm_softc *sc, struct iwm_nvm_data *data,
2208
iwm_set_radio_cfg(const struct iwm_softc *sc, struct iwm_nvm_data *data,
2113
		  uint32_t radio_cfg)
2209
		  uint32_t radio_cfg)
2114
{
2210
{
2115
	if (sc->cfg->device_family != IWM_DEVICE_FAMILY_8000) {
2211
	if (sc->cfg->device_family < IWM_DEVICE_FAMILY_8000) {
2116
		data->radio_cfg_type = IWM_NVM_RF_CFG_TYPE_MSK(radio_cfg);
2212
		data->radio_cfg_type = IWM_NVM_RF_CFG_TYPE_MSK(radio_cfg);
2117
		data->radio_cfg_step = IWM_NVM_RF_CFG_STEP_MSK(radio_cfg);
2213
		data->radio_cfg_step = IWM_NVM_RF_CFG_STEP_MSK(radio_cfg);
2118
		data->radio_cfg_dash = IWM_NVM_RF_CFG_DASH_MSK(radio_cfg);
2214
		data->radio_cfg_dash = IWM_NVM_RF_CFG_DASH_MSK(radio_cfg);
Lines 2138-2144 iwm_set_hw_address(struct iwm_softc *sc, struct iwm_nvm_data *data, Link Here
2138
		iwm_set_hw_address_from_csr(sc, data);
2234
		iwm_set_hw_address_from_csr(sc, data);
2139
        } else
2235
        } else
2140
#endif
2236
#endif
2141
	if (sc->cfg->device_family != IWM_DEVICE_FAMILY_8000) {
2237
	if (sc->cfg->device_family < IWM_DEVICE_FAMILY_8000) {
2142
		const uint8_t *hw_addr = (const uint8_t *)(nvm_hw + IWM_HW_ADDR);
2238
		const uint8_t *hw_addr = (const uint8_t *)(nvm_hw + IWM_HW_ADDR);
2143
2239
2144
		/* The byte order is little endian 16 bit, meaning 214365 */
2240
		/* The byte order is little endian 16 bit, meaning 214365 */
Lines 2170-2176 iwm_parse_nvm_data(struct iwm_softc *sc, Link Here
2170
	uint32_t sku, radio_cfg;
2266
	uint32_t sku, radio_cfg;
2171
	uint16_t lar_config;
2267
	uint16_t lar_config;
2172
2268
2173
	if (sc->cfg->device_family != IWM_DEVICE_FAMILY_8000) {
2269
	if (sc->cfg->device_family < IWM_DEVICE_FAMILY_8000) {
2174
		data = malloc(sizeof(*data) +
2270
		data = malloc(sizeof(*data) +
2175
		    IWM_NUM_CHANNELS * sizeof(uint16_t),
2271
		    IWM_NUM_CHANNELS * sizeof(uint16_t),
2176
		    M_DEVBUF, M_NOWAIT | M_ZERO);
2272
		    M_DEVBUF, M_NOWAIT | M_ZERO);
Lines 2194-2200 iwm_parse_nvm_data(struct iwm_softc *sc, Link Here
2194
2290
2195
	data->n_hw_addrs = iwm_get_n_hw_addrs(sc, nvm_sw);
2291
	data->n_hw_addrs = iwm_get_n_hw_addrs(sc, nvm_sw);
2196
2292
2197
	if (sc->cfg->device_family == IWM_DEVICE_FAMILY_8000) {
2293
	if (sc->cfg->device_family >= IWM_DEVICE_FAMILY_8000) {
2294
		/* TODO: use IWL_NVM_EXT */
2198
		uint16_t lar_offset = data->nvm_version < 0xE39 ?
2295
		uint16_t lar_offset = data->nvm_version < 0xE39 ?
2199
				       IWM_NVM_LAR_OFFSET_8000_OLD :
2296
				       IWM_NVM_LAR_OFFSET_8000_OLD :
2200
				       IWM_NVM_LAR_OFFSET_8000;
2297
				       IWM_NVM_LAR_OFFSET_8000;
Lines 2242-2248 iwm_parse_nvm_sections(struct iwm_softc *sc, struct iwm_nvm_section *sections) Link Here
2242
			    "Can't parse empty OTP/NVM sections\n");
2339
			    "Can't parse empty OTP/NVM sections\n");
2243
			return NULL;
2340
			return NULL;
2244
		}
2341
		}
2245
	} else if (sc->cfg->device_family == IWM_DEVICE_FAMILY_8000) {
2342
	} else if (sc->cfg->device_family >= IWM_DEVICE_FAMILY_8000) {
2246
		/* SW and REGULATORY sections are mandatory */
2343
		/* SW and REGULATORY sections are mandatory */
2247
		if (!sections[IWM_NVM_SECTION_TYPE_SW].data ||
2344
		if (!sections[IWM_NVM_SECTION_TYPE_SW].data ||
2248
		    !sections[IWM_NVM_SECTION_TYPE_REGULATORY].data) {
2345
		    !sections[IWM_NVM_SECTION_TYPE_REGULATORY].data) {
Lines 2672-2678 iwm_start_fw(struct iwm_softc *sc, const struct iwm_fw_img *fw) Link Here
2672
	IWM_WRITE(sc, IWM_CSR_UCODE_DRV_GP1_CLR, IWM_CSR_UCODE_SW_BIT_RFKILL);
2769
	IWM_WRITE(sc, IWM_CSR_UCODE_DRV_GP1_CLR, IWM_CSR_UCODE_SW_BIT_RFKILL);
2673
2770
2674
	/* Load the given image to the HW */
2771
	/* Load the given image to the HW */
2675
	if (sc->cfg->device_family == IWM_DEVICE_FAMILY_8000)
2772
	if (sc->cfg->device_family >= IWM_DEVICE_FAMILY_8000)
2676
		ret = iwm_pcie_load_given_ucode_8000(sc, fw);
2773
		ret = iwm_pcie_load_given_ucode_8000(sc, fw);
2677
	else
2774
	else
2678
		ret = iwm_pcie_load_given_ucode(sc, fw);
2775
		ret = iwm_pcie_load_given_ucode(sc, fw);
Lines 2823-2829 iwm_mvm_load_ucode_wait_alive(struct iwm_softc *sc, Link Here
2823
				      IWM_MVM_UCODE_ALIVE_TIMEOUT);
2920
				      IWM_MVM_UCODE_ALIVE_TIMEOUT);
2824
	IWM_LOCK(sc);
2921
	IWM_LOCK(sc);
2825
	if (error) {
2922
	if (error) {
2826
		if (sc->cfg->device_family == IWM_DEVICE_FAMILY_8000) {
2923
		if (sc->cfg->device_family >= IWM_DEVICE_FAMILY_8000) {
2827
			uint32_t a = 0x5a5a5a5a, b = 0x5a5a5a5a;
2924
			uint32_t a = 0x5a5a5a5a, b = 0x5a5a5a5a;
2828
			if (iwm_nic_lock(sc)) {
2925
			if (iwm_nic_lock(sc)) {
2829
				a = iwm_read_prph(sc, IWM_SB_CPU_1_STATUS);
2926
				a = iwm_read_prph(sc, IWM_SB_CPU_1_STATUS);
Lines 2914-2919 iwm_run_init_mvm_ucode(struct iwm_softc *sc, int justnvm) Link Here
2914
		goto error;
3011
		goto error;
2915
	}
3012
	}
2916
3013
3014
	if (sc->cfg->device_family < IWM_DEVICE_FAMILY_8000) {
3015
		ret = iwm_send_bt_init_conf(sc);
3016
		if (ret) {
3017
			device_printf(sc->sc_dev,
3018
			    "failed to send bt coex configuration: %d\n", ret);
3019
			goto error;
3020
		}
3021
	}
3022
2917
	if (justnvm) {
3023
	if (justnvm) {
2918
		/* Read nvm */
3024
		/* Read nvm */
2919
		ret = iwm_nvm_init(sc);
3025
		ret = iwm_nvm_init(sc);
Lines 2925-2937 iwm_run_init_mvm_ucode(struct iwm_softc *sc, int justnvm) Link Here
2925
		goto error;
3031
		goto error;
2926
	}
3032
	}
2927
3033
2928
	ret = iwm_send_bt_init_conf(sc);
2929
	if (ret) {
2930
		device_printf(sc->sc_dev,
2931
		    "failed to send bt coex configuration: %d\n", ret);
2932
		goto error;
2933
	}
2934
2935
	/* Send TX valid antennas before triggering calibrations */
3034
	/* Send TX valid antennas before triggering calibrations */
2936
	ret = iwm_send_tx_ant_cfg(sc, iwm_mvm_get_valid_tx_ant(sc));
3035
	ret = iwm_send_tx_ant_cfg(sc, iwm_mvm_get_valid_tx_ant(sc));
2937
	if (ret) {
3036
	if (ret) {
Lines 3025-3070 iwm_rx_addbuf(struct iwm_softc *sc, int size, int idx) Link Here
3025
3124
3026
	/* Update RX descriptor. */
3125
	/* Update RX descriptor. */
3027
	KASSERT((seg.ds_addr & 255) == 0, ("seg.ds_addr not aligned"));
3126
	KASSERT((seg.ds_addr & 255) == 0, ("seg.ds_addr not aligned"));
3028
	ring->desc[idx] = htole32(seg.ds_addr >> 8);
3127
	if (sc->cfg->mqrx_supported)
3029
	bus_dmamap_sync(ring->desc_dma.tag, ring->desc_dma.map,
3128
		((uint64_t *)ring->desc)[idx] =
3129
		    htole64(seg.ds_addr | (idx + 1));
3130
	else
3131
		((uint32_t *)ring->desc)[idx] = htole32(seg.ds_addr >> 8);
3132
	bus_dmamap_sync(ring->free_desc_dma.tag, ring->free_desc_dma.map,
3030
	    BUS_DMASYNC_PREWRITE);
3133
	    BUS_DMASYNC_PREWRITE);
3031
3134
3032
	return 0;
3135
	return 0;
3033
}
3136
}
3034
3137
3035
/* iwlwifi: mvm/rx.c */
3036
/*
3037
 * iwm_mvm_get_signal_strength - use new rx PHY INFO API
3038
 * values are reported by the fw as positive values - need to negate
3039
 * to obtain their dBM.  Account for missing antennas by replacing 0
3040
 * values by -256dBm: practically 0 power and a non-feasible 8 bit value.
3041
 */
3042
static int
3043
iwm_mvm_get_signal_strength(struct iwm_softc *sc, struct iwm_rx_phy_info *phy_info)
3044
{
3045
	int energy_a, energy_b, energy_c, max_energy;
3046
	uint32_t val;
3047
3048
	val = le32toh(phy_info->non_cfg_phy[IWM_RX_INFO_ENERGY_ANT_ABC_IDX]);
3049
	energy_a = (val & IWM_RX_INFO_ENERGY_ANT_A_MSK) >>
3050
	    IWM_RX_INFO_ENERGY_ANT_A_POS;
3051
	energy_a = energy_a ? -energy_a : -256;
3052
	energy_b = (val & IWM_RX_INFO_ENERGY_ANT_B_MSK) >>
3053
	    IWM_RX_INFO_ENERGY_ANT_B_POS;
3054
	energy_b = energy_b ? -energy_b : -256;
3055
	energy_c = (val & IWM_RX_INFO_ENERGY_ANT_C_MSK) >>
3056
	    IWM_RX_INFO_ENERGY_ANT_C_POS;
3057
	energy_c = energy_c ? -energy_c : -256;
3058
	max_energy = MAX(energy_a, energy_b);
3059
	max_energy = MAX(max_energy, energy_c);
3060
3061
	IWM_DPRINTF(sc, IWM_DEBUG_RECV,
3062
	    "energy In A %d B %d C %d , and max %d\n",
3063
	    energy_a, energy_b, energy_c, max_energy);
3064
3065
	return max_energy;
3066
}
3067
3068
static void
3138
static void
3069
iwm_mvm_rx_rx_phy_cmd(struct iwm_softc *sc, struct iwm_rx_packet *pkt)
3139
iwm_mvm_rx_rx_phy_cmd(struct iwm_softc *sc, struct iwm_rx_packet *pkt)
3070
{
3140
{
Lines 3118-3136 iwm_mvm_handle_rx_statistics(struct iwm_softc *sc, struct iwm_rx_packet *pkt) Link Here
3118
	sc->sc_noise = iwm_get_noise(sc, &stats->rx.general);
3188
	sc->sc_noise = iwm_get_noise(sc, &stats->rx.general);
3119
}
3189
}
3120
3190
3191
/* iwlwifi: mvm/rx.c */
3192
/*
3193
 * iwm_mvm_get_signal_strength - use new rx PHY INFO API
3194
 * values are reported by the fw as positive values - need to negate
3195
 * to obtain their dBM.  Account for missing antennas by replacing 0
3196
 * values by -256dBm: practically 0 power and a non-feasible 8 bit value.
3197
 */
3198
static int
3199
iwm_mvm_rx_get_signal_strength(struct iwm_softc *sc,
3200
    struct iwm_rx_phy_info *phy_info)
3201
{
3202
	int energy_a, energy_b, energy_c, max_energy;
3203
	uint32_t val;
3204
3205
	val = le32toh(phy_info->non_cfg_phy[IWM_RX_INFO_ENERGY_ANT_ABC_IDX]);
3206
	energy_a = (val & IWM_RX_INFO_ENERGY_ANT_A_MSK) >>
3207
	    IWM_RX_INFO_ENERGY_ANT_A_POS;
3208
	energy_a = energy_a ? -energy_a : -256;
3209
	energy_b = (val & IWM_RX_INFO_ENERGY_ANT_B_MSK) >>
3210
	    IWM_RX_INFO_ENERGY_ANT_B_POS;
3211
	energy_b = energy_b ? -energy_b : -256;
3212
	energy_c = (val & IWM_RX_INFO_ENERGY_ANT_C_MSK) >>
3213
	    IWM_RX_INFO_ENERGY_ANT_C_POS;
3214
	energy_c = energy_c ? -energy_c : -256;
3215
	max_energy = MAX(energy_a, energy_b);
3216
	max_energy = MAX(max_energy, energy_c);
3217
3218
	IWM_DPRINTF(sc, IWM_DEBUG_RECV,
3219
	    "energy In A %d B %d C %d , and max %d\n",
3220
	    energy_a, energy_b, energy_c, max_energy);
3221
3222
	return max_energy;
3223
}
3224
3225
static int
3226
iwm_mvm_rxmq_get_signal_strength(struct iwm_softc *sc,
3227
    struct iwm_rx_mpdu_desc *desc)
3228
{
3229
	int energy_a, energy_b;
3230
3231
	energy_a = desc->v1.energy_a;
3232
	energy_b = desc->v1.energy_b;
3233
	energy_a = energy_a ? -energy_a : -256;
3234
	energy_b = energy_b ? -energy_b : -256;
3235
	return MAX(energy_a, energy_b);
3236
}
3237
3121
/*
3238
/*
3122
 * iwm_mvm_rx_rx_mpdu - IWM_REPLY_RX_MPDU_CMD handler
3239
 * iwm_mvm_rx_rx_mpdu - IWM_REPLY_RX_MPDU_CMD handler
3123
 *
3240
 *
3124
 * Handles the actual data of the Rx packet from the fw
3241
 * Handles the actual data of the Rx packet from the fw
3125
 */
3242
 */
3126
static boolean_t
3243
static bool
3127
iwm_mvm_rx_rx_mpdu(struct iwm_softc *sc, struct mbuf *m, uint32_t offset,
3244
iwm_mvm_rx_rx_mpdu(struct iwm_softc *sc, struct mbuf *m, uint32_t offset,
3128
	boolean_t stolen)
3245
    bool stolen)
3129
{
3246
{
3130
	struct ieee80211com *ic = &sc->sc_ic;
3247
	struct ieee80211com *ic = &sc->sc_ic;
3131
	struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps);
3248
	struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps);
3132
	struct ieee80211_frame *wh;
3249
	struct ieee80211_frame *wh;
3133
	struct ieee80211_node *ni;
3134
	struct ieee80211_rx_stats rxs;
3250
	struct ieee80211_rx_stats rxs;
3135
	struct iwm_rx_phy_info *phy_info;
3251
	struct iwm_rx_phy_info *phy_info;
3136
	struct iwm_rx_mpdu_res_start *rx_res;
3252
	struct iwm_rx_mpdu_res_start *rx_res;
Lines 3149-3165 iwm_mvm_rx_rx_mpdu(struct iwm_softc *sc, struct mbuf *m, uint32_t offset, Link Here
3149
		device_printf(sc->sc_dev,
3265
		device_printf(sc->sc_dev,
3150
		    "dsp size out of range [0,20]: %d\n",
3266
		    "dsp size out of range [0,20]: %d\n",
3151
		    phy_info->cfg_phy_cnt);
3267
		    phy_info->cfg_phy_cnt);
3152
		goto fail;
3268
		return false;
3153
	}
3269
	}
3154
3270
3155
	if (!(rx_pkt_status & IWM_RX_MPDU_RES_STATUS_CRC_OK) ||
3271
	if (!(rx_pkt_status & IWM_RX_MPDU_RES_STATUS_CRC_OK) ||
3156
	    !(rx_pkt_status & IWM_RX_MPDU_RES_STATUS_OVERRUN_OK)) {
3272
	    !(rx_pkt_status & IWM_RX_MPDU_RES_STATUS_OVERRUN_OK)) {
3157
		IWM_DPRINTF(sc, IWM_DEBUG_RECV,
3273
		IWM_DPRINTF(sc, IWM_DEBUG_RECV,
3158
		    "Bad CRC or FIFO: 0x%08X.\n", rx_pkt_status);
3274
		    "Bad CRC or FIFO: 0x%08X.\n", rx_pkt_status);
3159
		goto fail;
3275
		return false;
3160
	}
3276
	}
3161
3277
3162
	rssi = iwm_mvm_get_signal_strength(sc, phy_info);
3278
	rssi = iwm_mvm_rx_get_signal_strength(sc, phy_info);
3163
3279
3164
	/* Map it to relative value */
3280
	/* Map it to relative value */
3165
	rssi = rssi - sc->sc_noise;
3281
	rssi = rssi - sc->sc_noise;
Lines 3168-3174 iwm_mvm_rx_rx_mpdu(struct iwm_softc *sc, struct mbuf *m, uint32_t offset, Link Here
3168
	if (!stolen && iwm_rx_addbuf(sc, IWM_RBUF_SIZE, sc->rxq.cur) != 0) {
3284
	if (!stolen && iwm_rx_addbuf(sc, IWM_RBUF_SIZE, sc->rxq.cur) != 0) {
3169
		device_printf(sc->sc_dev, "%s: unable to add more buffers\n",
3285
		device_printf(sc->sc_dev, "%s: unable to add more buffers\n",
3170
		    __func__);
3286
		    __func__);
3171
		goto fail;
3287
		return false;
3172
	}
3288
	}
3173
3289
3174
	m->m_data = pkt->data + sizeof(*rx_res);
3290
	m->m_data = pkt->data + sizeof(*rx_res);
Lines 3177-3184 iwm_mvm_rx_rx_mpdu(struct iwm_softc *sc, struct mbuf *m, uint32_t offset, Link Here
3177
	IWM_DPRINTF(sc, IWM_DEBUG_RECV,
3293
	IWM_DPRINTF(sc, IWM_DEBUG_RECV,
3178
	    "%s: rssi=%d, noise=%d\n", __func__, rssi, sc->sc_noise);
3294
	    "%s: rssi=%d, noise=%d\n", __func__, rssi, sc->sc_noise);
3179
3295
3180
	ni = ieee80211_find_rxnode(ic, (struct ieee80211_frame_min *)wh);
3181
3182
	IWM_DPRINTF(sc, IWM_DEBUG_RECV,
3296
	IWM_DPRINTF(sc, IWM_DEBUG_RECV,
3183
	    "%s: phy_info: channel=%d, flags=0x%08x\n",
3297
	    "%s: phy_info: channel=%d, flags=0x%08x\n",
3184
	    __func__,
3298
	    __func__,
Lines 3201-3211 iwm_mvm_rx_rx_mpdu(struct iwm_softc *sc, struct mbuf *m, uint32_t offset, Link Here
3201
	/* rssi is in 1/2db units */
3315
	/* rssi is in 1/2db units */
3202
	rxs.c_rssi = rssi * 2;
3316
	rxs.c_rssi = rssi * 2;
3203
	rxs.c_nf = sc->sc_noise;
3317
	rxs.c_nf = sc->sc_noise;
3204
	if (ieee80211_add_rx_params(m, &rxs) == 0) {
3318
	if (ieee80211_add_rx_params(m, &rxs) == 0)
3205
		if (ni)
3319
		return false;
3206
			ieee80211_free_node(ni);
3207
		goto fail;
3208
	}
3209
3320
3210
	if (ieee80211_radiotap_active_vap(vap)) {
3321
	if (ieee80211_radiotap_active_vap(vap)) {
3211
		struct iwm_rx_radiotap_header *tap = &sc->sc_rxtap;
3322
		struct iwm_rx_radiotap_header *tap = &sc->sc_rxtap;
Lines 3239-3244 iwm_mvm_rx_rx_mpdu(struct iwm_softc *sc, struct mbuf *m, uint32_t offset, Link Here
3239
		}
3350
		}
3240
	}
3351
	}
3241
3352
3353
	return true;
3354
}
3355
3356
static bool
3357
iwm_mvm_rx_mpdu_mq(struct iwm_softc *sc, struct mbuf *m, uint32_t offset,
3358
    bool stolen)
3359
{
3360
	struct ieee80211com *ic = &sc->sc_ic;
3361
	struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps);
3362
	struct ieee80211_frame *wh;
3363
	struct ieee80211_rx_stats rxs;
3364
	struct iwm_rx_mpdu_desc *desc;
3365
	struct iwm_rx_packet *pkt;
3366
	int rssi;
3367
	uint32_t hdrlen, len, rate_n_flags;
3368
	uint16_t phy_info;
3369
	uint8_t channel;
3370
3371
	pkt = mtodo(m, offset);
3372
	desc = (void *)pkt->data;
3373
3374
	if (!(desc->status & htole16(IWM_RX_MPDU_RES_STATUS_CRC_OK)) ||
3375
	    !(desc->status & htole16(IWM_RX_MPDU_RES_STATUS_OVERRUN_OK))) {
3376
		IWM_DPRINTF(sc, IWM_DEBUG_RECV,
3377
		    "Bad CRC or FIFO: 0x%08X.\n", desc->status);
3378
		return false;
3379
	}
3380
3381
	channel = desc->v1.channel;
3382
	len = le16toh(desc->mpdu_len);
3383
	phy_info = le16toh(desc->phy_info);
3384
	rate_n_flags = desc->v1.rate_n_flags;
3385
3386
	wh = mtodo(m, sizeof(*desc));
3387
	m->m_data = pkt->data + sizeof(*desc);
3388
	m->m_pkthdr.len = m->m_len = len;
3389
	m->m_len = len;
3390
3391
	/* Account for padding following the frame header. */
3392
	if ((desc->mac_flags2 & IWM_RX_MPDU_MFLG2_PAD)) {
3393
		hdrlen = ieee80211_anyhdrsize(wh);
3394
		memmove(mtodo(m, 2), mtodo(m, 0), hdrlen);
3395
		m->m_data = mtodo(m, 2);
3396
		wh = mtod(m, struct ieee80211_frame *);
3397
	}
3398
3399
	/* Map it to relative value */
3400
	rssi = iwm_mvm_rxmq_get_signal_strength(sc, desc);
3401
	rssi = rssi - sc->sc_noise;
3402
3403
	/* replenish ring for the buffer we're going to feed to the sharks */
3404
	if (!stolen && iwm_rx_addbuf(sc, IWM_RBUF_SIZE, sc->rxq.cur) != 0) {
3405
		device_printf(sc->sc_dev, "%s: unable to add more buffers\n",
3406
		    __func__);
3407
		return false;
3408
	}
3409
3410
	IWM_DPRINTF(sc, IWM_DEBUG_RECV,
3411
	    "%s: rssi=%d, noise=%d\n", __func__, rssi, sc->sc_noise);
3412
3413
	/*
3414
	 * Populate an RX state struct with the provided information.
3415
	 */
3416
	bzero(&rxs, sizeof(rxs));
3417
	rxs.r_flags |= IEEE80211_R_IEEE | IEEE80211_R_FREQ;
3418
	rxs.r_flags |= IEEE80211_R_NF | IEEE80211_R_RSSI;
3419
	rxs.c_ieee = channel;
3420
	rxs.c_freq = ieee80211_ieee2mhz(rxs.c_ieee,
3421
	    channel <= 14 ? IEEE80211_CHAN_2GHZ : IEEE80211_CHAN_5GHZ);
3422
3423
	/* rssi is in 1/2db units */
3424
	rxs.c_rssi = rssi * 2;
3425
	rxs.c_nf = sc->sc_noise;
3426
	if (ieee80211_add_rx_params(m, &rxs) == 0)
3427
		return false;
3428
3429
	if (ieee80211_radiotap_active_vap(vap)) {
3430
		struct iwm_rx_radiotap_header *tap = &sc->sc_rxtap;
3431
3432
		tap->wr_flags = 0;
3433
		if ((phy_info & IWM_RX_MPDU_PHY_SHORT_PREAMBLE) != 0)
3434
			tap->wr_flags |= IEEE80211_RADIOTAP_F_SHORTPRE;
3435
		tap->wr_chan_freq = htole16(rxs.c_freq);
3436
		/* XXX only if ic->ic_curchan->ic_ieee == rxs.c_ieee */
3437
		tap->wr_chan_flags = htole16(ic->ic_curchan->ic_flags);
3438
		tap->wr_dbm_antsignal = (int8_t)rssi;
3439
		tap->wr_dbm_antnoise = (int8_t)sc->sc_noise;
3440
		tap->wr_tsft = desc->v1.gp2_on_air_rise;
3441
		switch ((rate_n_flags & 0xff)) {
3442
		/* CCK rates. */
3443
		case  10: tap->wr_rate =   2; break;
3444
		case  20: tap->wr_rate =   4; break;
3445
		case  55: tap->wr_rate =  11; break;
3446
		case 110: tap->wr_rate =  22; break;
3447
		/* OFDM rates. */
3448
		case 0xd: tap->wr_rate =  12; break;
3449
		case 0xf: tap->wr_rate =  18; break;
3450
		case 0x5: tap->wr_rate =  24; break;
3451
		case 0x7: tap->wr_rate =  36; break;
3452
		case 0x9: tap->wr_rate =  48; break;
3453
		case 0xb: tap->wr_rate =  72; break;
3454
		case 0x1: tap->wr_rate =  96; break;
3455
		case 0x3: tap->wr_rate = 108; break;
3456
		/* Unknown rate: should not happen. */
3457
		default:  tap->wr_rate =   0;
3458
		}
3459
	}
3460
3461
	return true;
3462
}
3463
3464
static bool
3465
iwm_mvm_rx_mpdu(struct iwm_softc *sc, struct mbuf *m, uint32_t offset,
3466
    bool stolen)
3467
{
3468
	struct ieee80211com *ic;
3469
	struct ieee80211_frame *wh;
3470
	struct ieee80211_node *ni;
3471
	bool ret;
3472
3473
	ic = &sc->sc_ic;
3474
3475
	ret = sc->cfg->mqrx_supported ?
3476
	    iwm_mvm_rx_mpdu_mq(sc, m, offset, stolen) :
3477
	    iwm_mvm_rx_rx_mpdu(sc, m, offset, stolen);
3478
	if (!ret) {
3479
		counter_u64_add(ic->ic_ierrors, 1);
3480
		return (ret);
3481
	}
3482
3483
	wh = mtod(m, struct ieee80211_frame *);
3484
	ni = ieee80211_find_rxnode(ic, (struct ieee80211_frame_min *)wh);
3485
3242
	IWM_UNLOCK(sc);
3486
	IWM_UNLOCK(sc);
3243
	if (ni != NULL) {
3487
	if (ni != NULL) {
3244
		IWM_DPRINTF(sc, IWM_DEBUG_RECV, "input m %p\n", m);
3488
		IWM_DPRINTF(sc, IWM_DEBUG_RECV, "input m %p\n", m);
Lines 3250-3260 iwm_mvm_rx_rx_mpdu(struct iwm_softc *sc, struct mbuf *m, uint32_t offset, Link Here
3250
	}
3494
	}
3251
	IWM_LOCK(sc);
3495
	IWM_LOCK(sc);
3252
3496
3253
	return TRUE;
3497
	return true;
3254
3255
fail:
3256
	counter_u64_add(ic->ic_ierrors, 1);
3257
	return FALSE;
3258
}
3498
}
3259
3499
3260
static int
3500
static int
Lines 3338-3350 static void Link Here
3338
iwm_mvm_rx_tx_cmd(struct iwm_softc *sc, struct iwm_rx_packet *pkt)
3578
iwm_mvm_rx_tx_cmd(struct iwm_softc *sc, struct iwm_rx_packet *pkt)
3339
{
3579
{
3340
	struct iwm_cmd_header *cmd_hdr = &pkt->hdr;
3580
	struct iwm_cmd_header *cmd_hdr = &pkt->hdr;
3341
	int idx = cmd_hdr->idx;
3581
	struct iwm_tx_ring *ring;
3342
	int qid = cmd_hdr->qid;
3582
	struct iwm_tx_data *txd;
3343
	struct iwm_tx_ring *ring = &sc->txq[qid];
3583
	struct iwm_node *in;
3344
	struct iwm_tx_data *txd = &ring->data[idx];
3584
	struct mbuf *m;
3345
	struct iwm_node *in = txd->in;
3585
	int idx, qid, qmsk, status;
3346
	struct mbuf *m = txd->m;
3586
3347
	int status;
3587
	idx = cmd_hdr->idx;
3588
	qid = cmd_hdr->qid;
3589
	qmsk = 1 << qid;
3590
3591
	ring = &sc->txq[qid];
3592
	txd = &ring->data[idx];
3593
	in = txd->in;
3594
	m = txd->m;
3348
3595
3349
	KASSERT(txd->done == 0, ("txd not done"));
3596
	KASSERT(txd->done == 0, ("txd not done"));
3350
	KASSERT(txd->in != NULL, ("txd without node"));
3597
	KASSERT(txd->in != NULL, ("txd without node"));
Lines 3366-3376 iwm_mvm_rx_tx_cmd(struct iwm_softc *sc, struct iwm_rx_packet *pkt) Link Here
3366
3613
3367
	ieee80211_tx_complete(&in->in_ni, m, status);
3614
	ieee80211_tx_complete(&in->in_ni, m, status);
3368
3615
3369
	if (--ring->queued < IWM_TX_RING_LOMARK) {
3616
	if (--ring->queued < IWM_TX_RING_LOMARK && (sc->qfullmsk & qmsk) != 0) {
3370
		sc->qfullmsk &= ~(1 << ring->qid);
3617
		sc->qfullmsk &= ~qmsk;
3371
		if (sc->qfullmsk == 0) {
3618
		if (sc->qfullmsk == 0)
3372
			iwm_start(sc);
3619
			iwm_start(sc);
3373
		}
3374
	}
3620
	}
3375
}
3621
}
3376
3622
Lines 3531-3537 iwm_tx_fill_cmd(struct iwm_softc *sc, struct iwm_node *in, Link Here
3531
	    );
3777
	    );
3532
3778
3533
	/* XXX TODO: hard-coded TX antenna? */
3779
	/* XXX TODO: hard-coded TX antenna? */
3534
	rate_flags = 1 << IWM_RATE_MCS_ANT_POS;
3780
	if (sc->cfg->device_family == IWM_DEVICE_FAMILY_9000)
3781
		rate_flags = IWM_RATE_MCS_ANT_B_MSK;
3782
	else
3783
		rate_flags = IWM_RATE_MCS_ANT_A_MSK;
3535
	if (IWM_RIDX_IS_CCK(ridx))
3784
	if (IWM_RIDX_IS_CCK(ridx))
3536
		rate_flags |= IWM_RATE_MCS_CCK_MSK;
3785
		rate_flags |= IWM_RATE_MCS_CCK_MSK;
3537
	tx->rate_n_flags = htole32(rate_flags | rinfo->plcp);
3786
	tx->rate_n_flags = htole32(rate_flags | rinfo->plcp);
Lines 3568-3574 iwm_tx(struct iwm_softc *sc, struct mbuf *m, struct ieee80211_node *ni, int ac) Link Here
3568
	tid = 0;
3817
	tid = 0;
3569
	ring = &sc->txq[ac];
3818
	ring = &sc->txq[ac];
3570
	desc = &ring->desc[ring->cur];
3819
	desc = &ring->desc[ring->cur];
3571
	memset(desc, 0, sizeof(*desc));
3572
	data = &ring->data[ring->cur];
3820
	data = &ring->data[ring->cur];
3573
3821
3574
	/* Fill out iwm_tx_cmd to send to the firmware */
3822
	/* Fill out iwm_tx_cmd to send to the firmware */
Lines 3607-3631 iwm_tx(struct iwm_softc *sc, struct mbuf *m, struct ieee80211_node *ni, int ac) Link Here
3607
		ieee80211_radiotap_tx(vap, m);
3855
		ieee80211_radiotap_tx(vap, m);
3608
	}
3856
	}
3609
3857
3610
3611
	totlen = m->m_pkthdr.len;
3612
3613
	flags = 0;
3858
	flags = 0;
3859
	totlen = m->m_pkthdr.len;
3614
	if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) {
3860
	if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) {
3615
		flags |= IWM_TX_CMD_FLG_ACK;
3861
		flags |= IWM_TX_CMD_FLG_ACK;
3616
	}
3862
	}
3617
3863
3618
	if (type == IEEE80211_FC0_TYPE_DATA
3864
	if (type == IEEE80211_FC0_TYPE_DATA &&
3619
	    && (totlen + IEEE80211_CRC_LEN > vap->iv_rtsthreshold)
3865
	    totlen + IEEE80211_CRC_LEN > vap->iv_rtsthreshold &&
3620
	    && !IEEE80211_IS_MULTICAST(wh->i_addr1)) {
3866
	    !IEEE80211_IS_MULTICAST(wh->i_addr1)) {
3621
		flags |= IWM_TX_CMD_FLG_PROT_REQUIRE;
3867
		flags |= IWM_TX_CMD_FLG_PROT_REQUIRE;
3622
	}
3868
	}
3623
3869
3624
	if (IEEE80211_IS_MULTICAST(wh->i_addr1) ||
3870
	tx->sta_id = IWM_STATION_ID;
3625
	    type != IEEE80211_FC0_TYPE_DATA)
3626
		tx->sta_id = sc->sc_aux_sta.sta_id;
3627
	else
3628
		tx->sta_id = IWM_STATION_ID;
3629
3871
3630
	if (type == IEEE80211_FC0_TYPE_MGT) {
3872
	if (type == IEEE80211_FC0_TYPE_MGT) {
3631
		uint8_t subtype = wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK;
3873
		uint8_t subtype = wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK;
Lines 3645-3656 iwm_tx(struct iwm_softc *sc, struct mbuf *m, struct ieee80211_node *ni, int ac) Link Here
3645
	if (hdrlen & 3) {
3887
	if (hdrlen & 3) {
3646
		/* First segment length must be a multiple of 4. */
3888
		/* First segment length must be a multiple of 4. */
3647
		flags |= IWM_TX_CMD_FLG_MH_PAD;
3889
		flags |= IWM_TX_CMD_FLG_MH_PAD;
3890
		tx->offload_assist |= htole16(1 << IWM_TX_CMD_OFFLD_PAD);
3648
		pad = 4 - (hdrlen & 3);
3891
		pad = 4 - (hdrlen & 3);
3649
	} else
3892
	} else {
3893
		tx->offload_assist = 0;
3650
		pad = 0;
3894
		pad = 0;
3651
3895
	}
3652
	tx->driver_txop = 0;
3653
	tx->next_frame_len = 0;
3654
3896
3655
	tx->len = htole16(totlen);
3897
	tx->len = htole16(totlen);
3656
	tx->tid_tspec = tid;
3898
	tx->tid_tspec = tid;
Lines 3661-3667 iwm_tx(struct iwm_softc *sc, struct mbuf *m, struct ieee80211_node *ni, int ac) Link Here
3661
	tx->dram_msb_ptr = iwm_get_dma_hi_addr(data->scratch_paddr);
3903
	tx->dram_msb_ptr = iwm_get_dma_hi_addr(data->scratch_paddr);
3662
3904
3663
	/* Copy 802.11 header in TX command. */
3905
	/* Copy 802.11 header in TX command. */
3664
	memcpy(((uint8_t *)tx) + sizeof(*tx), wh, hdrlen);
3906
	memcpy((uint8_t *)tx + sizeof(*tx), wh, hdrlen);
3665
3907
3666
	flags |= IWM_TX_CMD_FLG_BT_DIS | IWM_TX_CMD_FLG_SEQ_CTL;
3908
	flags |= IWM_TX_CMD_FLG_BT_DIS | IWM_TX_CMD_FLG_SEQ_CTL;
3667
3909
Lines 3715-3737 iwm_tx(struct iwm_softc *sc, struct mbuf *m, struct ieee80211_node *ni, int ac) Link Here
3715
	    );
3957
	    );
3716
3958
3717
	/* Fill TX descriptor. */
3959
	/* Fill TX descriptor. */
3960
	memset(desc, 0, sizeof(*desc));
3718
	desc->num_tbs = 2 + nsegs;
3961
	desc->num_tbs = 2 + nsegs;
3719
3962
3720
	desc->tbs[0].lo = htole32(data->cmd_paddr);
3963
	desc->tbs[0].lo = htole32(data->cmd_paddr);
3721
	desc->tbs[0].hi_n_len = htole16(iwm_get_dma_hi_addr(data->cmd_paddr)) |
3964
	desc->tbs[0].hi_n_len = htole16(iwm_get_dma_hi_addr(data->cmd_paddr) |
3722
	    (TB0_SIZE << 4);
3965
	    (TB0_SIZE << 4));
3723
	desc->tbs[1].lo = htole32(data->cmd_paddr + TB0_SIZE);
3966
	desc->tbs[1].lo = htole32(data->cmd_paddr + TB0_SIZE);
3724
	desc->tbs[1].hi_n_len = htole16(iwm_get_dma_hi_addr(data->cmd_paddr)) |
3967
	desc->tbs[1].hi_n_len = htole16(iwm_get_dma_hi_addr(data->cmd_paddr) |
3725
	    ((sizeof(struct iwm_cmd_header) + sizeof(*tx)
3968
	    ((sizeof(struct iwm_cmd_header) + sizeof(*tx) +
3726
	      + hdrlen + pad - TB0_SIZE) << 4);
3969
	    hdrlen + pad - TB0_SIZE) << 4));
3727
3970
3728
	/* Other DMA segments are for data payload. */
3971
	/* Other DMA segments are for data payload. */
3729
	for (i = 0; i < nsegs; i++) {
3972
	for (i = 0; i < nsegs; i++) {
3730
		seg = &segs[i];
3973
		seg = &segs[i];
3731
		desc->tbs[i+2].lo = htole32(seg->ds_addr);
3974
		desc->tbs[i + 2].lo = htole32(seg->ds_addr);
3732
		desc->tbs[i+2].hi_n_len = \
3975
		desc->tbs[i + 2].hi_n_len =
3733
		    htole16(iwm_get_dma_hi_addr(seg->ds_addr))
3976
		    htole16(iwm_get_dma_hi_addr(seg->ds_addr)) |
3734
		    | ((seg->ds_len) << 4);
3977
		    (seg->ds_len << 4);
3735
	}
3978
	}
3736
3979
3737
	bus_dmamap_sync(ring->data_dmat, data->map,
3980
	bus_dmamap_sync(ring->data_dmat, data->map,
Lines 4444-4451 static boolean_t Link Here
4444
iwm_mvm_is_lar_supported(struct iwm_softc *sc)
4687
iwm_mvm_is_lar_supported(struct iwm_softc *sc)
4445
{
4688
{
4446
	boolean_t nvm_lar = sc->nvm_data->lar_enabled;
4689
	boolean_t nvm_lar = sc->nvm_data->lar_enabled;
4447
	boolean_t tlv_lar = fw_has_capa(&sc->sc_fw.ucode_capa,
4690
	boolean_t tlv_lar = iwm_fw_has_capa(sc, IWM_UCODE_TLV_CAPA_LAR_SUPPORT);
4448
					IWM_UCODE_TLV_CAPA_LAR_SUPPORT);
4449
4691
4450
	if (iwm_lar_disable)
4692
	if (iwm_lar_disable)
4451
		return FALSE;
4693
		return FALSE;
Lines 4454-4460 iwm_mvm_is_lar_supported(struct iwm_softc *sc) Link Here
4454
	 * Enable LAR only if it is supported by the FW (TLV) &&
4696
	 * Enable LAR only if it is supported by the FW (TLV) &&
4455
	 * enabled in the NVM
4697
	 * enabled in the NVM
4456
	 */
4698
	 */
4457
	if (sc->cfg->device_family == IWM_DEVICE_FAMILY_8000)
4699
	if (sc->cfg->device_family >= IWM_DEVICE_FAMILY_8000)
4458
		return nvm_lar && tlv_lar;
4700
		return nvm_lar && tlv_lar;
4459
	else
4701
	else
4460
		return tlv_lar;
4702
		return tlv_lar;
Lines 4463-4472 iwm_mvm_is_lar_supported(struct iwm_softc *sc) Link Here
4463
static boolean_t
4705
static boolean_t
4464
iwm_mvm_is_wifi_mcc_supported(struct iwm_softc *sc)
4706
iwm_mvm_is_wifi_mcc_supported(struct iwm_softc *sc)
4465
{
4707
{
4466
	return fw_has_api(&sc->sc_fw.ucode_capa,
4708
	return iwm_fw_has_api(sc, IWM_UCODE_TLV_API_WIFI_MCC_UPDATE) ||
4467
			  IWM_UCODE_TLV_API_WIFI_MCC_UPDATE) ||
4709
	    iwm_fw_has_capa(sc, IWM_UCODE_TLV_CAPA_LAR_MULTI_MCC);
4468
	       fw_has_capa(&sc->sc_fw.ucode_capa,
4469
			   IWM_UCODE_TLV_CAPA_LAR_MULTI_MCC);
4470
}
4710
}
4471
4711
4472
static int
4712
static int
Lines 4486-4493 iwm_send_update_mcc_cmd(struct iwm_softc *sc, const char *alpha2) Link Here
4486
	int n_channels;
4726
	int n_channels;
4487
	uint16_t mcc;
4727
	uint16_t mcc;
4488
#endif
4728
#endif
4489
	int resp_v2 = fw_has_capa(&sc->sc_fw.ucode_capa,
4729
	int resp_v2 = iwm_fw_has_capa(sc, IWM_UCODE_TLV_CAPA_LAR_SUPPORT_V2);
4490
	    IWM_UCODE_TLV_CAPA_LAR_SUPPORT_V2);
4491
4730
4492
	if (!iwm_mvm_is_lar_supported(sc)) {
4731
	if (!iwm_mvm_is_lar_supported(sc)) {
4493
		IWM_DPRINTF(sc, IWM_DEBUG_LAR, "%s: no LAR support\n",
4732
		IWM_DPRINTF(sc, IWM_DEBUG_LAR, "%s: no LAR support\n",
Lines 4648-4654 iwm_init_hw(struct iwm_softc *sc) Link Here
4648
	if ((error = iwm_send_update_mcc_cmd(sc, "ZZ")) != 0)
4887
	if ((error = iwm_send_update_mcc_cmd(sc, "ZZ")) != 0)
4649
		goto error;
4888
		goto error;
4650
4889
4651
	if (fw_has_capa(&sc->sc_fw.ucode_capa, IWM_UCODE_TLV_CAPA_UMAC_SCAN)) {
4890
	if (iwm_fw_has_capa(sc, IWM_UCODE_TLV_CAPA_UMAC_SCAN)) {
4652
		if ((error = iwm_mvm_config_umac_scan(sc)) != 0)
4891
		if ((error = iwm_mvm_config_umac_scan(sc)) != 0)
4653
			goto error;
4892
			goto error;
4654
	}
4893
	}
Lines 5148-5154 iwm_handle_rxb(struct iwm_softc *sc, struct mbuf *m) Link Here
5148
			     nextpkt->hdr.idx == 0) ||
5387
			     nextpkt->hdr.idx == 0) ||
5149
			    (nextpkt->len_n_flags ==
5388
			    (nextpkt->len_n_flags ==
5150
			     htole32(IWM_FH_RSCSR_FRAME_INVALID))) {
5389
			     htole32(IWM_FH_RSCSR_FRAME_INVALID))) {
5151
				if (iwm_mvm_rx_rx_mpdu(sc, m, offset, stolen)) {
5390
				if (iwm_mvm_rx_mpdu(sc, m, offset, stolen)) {
5152
					stolen = FALSE;
5391
					stolen = FALSE;
5153
					/* Make sure we abort the loop */
5392
					/* Make sure we abort the loop */
5154
					nextoff = maxoff;
5393
					nextoff = maxoff;
Lines 5159-5172 iwm_handle_rxb(struct iwm_softc *sc, struct mbuf *m) Link Here
5159
			/*
5398
			/*
5160
			 * Use m_copym instead of m_split, because that
5399
			 * Use m_copym instead of m_split, because that
5161
			 * makes it easier to keep a valid rx buffer in
5400
			 * makes it easier to keep a valid rx buffer in
5162
			 * the ring, when iwm_mvm_rx_rx_mpdu() fails.
5401
			 * the ring, when iwm_mvm_rx_mpdu() fails.
5163
			 *
5402
			 *
5164
			 * We need to start m_copym() at offset 0, to get the
5403
			 * We need to start m_copym() at offset 0, to get the
5165
			 * M_PKTHDR flag preserved.
5404
			 * M_PKTHDR flag preserved.
5166
			 */
5405
			 */
5167
			m1 = m_copym(m, 0, M_COPYALL, M_NOWAIT);
5406
			m1 = m_copym(m, 0, M_COPYALL, M_NOWAIT);
5168
			if (m1) {
5407
			if (m1) {
5169
				if (iwm_mvm_rx_rx_mpdu(sc, m1, offset, stolen))
5408
				if (iwm_mvm_rx_mpdu(sc, m1, offset, stolen))
5170
					stolen = TRUE;
5409
					stolen = TRUE;
5171
				else
5410
				else
5172
					m_freem(m1);
5411
					m_freem(m1);
Lines 5415-5425 iwm_handle_rxb(struct iwm_softc *sc, struct mbuf *m) Link Here
5415
static void
5654
static void
5416
iwm_notif_intr(struct iwm_softc *sc)
5655
iwm_notif_intr(struct iwm_softc *sc)
5417
{
5656
{
5657
	int count;
5658
	uint32_t wreg;
5418
	uint16_t hw;
5659
	uint16_t hw;
5419
5660
5420
	bus_dmamap_sync(sc->rxq.stat_dma.tag, sc->rxq.stat_dma.map,
5661
	bus_dmamap_sync(sc->rxq.stat_dma.tag, sc->rxq.stat_dma.map,
5421
	    BUS_DMASYNC_POSTREAD);
5662
	    BUS_DMASYNC_POSTREAD);
5422
5663
5664
	if (sc->cfg->mqrx_supported) {
5665
		count = IWM_RX_MQ_RING_COUNT;
5666
		wreg = IWM_RFH_Q0_FRBDCB_WIDX_TRG;
5667
	} else {
5668
		count = IWM_RX_LEGACY_RING_COUNT;
5669
		wreg = IWM_FH_RSCSR_CHNL0_WPTR;
5670
	}
5671
5423
	hw = le16toh(sc->rxq.stat->closed_rb_num) & 0xfff;
5672
	hw = le16toh(sc->rxq.stat->closed_rb_num) & 0xfff;
5424
5673
5425
	/*
5674
	/*
Lines 5436-5442 iwm_notif_intr(struct iwm_softc *sc) Link Here
5436
		    "%s: hw = %d cur = %d\n", __func__, hw, ring->cur);
5685
		    "%s: hw = %d cur = %d\n", __func__, hw, ring->cur);
5437
		iwm_handle_rxb(sc, data->m);
5686
		iwm_handle_rxb(sc, data->m);
5438
5687
5439
		ring->cur = (ring->cur + 1) % IWM_RX_RING_COUNT;
5688
		ring->cur = (ring->cur + 1) % count;
5440
	}
5689
	}
5441
5690
5442
	/*
5691
	/*
Lines 5445-5452 iwm_notif_intr(struct iwm_softc *sc) Link Here
5445
	 * Seems like the hardware gets upset unless we align
5694
	 * Seems like the hardware gets upset unless we align
5446
	 * the write by 8??
5695
	 * the write by 8??
5447
	 */
5696
	 */
5448
	hw = (hw == 0) ? IWM_RX_RING_COUNT - 1 : hw - 1;
5697
	hw = (hw == 0) ? count - 1 : hw - 1;
5449
	IWM_WRITE(sc, IWM_FH_RSCSR_CHNL0_WPTR, rounddown2(hw, 8));
5698
	IWM_WRITE(sc, wreg, rounddown2(hw, 8));
5450
}
5699
}
5451
5700
5452
static void
5701
static void
Lines 5621-5626 iwm_intr(void *arg) Link Here
5621
#define	PCI_PRODUCT_INTEL_WL_8260_1	0x24f3
5870
#define	PCI_PRODUCT_INTEL_WL_8260_1	0x24f3
5622
#define	PCI_PRODUCT_INTEL_WL_8260_2	0x24f4
5871
#define	PCI_PRODUCT_INTEL_WL_8260_2	0x24f4
5623
#define	PCI_PRODUCT_INTEL_WL_8265_1	0x24fd
5872
#define	PCI_PRODUCT_INTEL_WL_8265_1	0x24fd
5873
#define	PCI_PRODUCT_INTEL_WL_9560_1	0x9df0
5874
#define	PCI_PRODUCT_INTEL_WL_9260_1	0x2526
5624
5875
5625
static const struct iwm_devices {
5876
static const struct iwm_devices {
5626
	uint16_t		device;
5877
	uint16_t		device;
Lines 5638-5643 static const struct iwm_devices { Link Here
5638
	{ PCI_PRODUCT_INTEL_WL_8260_1, &iwm8260_cfg },
5889
	{ PCI_PRODUCT_INTEL_WL_8260_1, &iwm8260_cfg },
5639
	{ PCI_PRODUCT_INTEL_WL_8260_2, &iwm8260_cfg },
5890
	{ PCI_PRODUCT_INTEL_WL_8260_2, &iwm8260_cfg },
5640
	{ PCI_PRODUCT_INTEL_WL_8265_1, &iwm8265_cfg },
5891
	{ PCI_PRODUCT_INTEL_WL_8265_1, &iwm8265_cfg },
5892
	{ PCI_PRODUCT_INTEL_WL_9560_1, &iwm9560_cfg },
5893
	{ PCI_PRODUCT_INTEL_WL_9260_1, &iwm9260_cfg },
5641
};
5894
};
5642
5895
5643
static int
5896
static int
Lines 5749-5756 iwm_pci_detach(device_t dev) Link Here
5749
		    rman_get_rid(sc->sc_mem), sc->sc_mem);
6002
		    rman_get_rid(sc->sc_mem), sc->sc_mem);
5750
}
6003
}
5751
6004
5752
5753
5754
static int
6005
static int
5755
iwm_attach(device_t dev)
6006
iwm_attach(device_t dev)
5756
{
6007
{
Lines 5761-5772 iwm_attach(device_t dev) Link Here
5761
6012
5762
	sc->sc_dev = dev;
6013
	sc->sc_dev = dev;
5763
	sc->sc_attached = 1;
6014
	sc->sc_attached = 1;
6015
        sc->sc_debug = (sc->sc_debug | IWM_DEBUG_ANY);
5764
	IWM_LOCK_INIT(sc);
6016
	IWM_LOCK_INIT(sc);
5765
	mbufq_init(&sc->sc_snd, ifqmaxlen);
6017
	mbufq_init(&sc->sc_snd, ifqmaxlen);
5766
	callout_init_mtx(&sc->sc_watchdog_to, &sc->sc_mtx, 0);
6018
	callout_init_mtx(&sc->sc_watchdog_to, &sc->sc_mtx, 0);
5767
	callout_init_mtx(&sc->sc_led_blink_to, &sc->sc_mtx, 0);
6019
	callout_init_mtx(&sc->sc_led_blink_to, &sc->sc_mtx, 0);
5768
	TASK_INIT(&sc->sc_es_task, 0, iwm_endscan_cb, sc);
6020
	TASK_INIT(&sc->sc_es_task, 0, iwm_endscan_cb, sc);
5769
6021
6022
	error = iwm_dev_check(dev);
6023
	if (error != 0)
6024
		goto fail;
6025
5770
	sc->sc_notif_wait = iwm_notification_wait_init(sc);
6026
	sc->sc_notif_wait = iwm_notification_wait_init(sc);
5771
	if (sc->sc_notif_wait == NULL) {
6027
	if (sc->sc_notif_wait == NULL) {
5772
		device_printf(dev, "failed to init notification wait struct\n");
6028
		device_printf(dev, "failed to init notification wait struct\n");
Lines 5792-5802 iwm_attach(device_t dev) Link Here
5792
6048
5793
	sc->sc_wantresp = -1;
6049
	sc->sc_wantresp = -1;
5794
6050
5795
	/* Match device id */
5796
	error = iwm_dev_check(dev);
5797
	if (error != 0)
5798
		goto fail;
5799
5800
	sc->sc_hw_rev = IWM_READ(sc, IWM_CSR_HW_REV);
6051
	sc->sc_hw_rev = IWM_READ(sc, IWM_CSR_HW_REV);
5801
	/*
6052
	/*
5802
	 * In the 8000 HW family the format of the 4 bytes of CSR_HW_REV have
6053
	 * In the 8000 HW family the format of the 4 bytes of CSR_HW_REV have
Lines 5804-5810 iwm_attach(device_t dev) Link Here
5804
	 * "dash" value). To keep hw_rev backwards compatible - we'll store it
6055
	 * "dash" value). To keep hw_rev backwards compatible - we'll store it
5805
	 * in the old format.
6056
	 * in the old format.
5806
	 */
6057
	 */
5807
	if (sc->cfg->device_family == IWM_DEVICE_FAMILY_8000) {
6058
	if (sc->cfg->device_family >= IWM_DEVICE_FAMILY_8000) {
5808
		int ret;
6059
		int ret;
5809
		uint32_t hw_step;
6060
		uint32_t hw_step;
5810
6061
Lines 6185-6191 iwm_scan_start(struct ieee80211com *ic) Link Here
6185
		device_printf(sc->sc_dev,
6436
		device_printf(sc->sc_dev,
6186
		    "%s: Previous scan not completed yet\n", __func__);
6437
		    "%s: Previous scan not completed yet\n", __func__);
6187
	}
6438
	}
6188
	if (fw_has_capa(&sc->sc_fw.ucode_capa, IWM_UCODE_TLV_CAPA_UMAC_SCAN))
6439
	if (iwm_fw_has_capa(sc, IWM_UCODE_TLV_CAPA_UMAC_SCAN))
6189
		error = iwm_mvm_umac_scan(sc);
6440
		error = iwm_mvm_umac_scan(sc);
6190
	else
6441
	else
6191
		error = iwm_mvm_lmac_scan(sc);
6442
		error = iwm_mvm_lmac_scan(sc);
(-)b/sys/dev/iwm/if_iwm_9000.c (+97 lines)
Added Link Here
1
/*-
2
 * Based on BSD-licensed source modules in the Linux iwlwifi driver,
3
 * which were used as the reference documentation for this implementation.
4
 *
5
 ******************************************************************************
6
 *
7
 * This file is provided under a dual BSD/GPLv2 license.  When using or
8
 * redistributing this file, you may do so under either license.
9
 *
10
 * GPL LICENSE SUMMARY
11
 *
12
 * Copyright(c) 2014 Intel Corporation. All rights reserved.
13
 * Copyright(c) 2014 - 2015 Intel Mobile Communications GmbH
14
 * Copyright(c) 2016 Intel Deutschland GmbH
15
 *
16
 * This program is free software; you can redistribute it and/or modify
17
 * it under the terms of version 2 of the GNU General Public License as
18
 * published by the Free Software Foundation.
19
 *
20
 * This program is distributed in the hope that it will be useful, but
21
 * WITHOUT ANY WARRANTY; without even the implied warranty of
22
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
23
 * General Public License for more details.
24
 *
25
 * You should have received a copy of the GNU General Public License
26
 * along with this program; if not, write to the Free Software
27
 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
28
 * USA
29
 *
30
 * The full GNU General Public License is included in this distribution
31
 * in the file called COPYING.
32
 *
33
 * Contact Information:
34
 *  Intel Linux Wireless <linuxwifi@intel.com>
35
 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
36
 *
37
 * BSD LICENSE
38
 *
39
 * Copyright(c) 2014 Intel Corporation. All rights reserved.
40
 * Copyright(c) 2014 - 2015 Intel Mobile Communications GmbH
41
 * All rights reserved.
42
 *
43
 * Redistribution and use in source and binary forms, with or without
44
 * modification, are permitted provided that the following conditions
45
 * are met:
46
 *
47
 *  * Redistributions of source code must retain the above copyright
48
 *    notice, this list of conditions and the following disclaimer.
49
 *  * Redistributions in binary form must reproduce the above copyright
50
 *    notice, this list of conditions and the following disclaimer in
51
 *    the documentation and/or other materials provided with the
52
 *    distribution.
53
 *  * Neither the name Intel Corporation nor the names of its
54
 *    contributors may be used to endorse or promote products derived
55
 *    from this software without specific prior written permission.
56
 *
57
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
58
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
59
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
60
 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
61
 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
62
 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
63
 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
64
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
65
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
66
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
67
 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
68
 *
69
 *****************************************************************************/
70
71
#include <sys/cdefs.h>
72
__FBSDID("$FreeBSD$");
73
74
#include "opt_wlan.h"
75
#include "opt_iwm.h"
76
77
#include <sys/param.h>
78
79
#include "if_iwm_config.h"
80
81
#define IWM9000_FW	"iwm9000fw"
82
83
#define IWM_NVM_HW_SECTION_NUM_FAMILY_9000	10
84
85
#define IWM_DEVICE_9000_COMMON						\
86
	.device_family = IWM_DEVICE_FAMILY_9000,			\
87
	.eeprom_size = IWM_OTP_LOW_IMAGE_SIZE_FAMILY_9000,		\
88
	.nvm_hw_section_num = IWM_NVM_HW_SECTION_NUM_FAMILY_9000
89
90
const struct iwm_cfg iwm9560_cfg = {
91
	.name = "Intel(R) Dual Band Wireless AC 9560",
92
	.fw_name = IWM9000_FW,
93
	IWM_DEVICE_9000_COMMON,
94
	.host_interrupt_operation_mode = 0,
95
	.mqrx_supported = 1,
96
	.integrated = 1,
97
};
(-)b/sys/dev/iwm/if_iwm_9260.c (+96 lines)
Added Link Here
1
/*-
2
 * Based on BSD-licensed source modules in the Linux iwlwifi driver,
3
 * which were used as the reference documentation for this implementation.
4
 *
5
 ******************************************************************************
6
 *
7
 * This file is provided under a dual BSD/GPLv2 license.  When using or
8
 * redistributing this file, you may do so under either license.
9
 *
10
 * GPL LICENSE SUMMARY
11
 *
12
 * Copyright(c) 2014 Intel Corporation. All rights reserved.
13
 * Copyright(c) 2014 - 2015 Intel Mobile Communications GmbH
14
 * Copyright(c) 2016 Intel Deutschland GmbH
15
 *
16
 * This program is free software; you can redistribute it and/or modify
17
 * it under the terms of version 2 of the GNU General Public License as
18
 * published by the Free Software Foundation.
19
 *
20
 * This program is distributed in the hope that it will be useful, but
21
 * WITHOUT ANY WARRANTY; without even the implied warranty of
22
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
23
 * General Public License for more details.
24
 *
25
 * You should have received a copy of the GNU General Public License
26
 * along with this program; if not, write to the Free Software
27
 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
28
 * USA
29
 *
30
 * The full GNU General Public License is included in this distribution
31
 * in the file called COPYING.
32
 *
33
 * Contact Information:
34
 *  Intel Linux Wireless <linuxwifi@intel.com>
35
 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
36
 *
37
 * BSD LICENSE
38
 *
39
 * Copyright(c) 2014 Intel Corporation. All rights reserved.
40
 * Copyright(c) 2014 - 2015 Intel Mobile Communications GmbH
41
 * All rights reserved.
42
 *
43
 * Redistribution and use in source and binary forms, with or without
44
 * modification, are permitted provided that the following conditions
45
 * are met:
46
 *
47
 *  * Redistributions of source code must retain the above copyright
48
 *    notice, this list of conditions and the following disclaimer.
49
 *  * Redistributions in binary form must reproduce the above copyright
50
 *    notice, this list of conditions and the following disclaimer in
51
 *    the documentation and/or other materials provided with the
52
 *    distribution.
53
 *  * Neither the name Intel Corporation nor the names of its
54
 *    contributors may be used to endorse or promote products derived
55
 *    from this software without specific prior written permission.
56
 *
57
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
58
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
59
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
60
 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
61
 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
62
 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
63
 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
64
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
65
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
66
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
67
 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
68
 *
69
 *****************************************************************************/
70
71
#include <sys/cdefs.h>
72
__FBSDID("$FreeBSD$");
73
74
#include "opt_wlan.h"
75
#include "opt_iwm.h"
76
77
#include <sys/param.h>
78
79
#include "if_iwm_config.h"
80
81
#define IWM9260_FW	"iwm9260fw"
82
83
#define IWM_NVM_HW_SECTION_NUM_FAMILY_9260	10
84
85
#define IWM_DEVICE_9260_COMMON						\
86
	.device_family = IWM_DEVICE_FAMILY_9000,			\
87
	.eeprom_size = IWM_OTP_LOW_IMAGE_SIZE_FAMILY_9000,		\
88
	.nvm_hw_section_num = IWM_NVM_HW_SECTION_NUM_FAMILY_9260
89
90
const struct iwm_cfg iwm9260_cfg = {
91
	.name = "Intel(R) Dual Band Wireless AC 9260",
92
	.fw_name = IWM9260_FW,
93
	IWM_DEVICE_9260_COMMON,
94
	.host_interrupt_operation_mode = 0,
95
	.mqrx_supported = 1,
96
};
(-)b/sys/dev/iwm/if_iwm_config.h (-7 / +12 lines)
Lines 78-83 enum iwm_device_family { Link Here
78
	IWM_DEVICE_FAMILY_UNDEFINED,
78
	IWM_DEVICE_FAMILY_UNDEFINED,
79
	IWM_DEVICE_FAMILY_7000,
79
	IWM_DEVICE_FAMILY_7000,
80
	IWM_DEVICE_FAMILY_8000,
80
	IWM_DEVICE_FAMILY_8000,
81
	IWM_DEVICE_FAMILY_9000,
81
};
82
};
82
83
83
#define IWM_DEFAULT_MAX_TX_POWER	22
84
#define IWM_DEFAULT_MAX_TX_POWER	22
Lines 130-142 enum iwm_nvm_type { Link Here
130
 */
131
 */
131
struct iwm_cfg {
132
struct iwm_cfg {
132
	const char *name;
133
	const char *name;
133
        const char *fw_name;
134
	const char *fw_name;
134
        uint16_t eeprom_size;
135
	uint16_t eeprom_size;
135
        enum iwm_device_family device_family;
136
	enum iwm_device_family device_family;
136
        int host_interrupt_operation_mode;
137
	int host_interrupt_operation_mode;
137
        uint8_t nvm_hw_section_num;
138
	int mqrx_supported;
138
        int apmg_wake_up_wa;
139
	int integrated;
139
        enum iwm_nvm_type nvm_type;
140
	uint8_t nvm_hw_section_num;
141
	int apmg_wake_up_wa;
142
	enum iwm_nvm_type nvm_type;
140
};
143
};
141
144
142
/*
145
/*
Lines 150-154 extern const struct iwm_cfg iwm7265_cfg; Link Here
150
extern const struct iwm_cfg iwm7265d_cfg;
153
extern const struct iwm_cfg iwm7265d_cfg;
151
extern const struct iwm_cfg iwm8260_cfg;
154
extern const struct iwm_cfg iwm8260_cfg;
152
extern const struct iwm_cfg iwm8265_cfg;
155
extern const struct iwm_cfg iwm8265_cfg;
156
extern const struct iwm_cfg iwm9560_cfg;
157
extern const struct iwm_cfg iwm9260_cfg;
153
158
154
#endif /* __IWM_CONFIG_H__ */
159
#endif /* __IWM_CONFIG_H__ */
(-)b/sys/dev/iwm/if_iwm_pcie_trans.c (-10 / +65 lines)
Lines 185-190 iwm_write_prph(struct iwm_softc *sc, uint32_t addr, uint32_t val) Link Here
185
	IWM_WRITE(sc, IWM_HBUS_TARG_PRPH_WDAT, val);
185
	IWM_WRITE(sc, IWM_HBUS_TARG_PRPH_WDAT, val);
186
}
186
}
187
187
188
void
189
iwm_write_prph64(struct iwm_softc *sc, uint64_t addr, uint64_t val)
190
{
191
	iwm_write_prph(sc, (uint32_t)addr, val & 0xffffffff);
192
	iwm_write_prph(sc, (uint32_t)addr + 4, val >> 32);
193
}
194
195
int
196
iwm_poll_prph(struct iwm_softc *sc, uint32_t addr, uint32_t bits, uint32_t mask,
197
    int timeout)
198
{
199
	do {
200
		if ((iwm_read_prph(sc, addr) & mask) == (bits & mask))
201
			return (0);
202
		DELAY(10);
203
		timeout -= 10;
204
	} while (timeout > 0);
205
206
	return (ETIMEDOUT);
207
}
208
188
#ifdef IWM_DEBUG
209
#ifdef IWM_DEBUG
189
/* iwlwifi: pcie/trans.c */
210
/* iwlwifi: pcie/trans.c */
190
int
211
int
Lines 261-267 iwm_nic_lock(struct iwm_softc *sc) Link Here
261
	IWM_SETBITS(sc, IWM_CSR_GP_CNTRL,
282
	IWM_SETBITS(sc, IWM_CSR_GP_CNTRL,
262
	    IWM_CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
283
	    IWM_CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
263
284
264
	if (sc->cfg->device_family == IWM_DEVICE_FAMILY_8000)
285
	if (sc->cfg->device_family >= IWM_DEVICE_FAMILY_8000)
265
		DELAY(2);
286
		DELAY(2);
266
287
267
	if (iwm_poll_bit(sc, IWM_CSR_GP_CNTRL,
288
	if (iwm_poll_bit(sc, IWM_CSR_GP_CNTRL,
Lines 325-330 iwm_enable_rfkill_int(struct iwm_softc *sc) Link Here
325
{
346
{
326
	sc->sc_intmask = IWM_CSR_INT_BIT_RF_KILL;
347
	sc->sc_intmask = IWM_CSR_INT_BIT_RF_KILL;
327
	IWM_WRITE(sc, IWM_CSR_INT_MASK, sc->sc_intmask);
348
	IWM_WRITE(sc, IWM_CSR_INT_MASK, sc->sc_intmask);
349
	IWM_SETBITS(sc, IWM_CSR_GP_CNTRL,
350
	    IWM_CSR_GP_CNTRL_REG_FLAG_RFKILL_WAKE_L1A_EN);
328
}
351
}
329
352
330
int
353
int
Lines 383-389 iwm_prepare_card_hw(struct iwm_softc *sc) Link Here
383
	if (iwm_set_hw_ready(sc))
406
	if (iwm_set_hw_ready(sc))
384
		goto out;
407
		goto out;
385
408
386
	DELAY(100);
409
	IWM_SETBITS(sc, IWM_CSR_DBG_LINK_PWR_MGMT_REG,
410
	    IWM_CSR_RESET_LINK_PWR_MGMT_DISABLED);
411
	DELAY(1000);
387
412
388
	/* If HW is not ready, prepare the conditions to check again */
413
	/* If HW is not ready, prepare the conditions to check again */
389
	IWM_SETBITS(sc, IWM_CSR_HW_IF_CONFIG_REG,
414
	IWM_SETBITS(sc, IWM_CSR_HW_IF_CONFIG_REG,
Lines 454-460 iwm_apm_init(struct iwm_softc *sc) Link Here
454
	IWM_DPRINTF(sc, IWM_DEBUG_RESET, "iwm apm start\n");
479
	IWM_DPRINTF(sc, IWM_DEBUG_RESET, "iwm apm start\n");
455
480
456
	/* Disable L0S exit timer (platform NMI Work/Around) */
481
	/* Disable L0S exit timer (platform NMI Work/Around) */
457
	if (sc->cfg->device_family != IWM_DEVICE_FAMILY_8000) {
482
	if (sc->cfg->device_family < IWM_DEVICE_FAMILY_8000) {
458
		IWM_SETBITS(sc, IWM_CSR_GIO_CHICKEN_BITS,
483
		IWM_SETBITS(sc, IWM_CSR_GIO_CHICKEN_BITS,
459
		    IWM_CSR_GIO_CHICKEN_BITS_REG_BIT_DIS_L0S_EXIT_TIMER);
484
		    IWM_CSR_GIO_CHICKEN_BITS_REG_BIT_DIS_L0S_EXIT_TIMER);
460
	}
485
	}
Lines 569-574 iwm_apm_init(struct iwm_softc *sc) Link Here
569
void
594
void
570
iwm_apm_stop(struct iwm_softc *sc)
595
iwm_apm_stop(struct iwm_softc *sc)
571
{
596
{
597
	IWM_SETBITS(sc, IWM_CSR_DBG_LINK_PWR_MGMT_REG,
598
	    IWM_CSR_RESET_LINK_PWR_MGMT_DISABLED);
599
	IWM_SETBITS(sc, IWM_CSR_HW_IF_CONFIG_REG,
600
	    IWM_CSR_HW_IF_CONFIG_REG_PREPARE |
601
	    IWM_CSR_HW_IF_CONFIG_REG_ENABLE_PME);
602
	DELAY(1000);
603
	IWM_CLRBITS(sc, IWM_CSR_DBG_LINK_PWR_MGMT_REG,
604
	    IWM_CSR_RESET_LINK_PWR_MGMT_DISABLED);
605
	DELAY(5000);
606
572
	/* stop device's busmaster DMA activity */
607
	/* stop device's busmaster DMA activity */
573
	IWM_SETBITS(sc, IWM_CSR_RESET, IWM_CSR_RESET_REG_FLAG_STOP_MASTER);
608
	IWM_SETBITS(sc, IWM_CSR_RESET, IWM_CSR_RESET_REG_FLAG_STOP_MASTER);
574
609
Lines 576-581 iwm_apm_stop(struct iwm_softc *sc) Link Here
576
	    IWM_CSR_RESET_REG_FLAG_MASTER_DISABLED,
611
	    IWM_CSR_RESET_REG_FLAG_MASTER_DISABLED,
577
	    IWM_CSR_RESET_REG_FLAG_MASTER_DISABLED, 100))
612
	    IWM_CSR_RESET_REG_FLAG_MASTER_DISABLED, 100))
578
		device_printf(sc->sc_dev, "timeout waiting for master\n");
613
		device_printf(sc->sc_dev, "timeout waiting for master\n");
614
615
	/*
616
	 * Clear "initialization complete" bit to move adapter from
617
	 * D0A* (powered-up Active) --> D0U* (Uninitialized) state.
618
	 */
619
	IWM_CLRBITS(sc, IWM_CSR_GP_CNTRL,
620
	    IWM_CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
621
579
	IWM_DPRINTF(sc, IWM_DEBUG_TRANS, "%s: iwm apm stop\n", __func__);
622
	IWM_DPRINTF(sc, IWM_DEBUG_TRANS, "%s: iwm apm stop\n", __func__);
580
}
623
}
581
624
Lines 590-600 iwm_start_hw(struct iwm_softc *sc) Link Here
590
633
591
	/* Reset the entire device */
634
	/* Reset the entire device */
592
	IWM_WRITE(sc, IWM_CSR_RESET, IWM_CSR_RESET_REG_FLAG_SW_RESET);
635
	IWM_WRITE(sc, IWM_CSR_RESET, IWM_CSR_RESET_REG_FLAG_SW_RESET);
593
	DELAY(10);
636
	DELAY(5000);
594
637
595
	if ((error = iwm_apm_init(sc)) != 0)
638
	if ((error = iwm_apm_init(sc)) != 0)
596
		return error;
639
		return error;
597
640
641
	/* On newer chipsets MSI is disabled by default. */
642
	if (sc->cfg->mqrx_supported)
643
		iwm_write_prph(sc, IWM_UREG_CHICK, IWM_UREG_CHICK_MSI_ENABLE);
644
598
	iwm_enable_rfkill_int(sc);
645
	iwm_enable_rfkill_int(sc);
599
	iwm_check_rfkill(sc);
646
	iwm_check_rfkill(sc);
600
647
Lines 613-625 iwm_set_pwr(struct iwm_softc *sc) Link Here
613
int
660
int
614
iwm_pcie_rx_stop(struct iwm_softc *sc)
661
iwm_pcie_rx_stop(struct iwm_softc *sc)
615
{
662
{
616
	int ret = 0;
663
	int ret;
664
665
	ret = 0;
617
	if (iwm_nic_lock(sc)) {
666
	if (iwm_nic_lock(sc)) {
618
		IWM_WRITE(sc, IWM_FH_MEM_RCSR_CHNL0_CONFIG_REG, 0);
667
		if (sc->cfg->mqrx_supported) {
619
		ret = iwm_poll_bit(sc, IWM_FH_MEM_RSSR_RX_STATUS_REG,
668
			iwm_write_prph(sc, IWM_RFH_RXF_DMA_CFG, 0);
620
		    IWM_FH_RSSR_CHNL0_RX_STATUS_CHNL_IDLE,
669
			ret = iwm_poll_prph(sc, IWM_RFH_GEN_STATUS,
621
		    IWM_FH_RSSR_CHNL0_RX_STATUS_CHNL_IDLE,
670
			    IWM_RXF_DMA_IDLE, IWM_RXF_DMA_IDLE, 1000);
622
		    1000);
671
		} else {
672
			IWM_WRITE(sc, IWM_FH_MEM_RCSR_CHNL0_CONFIG_REG, 0);
673
			ret = iwm_poll_bit(sc, IWM_FH_MEM_RSSR_RX_STATUS_REG,
674
			    IWM_FH_RSSR_CHNL0_RX_STATUS_CHNL_IDLE,
675
			    IWM_FH_RSSR_CHNL0_RX_STATUS_CHNL_IDLE,
676
			    1000);
677
		}
623
		iwm_nic_unlock(sc);
678
		iwm_nic_unlock(sc);
624
	}
679
	}
625
	return ret;
680
	return ret;
(-)b/sys/dev/iwm/if_iwm_pcie_trans.h (+4 lines)
Lines 106-111 Link Here
106
106
107
extern	uint32_t iwm_read_prph(struct iwm_softc *sc, uint32_t addr);
107
extern	uint32_t iwm_read_prph(struct iwm_softc *sc, uint32_t addr);
108
extern	void iwm_write_prph(struct iwm_softc *sc, uint32_t addr, uint32_t val);
108
extern	void iwm_write_prph(struct iwm_softc *sc, uint32_t addr, uint32_t val);
109
extern	void iwm_write_prph64(struct iwm_softc *sc, uint64_t addr,
110
    uint64_t val);
111
extern	int iwm_poll_prph(struct iwm_softc *sc, uint32_t addr, uint32_t bits,
112
    uint32_t mask, int timeout);
109
extern	int iwm_read_mem(struct iwm_softc *sc, uint32_t addr, void *buf, int dwords);
113
extern	int iwm_read_mem(struct iwm_softc *sc, uint32_t addr, void *buf, int dwords);
110
extern	int iwm_write_mem(struct iwm_softc *sc, uint32_t addr, const void *buf,
114
extern	int iwm_write_mem(struct iwm_softc *sc, uint32_t addr, const void *buf,
111
		int dwords);
115
		int dwords);
(-)b/sys/dev/iwm/if_iwm_scan.c (-44 / +78 lines)
Lines 215-222 static inline boolean_t Link Here
215
iwm_mvm_rrm_scan_needed(struct iwm_softc *sc)
215
iwm_mvm_rrm_scan_needed(struct iwm_softc *sc)
216
{
216
{
217
	/* require rrm scan whenever the fw supports it */
217
	/* require rrm scan whenever the fw supports it */
218
	return fw_has_capa(&sc->sc_fw.ucode_capa,
218
	return iwm_fw_has_capa(sc, IWM_UCODE_TLV_CAPA_DS_PARAM_SET_IE_SUPPORT);
219
			   IWM_UCODE_TLV_CAPA_DS_PARAM_SET_IE_SUPPORT);
220
}
219
}
221
220
222
#ifdef IWM_DEBUG
221
#ifdef IWM_DEBUG
Lines 251-257 iwm_mvm_rx_lmac_scan_complete_notif(struct iwm_softc *sc, Link Here
251
	/* If this happens, the firmware has mistakenly sent an LMAC
250
	/* If this happens, the firmware has mistakenly sent an LMAC
252
	 * notification during UMAC scans -- warn and ignore it.
251
	 * notification during UMAC scans -- warn and ignore it.
253
	 */
252
	 */
254
	if (fw_has_capa(&sc->sc_fw.ucode_capa, IWM_UCODE_TLV_CAPA_UMAC_SCAN)) {
253
	if (iwm_fw_has_capa(sc, IWM_UCODE_TLV_CAPA_UMAC_SCAN)) {
255
		device_printf(sc->sc_dev,
254
		device_printf(sc->sc_dev,
256
		    "%s: Mistakenly got LMAC notification during UMAC scan\n",
255
		    "%s: Mistakenly got LMAC notification during UMAC scan\n",
257
		    __func__);
256
		    __func__);
Lines 581-586 iwm_mvm_scan_use_ebs(struct iwm_softc *sc) Link Here
581
		sc->last_ebs_successful);
580
		sc->last_ebs_successful);
582
}
581
}
583
582
583
static int
584
iwm_mvm_scan_size(struct iwm_softc *sc)
585
{
586
	int base_size;
587
588
	if (iwm_fw_has_capa(sc, IWM_UCODE_TLV_CAPA_UMAC_SCAN)) {
589
		if (iwm_fw_has_api(sc, IWM_UCODE_TLV_API_ADAPTIVE_DWELL))
590
			base_size = IWM_SCAN_REQ_UMAC_SIZE_V7;
591
		else
592
			base_size = IWM_SCAN_REQ_UMAC_SIZE_V1;
593
594
		return base_size +
595
		    sizeof(struct iwm_scan_channel_cfg_umac) *
596
		    sc->sc_fw.ucode_capa.n_scan_channels +
597
		    sizeof(struct iwm_scan_req_umac_tail);
598
	} else {
599
		return sizeof(struct iwm_scan_req_lmac) +
600
		    sizeof(struct iwm_scan_channel_cfg_lmac) *
601
		    sc->sc_fw.ucode_capa.n_scan_channels +
602
		    sizeof(struct iwm_scan_probe_req);
603
	}
604
}
605
584
int
606
int
585
iwm_mvm_umac_scan(struct iwm_softc *sc)
607
iwm_mvm_umac_scan(struct iwm_softc *sc)
586
{
608
{
Lines 594-606 iwm_mvm_umac_scan(struct iwm_softc *sc) Link Here
594
	struct iwm_scan_req_umac *req;
616
	struct iwm_scan_req_umac *req;
595
	struct iwm_scan_req_umac_tail *tail;
617
	struct iwm_scan_req_umac_tail *tail;
596
	size_t req_len;
618
	size_t req_len;
597
	uint8_t i, nssid;
619
	uint16_t general_flags;
620
	uint8_t channel_flags, i, nssid;
598
	int ret;
621
	int ret;
599
622
600
	req_len = sizeof(struct iwm_scan_req_umac) +
623
	req_len = iwm_mvm_scan_size(sc);
601
	    (sizeof(struct iwm_scan_channel_cfg_umac) *
602
	    sc->sc_fw.ucode_capa.n_scan_channels) +
603
	    sizeof(struct iwm_scan_req_umac_tail);
604
	if (req_len > IWM_MAX_CMD_PAYLOAD_SIZE)
624
	if (req_len > IWM_MAX_CMD_PAYLOAD_SIZE)
605
		return ENOMEM;
625
		return ENOMEM;
606
	req = malloc(req_len, M_DEVBUF, M_NOWAIT | M_ZERO);
626
	req = malloc(req_len, M_DEVBUF, M_NOWAIT | M_ZERO);
Lines 612-639 iwm_mvm_umac_scan(struct iwm_softc *sc) Link Here
612
632
613
	IWM_DPRINTF(sc, IWM_DEBUG_SCAN, "Handling ieee80211 scan request\n");
633
	IWM_DPRINTF(sc, IWM_DEBUG_SCAN, "Handling ieee80211 scan request\n");
614
634
615
	/* These timings correspond to iwlwifi's UNASSOC scan. */
635
	nssid = MIN(ss->ss_nssid, IWM_PROBE_OPTION_MAX);
616
	req->active_dwell = 10;
617
	req->passive_dwell = 110;
618
	req->fragmented_dwell = 44;
619
	req->extended_dwell = 90;
620
	req->max_out_time = 0;
621
	req->suspend_time = 0;
622
636
623
	req->scan_priority = htole32(IWM_SCAN_PRIORITY_HIGH);
637
	general_flags = IWM_UMAC_SCAN_GEN_FLAGS_PASS_ALL |
624
	req->ooc_priority = htole32(IWM_SCAN_PRIORITY_HIGH);
638
	    IWM_UMAC_SCAN_GEN_FLAGS_ITER_COMPLETE;
639
	if (!iwm_fw_has_api(sc, IWM_UCODE_TLV_API_ADAPTIVE_DWELL))
640
		general_flags |= IWM_UMAC_SCAN_GEN_FLAGS_EXTENDED_DWELL;
641
	if (iwm_mvm_rrm_scan_needed(sc))
642
		general_flags |= IWM_UMAC_SCAN_GEN_FLAGS_RRM_ENABLED;
643
	if (nssid != 0)
644
		general_flags |= IWM_UMAC_SCAN_GEN_FLAGS_PRE_CONNECT;
645
	else
646
		general_flags |= IWM_UMAC_SCAN_GEN_FLAGS_PASSIVE;
625
647
626
	nssid = MIN(ss->ss_nssid, IWM_PROBE_OPTION_MAX);
648
	channel_flags = 0;
627
	req->n_channels = iwm_mvm_umac_scan_fill_channels(sc,
649
	if (iwm_mvm_scan_use_ebs(sc))
628
	    (struct iwm_scan_channel_cfg_umac *)req->data, nssid);
650
		channel_flags = IWM_SCAN_CHANNEL_FLAG_EBS |
651
		    IWM_SCAN_CHANNEL_FLAG_EBS_ACCURATE |
652
		    IWM_SCAN_CHANNEL_FLAG_CACHE_ADD;
629
653
630
	req->general_flags = htole32(IWM_UMAC_SCAN_GEN_FLAGS_PASS_ALL |
654
	req->general_flags = htole16(general_flags);
631
	    IWM_UMAC_SCAN_GEN_FLAGS_ITER_COMPLETE |
655
	req->ooc_priority = htole32(IWM_SCAN_PRIORITY_HIGH);
632
	    IWM_UMAC_SCAN_GEN_FLAGS_EXTENDED_DWELL);
633
656
634
	tail = (void *)((char *)&req->data +
657
	/* These timings correspond to iwlwifi's UNASSOC scan. */
635
		sizeof(struct iwm_scan_channel_cfg_umac) *
658
	if (iwm_fw_has_api(sc, IWM_UCODE_TLV_API_ADAPTIVE_DWELL)) {
636
			sc->sc_fw.ucode_capa.n_scan_channels);
659
		req->v7.active_dwell = 10;
660
		req->v7.passive_dwell = 110;
661
		req->v7.fragmented_dwell = 44;
662
		req->v7.adwell_default_n_aps_social = 10;
663
		req->v7.adwell_default_n_aps = 2;
664
		req->v7.adwell_max_budget = htole16(300);
665
		req->v7.scan_priority = htole32(IWM_SCAN_PRIORITY_HIGH);
666
		req->v7.channel.flags = channel_flags;
667
		req->v7.channel.count = iwm_mvm_umac_scan_fill_channels(sc,
668
		    (struct iwm_scan_channel_cfg_umac *)req->v7.data, nssid);
669
670
		tail = (void *)((char *)&req->v7.data +
671
		    sizeof(struct iwm_scan_channel_cfg_umac) *
672
		    sc->sc_fw.ucode_capa.n_scan_channels);
673
	} else {
674
		req->v1.active_dwell = 10;
675
		req->v1.passive_dwell = 110;
676
		req->v1.fragmented_dwell = 44;
677
		req->v1.extended_dwell = 90;
678
		req->v1.scan_priority = htole32(IWM_SCAN_PRIORITY_HIGH);
679
		req->v1.channel.flags = channel_flags;
680
		req->v1.channel.count = iwm_mvm_umac_scan_fill_channels(sc,
681
		    (struct iwm_scan_channel_cfg_umac *)req->v1.data, nssid);
682
683
		tail = (void *)((char *)&req->v1.data +
684
		    sizeof(struct iwm_scan_channel_cfg_umac) *
685
		    sc->sc_fw.ucode_capa.n_scan_channels);
686
	}
637
687
638
	/* Check if we're doing an active directed scan. */
688
	/* Check if we're doing an active directed scan. */
639
	for (i = 0; i < nssid; i++) {
689
	for (i = 0; i < nssid; i++) {
Lines 644-663 iwm_mvm_umac_scan(struct iwm_softc *sc) Link Here
644
		    tail->direct_scan[i].len);
694
		    tail->direct_scan[i].len);
645
		/* XXX debug */
695
		/* XXX debug */
646
	}
696
	}
647
	if (nssid != 0) {
648
		req->general_flags |=
649
		    htole32(IWM_UMAC_SCAN_GEN_FLAGS_PRE_CONNECT);
650
	} else
651
		req->general_flags |= htole32(IWM_UMAC_SCAN_GEN_FLAGS_PASSIVE);
652
653
	if (iwm_mvm_scan_use_ebs(sc))
654
		req->channel_flags = IWM_SCAN_CHANNEL_FLAG_EBS |
655
				     IWM_SCAN_CHANNEL_FLAG_EBS_ACCURATE |
656
				     IWM_SCAN_CHANNEL_FLAG_CACHE_ADD;
657
658
	if (iwm_mvm_rrm_scan_needed(sc))
659
		req->general_flags |=
660
		    htole32(IWM_UMAC_SCAN_GEN_FLAGS_RRM_ENABLED);
661
697
662
	ret = iwm_mvm_fill_probe_req(sc, &tail->preq);
698
	ret = iwm_mvm_fill_probe_req(sc, &tail->preq);
663
	if (ret) {
699
	if (ret) {
Lines 695-703 iwm_mvm_lmac_scan(struct iwm_softc *sc) Link Here
695
	IWM_DPRINTF(sc, IWM_DEBUG_SCAN,
731
	IWM_DPRINTF(sc, IWM_DEBUG_SCAN,
696
	    "Handling ieee80211 scan request\n");
732
	    "Handling ieee80211 scan request\n");
697
733
698
	req_len = sizeof(struct iwm_scan_req_lmac) +
734
	req_len = iwm_mvm_scan_size(sc);
699
	    (sizeof(struct iwm_scan_channel_cfg_lmac) *
700
	    sc->sc_fw.ucode_capa.n_scan_channels) + sizeof(struct iwm_scan_probe_req);
701
	if (req_len > IWM_MAX_CMD_PAYLOAD_SIZE)
735
	if (req_len > IWM_MAX_CMD_PAYLOAD_SIZE)
702
		return ENOMEM;
736
		return ENOMEM;
703
	req = malloc(req_len, M_DEVBUF, M_NOWAIT | M_ZERO);
737
	req = malloc(req_len, M_DEVBUF, M_NOWAIT | M_ZERO);
Lines 866-872 iwm_mvm_scan_stop_wait(struct iwm_softc *sc) Link Here
866
900
867
	IWM_DPRINTF(sc, IWM_DEBUG_SCAN, "Preparing to stop scan\n");
901
	IWM_DPRINTF(sc, IWM_DEBUG_SCAN, "Preparing to stop scan\n");
868
902
869
	if (fw_has_capa(&sc->sc_fw.ucode_capa, IWM_UCODE_TLV_CAPA_UMAC_SCAN))
903
	if (iwm_fw_has_capa(sc, IWM_UCODE_TLV_CAPA_UMAC_SCAN))
870
		ret = iwm_mvm_umac_scan_abort(sc);
904
		ret = iwm_mvm_umac_scan_abort(sc);
871
	else
905
	else
872
		ret = iwm_mvm_lmac_scan_abort(sc);
906
		ret = iwm_mvm_lmac_scan_abort(sc);
(-)b/sys/dev/iwm/if_iwm_sta.c (-9 / +7 lines)
Lines 138-150 __FBSDID("$FreeBSD$"); Link Here
138
static inline int
138
static inline int
139
iwm_mvm_add_sta_cmd_size(struct iwm_softc *sc)
139
iwm_mvm_add_sta_cmd_size(struct iwm_softc *sc)
140
{
140
{
141
#ifdef notyet
141
	return sc->cfg->mqrx_supported ? sizeof(struct iwm_mvm_add_sta_cmd) :
142
	return iwm_mvm_has_new_rx_api(mvm) ?
142
	    sizeof(struct iwm_mvm_add_sta_cmd_v7);
143
		sizeof(struct iwm_mvm_add_sta_cmd) :
144
		sizeof(struct iwm_mvm_add_sta_cmd_v7);
145
#else
146
	return sizeof(struct iwm_mvm_add_sta_cmd);
147
#endif
148
}
143
}
149
144
150
/* send station add/update command to firmware */
145
/* send station add/update command to firmware */
Lines 318-324 iwm_mvm_rm_sta_id(struct iwm_softc *sc, struct ieee80211vap *vap) Link Here
318
313
319
static int
314
static int
320
iwm_mvm_add_int_sta_common(struct iwm_softc *sc, struct iwm_int_sta *sta,
315
iwm_mvm_add_int_sta_common(struct iwm_softc *sc, struct iwm_int_sta *sta,
321
	const uint8_t *addr, uint16_t mac_id, uint16_t color)
316
    const uint8_t *addr, uint16_t mac_id, uint16_t color)
322
{
317
{
323
	struct iwm_mvm_add_sta_cmd cmd;
318
	struct iwm_mvm_add_sta_cmd cmd;
324
	int ret;
319
	int ret;
Lines 327-332 iwm_mvm_add_int_sta_common(struct iwm_softc *sc, struct iwm_int_sta *sta, Link Here
327
	memset(&cmd, 0, sizeof(cmd));
322
	memset(&cmd, 0, sizeof(cmd));
328
	cmd.sta_id = sta->sta_id;
323
	cmd.sta_id = sta->sta_id;
329
	cmd.mac_id_n_color = htole32(IWM_FW_CMD_ID_AND_COLOR(mac_id, color));
324
	cmd.mac_id_n_color = htole32(IWM_FW_CMD_ID_AND_COLOR(mac_id, color));
325
	if (sta->sta_id == IWM_AUX_STA_ID && sc->cfg->mqrx_supported)
326
		cmd.station_type = IWM_STA_AUX_ACTIVITY;
330
327
331
	cmd.tfd_queue_msk = htole32(sta->tfd_queue_msk);
328
	cmd.tfd_queue_msk = htole32(sta->tfd_queue_msk);
332
	cmd.tid_disable_tx = htole16(0xffff);
329
	cmd.tid_disable_tx = htole16(0xffff);
Lines 362-368 iwm_mvm_add_aux_sta(struct iwm_softc *sc) Link Here
362
	sc->sc_aux_sta.tfd_queue_msk = (1 << IWM_MVM_AUX_QUEUE);
359
	sc->sc_aux_sta.tfd_queue_msk = (1 << IWM_MVM_AUX_QUEUE);
363
360
364
	/* Map Aux queue to fifo - needs to happen before adding Aux station */
361
	/* Map Aux queue to fifo - needs to happen before adding Aux station */
365
	ret = iwm_enable_txq(sc, 0, IWM_MVM_AUX_QUEUE, IWM_MVM_TX_FIFO_MCAST);
362
	ret = iwm_enable_txq(sc, IWM_AUX_STA_ID, IWM_MVM_AUX_QUEUE,
363
	    IWM_MVM_TX_FIFO_MCAST);
366
	if (ret)
364
	if (ret)
367
		return ret;
365
		return ret;
368
366
(-)b/sys/dev/iwm/if_iwmreg.h (-49 / +384 lines)
Lines 289-295 Link Here
289
#define IWM_CSR_GP_CNTRL_REG_VAL_MAC_ACCESS_EN           (0x00000001)
289
#define IWM_CSR_GP_CNTRL_REG_VAL_MAC_ACCESS_EN           (0x00000001)
290
290
291
#define IWM_CSR_GP_CNTRL_REG_MSK_POWER_SAVE_TYPE         (0x07000000)
291
#define IWM_CSR_GP_CNTRL_REG_MSK_POWER_SAVE_TYPE         (0x07000000)
292
#define IWM_CSR_GP_CNTRL_REG_FLAG_MAC_POWER_SAVE         (0x04000000)
292
#define IWM_CSR_GP_CNTRL_REG_FLAG_RFKILL_WAKE_L1A_EN     (0x04000000)
293
#define IWM_CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW          (0x08000000)
293
#define IWM_CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW          (0x08000000)
294
294
295
295
Lines 457-462 enum iwm_secure_boot_status_reg { Link Here
457
#define IWM_LMPM_CHICK				0xa01ff8
457
#define IWM_LMPM_CHICK				0xa01ff8
458
#define IWM_LMPM_CHICK_EXTENDED_ADDR_SPACE	0x01
458
#define IWM_LMPM_CHICK_EXTENDED_ADDR_SPACE	0x01
459
459
460
#define	IWM_UREG_CHICK			0xa05c00
461
#define	IWM_UREG_CHICK_MSI_ENABLE	0x01000000
462
#define	IWM_UREG_CHICK_MSIX_ENABLE	0x02000000
463
460
#define IWM_FH_TCSR_0_REG0 (0x1D00)
464
#define IWM_FH_TCSR_0_REG0 (0x1D00)
461
465
462
/*
466
/*
Lines 635-640 P2P_PS_SCM\31UAPSD_SUPPORT\32EBS\33P2P_PS_UAPSD\36BCAST_FILTERING\37GO_UAPSD\40L Link Here
635
 *	longer than the passive one, which is essential for fragmented scan.
639
 *	longer than the passive one, which is essential for fragmented scan.
636
 * @IWM_UCODE_TLV_API_WIFI_MCC_UPDATE: ucode supports MCC updates with source.
640
 * @IWM_UCODE_TLV_API_WIFI_MCC_UPDATE: ucode supports MCC updates with source.
637
 * @IWM_UCODE_TLV_API_LQ_SS_PARAMS: Configure STBC/BFER via LQ CMD ss_params
641
 * @IWM_UCODE_TLV_API_LQ_SS_PARAMS: Configure STBC/BFER via LQ CMD ss_params
642
 * @IWM_UCODE_TLV_API_NEW_VERSION: new versioning format
643
 * @IWM_UCODE_TLV_API_SCAN_TSF_REPORT: Scan start time reported in scan
644
 *	iteration complete notification, and the timestamp reported for RX
645
 *	received during scan, are reported in TSF of the mac specified in the
646
 *	scan request.
647
 * @IWM_UCODE_TLV_API_TKIP_MIC_KEYS: This ucode supports version 2 of
648
 *	ADD_MODIFY_STA_KEY_API_S_VER_2.
649
 * @IWM_UCODE_TLV_API_STA_TYPE: This ucode supports station type assignement.
650
 * @IWM_UCODE_TLV_API_NAN2_VER2: This ucode supports NAN API version 2
651
 * @IWM_UCODE_TLV_API_NEW_RX_STATS: should new RX STATISTICS API be used
652
 * @IWM_UCODE_TLV_API_QUOTA_LOW_LATENCY: Quota command includes a field
653
 *	indicating low latency direction.
654
 * @IWM_UCODE_TLV_API_DEPRECATE_TTAK: RX status flag TTAK ok (bit 7) is
655
 *	deprecated.
656
 * @IWM_UCODE_TLV_API_ADAPTIVE_DWELL_V2: This ucode supports version 8
657
 *	of scan request: SCAN_REQUEST_CMD_UMAC_API_S_VER_8
658
 * @IWM_UCODE_TLV_API_FRAG_EBS: This ucode supports fragmented EBS
659
 * @IWM_UCODE_TLV_API_REDUCE_TX_POWER: This ucode supports v5 of
660
 *	the REDUCE_TX_POWER_CMD.
661
 * @IWM_UCODE_TLV_API_SHORT_BEACON_NOTIF: This ucode supports the short
662
 *	version of the beacon notification.
663
 * @IWM_UCODE_TLV_API_BEACON_FILTER_V4: This ucode supports v4 of
664
 *	BEACON_FILTER_CONFIG_API_S_VER_4.
665
 * @IWM_UCODE_TLV_API_REGULATORY_NVM_INFO: This ucode supports v4 of
666
 *	REGULATORY_NVM_GET_INFO_RSP_API_S.
667
 * @IWM_UCODE_TLV_API_FTM_NEW_RANGE_REQ: This ucode supports v7 of
668
 *	LOCATION_RANGE_REQ_CMD_API_S and v6 of LOCATION_RANGE_RESP_NTFY_API_S.
669
 * @IWM_UCODE_TLV_API_SCAN_OFFLOAD_CHANS: This ucode supports v2 of
670
 *	SCAN_OFFLOAD_PROFILE_MATCH_RESULTS_S and v3 of
671
 *	SCAN_OFFLOAD_PROFILES_QUERY_RSP_S.
672
 * @IWM_UCODE_TLV_API_MBSSID_HE: This ucode supports v2 of
673
 *	STA_CONTEXT_DOT11AX_API_S
674
 * @IWM_UCODE_TLV_CAPA_SAR_TABLE_VER: This ucode supports different sar
675
 *	version tables.
638
 *
676
 *
639
 * @IWM_NUM_UCODE_TLV_API: number of bits used
677
 * @IWM_NUM_UCODE_TLV_API: number of bits used
640
 */
678
 */
Lines 642-654 enum iwm_ucode_tlv_api { Link Here
642
	IWM_UCODE_TLV_API_FRAGMENTED_SCAN	= 8,
680
	IWM_UCODE_TLV_API_FRAGMENTED_SCAN	= 8,
643
	IWM_UCODE_TLV_API_WIFI_MCC_UPDATE	= 9,
681
	IWM_UCODE_TLV_API_WIFI_MCC_UPDATE	= 9,
644
	IWM_UCODE_TLV_API_LQ_SS_PARAMS		= 18,
682
	IWM_UCODE_TLV_API_LQ_SS_PARAMS		= 18,
645
683
	IWM_UCODE_TLV_API_NEW_VERSION		= 20,
646
	IWM_NUM_UCODE_TLV_API = 32
684
	IWM_UCODE_TLV_API_SCAN_TSF_REPORT	= 28,
685
	IWM_UCODE_TLV_API_TKIP_MIC_KEYS		= 29,
686
	IWM_UCODE_TLV_API_STA_TYPE		= 30,
687
	IWM_UCODE_TLV_API_NAN2_VER2		= 31,
688
	IWM_UCODE_TLV_API_ADAPTIVE_DWELL	= 32,
689
	IWM_UCODE_TLV_API_OCE			= 33,
690
	IWM_UCODE_TLV_API_NEW_BEACON_TEMPLATE	= 34,
691
	IWM_UCODE_TLV_API_NEW_RX_STATS		= 35,
692
	IWM_UCODE_TLV_API_WOWLAN_KEY_MATERIAL	= 36,
693
	IWM_UCODE_TLV_API_QUOTA_LOW_LATENCY	= 38,
694
	IWM_UCODE_TLV_API_DEPRECATE_TTAK	= 41,
695
	IWM_UCODE_TLV_API_ADAPTIVE_DWELL_V2	= 42,
696
	IWM_UCODE_TLV_API_FRAG_EBS		= 44,
697
	IWM_UCODE_TLV_API_REDUCE_TX_POWER	= 45,
698
	IWM_UCODE_TLV_API_SHORT_BEACON_NOTIF	= 46,
699
	IWM_UCODE_TLV_API_BEACON_FILTER_V4      = 47,
700
	IWM_UCODE_TLV_API_REGULATORY_NVM_INFO   = 48,
701
	IWM_UCODE_TLV_API_FTM_NEW_RANGE_REQ     = 49,
702
	IWM_UCODE_TLV_API_SCAN_OFFLOAD_CHANS    = 50,
703
	IWM_UCODE_TLV_API_MBSSID_HE		= 52,
704
	IWM_UCODE_TLV_API_WOWLAN_TCP_SYN_WAKE	= 53,
705
	IWM_UCODE_TLV_API_FTM_RTT_ACCURACY      = 54,
706
	IWM_UCODE_TLV_API_SAR_TABLE_VER         = 55,
707
	IWM_UCODE_TLV_API_ADWELL_HB_DEF_N_AP	= 57,
708
	IWM_UCODE_TLV_API_SCAN_EXT_CHAN_VER	= 58,
709
710
	IWM_NUM_UCODE_TLV_API			= 128,
647
};
711
};
648
712
649
#define IWM_UCODE_TLV_API_BITS \
650
	"\020\10FRAGMENTED_SCAN\11WIFI_MCC_UPDATE\16WIDE_CMD_HDR\22LQ_SS_PARAMS\30EXT_SCAN_PRIO\33TX_POWER_CHAIN"
651
652
/**
713
/**
653
 * enum iwm_ucode_tlv_capa - ucode capabilities
714
 * enum iwm_ucode_tlv_capa - ucode capabilities
654
 * @IWM_UCODE_TLV_CAPA_D0I3_SUPPORT: supports D0i3
715
 * @IWM_UCODE_TLV_CAPA_D0I3_SUPPORT: supports D0i3
Lines 933-938 enum iwm_ucode_tlv_type { Link Here
933
	IWM_UCODE_TLV_FW_DBG_DEST	= 38,
994
	IWM_UCODE_TLV_FW_DBG_DEST	= 38,
934
	IWM_UCODE_TLV_FW_DBG_CONF	= 39,
995
	IWM_UCODE_TLV_FW_DBG_CONF	= 39,
935
	IWM_UCODE_TLV_FW_DBG_TRIGGER	= 40,
996
	IWM_UCODE_TLV_FW_DBG_TRIGGER	= 40,
997
	IWM_UCODE_TLV_CMD_VERSIONS	= 48,
936
	IWM_UCODE_TLV_FW_GSCAN_CAPA	= 50,
998
	IWM_UCODE_TLV_FW_GSCAN_CAPA	= 50,
937
	IWM_UCODE_TLV_FW_MEM_SEG	= 51,
999
	IWM_UCODE_TLV_FW_MEM_SEG	= 51,
938
};
1000
};
Lines 1469-1474 static inline unsigned int IWM_FH_MEM_CBBC_QUEUE(unsigned int chnl) Link Here
1469
1531
1470
#define IWM_FH_MEM_TFDIB_REG1_ADDR_BITSHIFT	28
1532
#define IWM_FH_MEM_TFDIB_REG1_ADDR_BITSHIFT	28
1471
1533
1534
/* 9000 rx series registers */
1535
1536
#define IWM_RFH_Q0_FRBDCB_BA_LSB	0xa08000
1537
#define IWM_RFH_Q_FRBDCB_BA_LSB		(IWM_RFH_Q0_FRBDCB_BA_LSB + (q) * 8)
1538
/* Write index table */
1539
#define IWM_RFH_Q0_FRBDCB_WIDX		0xa08080
1540
#define IWM_RFH_Q_FRBDCB_WIDX		(IWM_RFH_Q0_FRBDCB_WIDX + (q) * 4)
1541
/* Write index table - shadow registers */
1542
#define IWM_RFH_Q0_FRBDCB_WIDX_TRG	0x1c80
1543
#define IWM_RFH_Q_FRBDCB_WIDX_TRG	(IWM_RFH_Q0_FRBDCB_WIDX_TRG + (q) * 4)
1544
/* Read index table */
1545
#define IWM_RFH_Q0_FRBDCB_RIDX		0xa080c0
1546
#define IWM_RFH_Q_FRBDCB_RIDX		(IWM_RFH_Q0_FRBDCB_RIDX + (q) * 4)
1547
/* Used list table */
1548
#define IWM_RFH_Q0_URBDCB_BA_LSB	0xa08100
1549
#define IWM_RFH_Q_URBDCB_BA_LSB		(IWM_RFH_Q0_URBDCB_BA_LSB + (q) * 8)
1550
/* Write index table */
1551
#define IWM_RFH_Q0_URBDCB_WIDX		0xa08180
1552
#define IWM_RFH_Q_URBDCB_WIDX		(IWM_RFH_Q0_URBDCB_WIDX + (q) * 4)
1553
/* stts */
1554
#define IWM_RFH_Q0_URBD_STTS_WPTR_LSB	0xa08200
1555
#define IWM_RFH_Q_URBD_STTS_WPTR_LSB (IWM_RFH_Q0_URBD_STTS_WPTR_LSB + (q) * 8)
1556
1557
#define IWM_RFH_GEN_STATUS		0xa09808
1558
#define IWM_RXF_DMA_IDLE		0x80000000
1559
1560
/* DMA configuration */
1561
#define IWM_RFH_RXF_DMA_CFG		0xa09820
1562
#define IWM_RFH_RXF_DMA_RB_SIZE_1K	0x00010000
1563
#define IWM_RFH_RXF_DMA_RB_SIZE_2K	0x00020000
1564
#define IWM_RFH_RXF_DMA_RB_SIZE_4K	0x00040000
1565
#define IWM_RFH_RXF_DMA_RBDCB_SIZE_512	0x00900000
1566
#define IWM_RFH_RXF_DMA_MIN_RB_4_8	0x03000000
1567
#define IWM_RFH_RXF_DMA_DROP_TOO_LARGE_MASK 0x04000000
1568
#define IWM_RFH_DMA_EN_ENABLE_VAL	0x80000000
1569
1570
#define IWM_RFH_GEN_CFG			0xa09800
1571
#define IWM_RFH_GEN_CFG_SERVICE_DMA_SNOOP 0x00000001
1572
#define IWM_RFH_GEN_CFG_RFH_DMA_SNOOP	0x00000002
1573
#define IWM_RFH_GEN_CFG_RB_CHUNK_SIZE_128 0x00000010
1574
#define IWM_RFH_GEN_CFG_RB_CHUNK_SIZE_64 0x00000000
1575
1576
#define IWM_RFH_RXF_RXQ_ACTIVE		0xa0980c
1577
1578
/* end of 9000 rx series registers */
1579
1472
/* TFDB  Area - TFDs buffer table */
1580
/* TFDB  Area - TFDs buffer table */
1473
#define IWM_FH_MEM_TFDIB_DRAM_ADDR_LSB_MSK      (0xFFFFFFFF)
1581
#define IWM_FH_MEM_TFDIB_DRAM_ADDR_LSB_MSK      (0xFFFFFFFF)
1474
#define IWM_FH_TFDIB_LOWER_BOUND       (IWM_FH_MEM_LOWER_BOUND + 0x900)
1582
#define IWM_FH_TFDIB_LOWER_BOUND       (IWM_FH_MEM_LOWER_BOUND + 0x900)
Lines 2799-2804 enum iwm_mvm_rx_status { Link Here
2799
	IWM_RX_MPDU_RES_STATUS2_FILTERING_MSK		= (0xc0000000),
2907
	IWM_RX_MPDU_RES_STATUS2_FILTERING_MSK		= (0xc0000000),
2800
};
2908
};
2801
2909
2910
enum iwm_rx_mpdu_mac_flags1 {
2911
	IWM_RX_MPDU_MFLG1_ADDRTYPE_MASK		= 0x03,
2912
	IWM_RX_MPDU_MFLG1_MIC_CRC_LEN_MASK	= 0xf0,
2913
	IWM_RX_MPDU_MFLG1_MIC_CRC_LEN_SHIFT	= 3,
2914
};
2915
2916
enum iwm_rx_mpdu_mac_flags2 {
2917
	IWM_RX_MPDU_MFLG2_HDR_LEN_MASK		= 0x1f,
2918
	IWM_RX_MPDU_MFLG2_PAD			= 0x20,
2919
	IWM_RX_MPDU_MFLG2_AMSDU			= 0x40,
2920
};
2921
2922
enum iwm_rx_mpdu_phy_info {
2923
	IWM_RX_MPDU_PHY_AMPDU			= (1 << 5),
2924
	IWM_RX_MPDU_PHY_AMPDU_TOGGLE		= (1 << 6),
2925
	IWM_RX_MPDU_PHY_SHORT_PREAMBLE		= (1 << 7),
2926
	IWM_RX_MPDU_PHY_NCCK_ADDTL_NTFY		= (1 << 7),
2927
	IWM_RX_MPDU_PHY_TSF_OVERLOAD		= (1 << 8),
2928
};
2929
2930
struct iwm_rx_mpdu_desc_v1 {
2931
	union {
2932
		uint32_t rss_hash;
2933
		uint32_t phy_data2;
2934
	};
2935
	union {
2936
		uint32_t filter_match;
2937
		uint32_t phy_data3;
2938
	};
2939
	uint32_t rate_n_flags;
2940
	uint8_t energy_a;
2941
	uint8_t energy_b;
2942
	uint8_t channel;
2943
	uint8_t mac_context;
2944
	uint32_t gp2_on_air_rise;
2945
	union {
2946
		uint64_t tsf_on_air_rise;
2947
		struct {
2948
			uint32_t phy_data0;
2949
			uint32_t phy_data1;
2950
		};
2951
	};
2952
} __packed;
2953
2954
struct iwm_rx_mpdu_desc {
2955
	uint16_t mpdu_len;
2956
	uint8_t mac_flags1;
2957
	uint8_t mac_flags2;
2958
	uint8_t amsdu_info;
2959
	uint16_t phy_info;
2960
	uint8_t mac_phy_idx;
2961
	uint16_t raw_csum;
2962
	union {
2963
		uint16_t l3l4_flags;
2964
		uint16_t phy_data4;
2965
	};
2966
	uint16_t status;
2967
	uint8_t hash_filter;
2968
	uint8_t sta_id_flags;
2969
	uint32_t reorder_data;
2970
	struct iwm_rx_mpdu_desc_v1 v1;
2971
} __packed;
2972
2802
/**
2973
/**
2803
 * struct iwm_radio_version_notif - information on the radio version
2974
 * struct iwm_radio_version_notif - information on the radio version
2804
 * ( IWM_RADIO_VERSION_NOTIFICATION = 0x68 )
2975
 * ( IWM_RADIO_VERSION_NOTIFICATION = 0x68 )
Lines 4306-4318 enum iwm_tx_pm_timeouts { Link Here
4306
#define IWM_BAR_DFAULT_RETRY_LIMIT		60
4477
#define IWM_BAR_DFAULT_RETRY_LIMIT		60
4307
#define IWM_LOW_RETRY_LIMIT			7
4478
#define IWM_LOW_RETRY_LIMIT			7
4308
4479
4480
/**
4481
 * enum iwm_tx_offload_assist_flags_pos -  set %iwm_tx_cmd offload_assist values
4482
 * @IWM_TX_CMD_OFFLD_IP_HDR: offset to start of IP header (in words)
4483
 *	from mac header end. For normal case it is 4 words for SNAP.
4484
 *	note: tx_cmd, mac header and pad are not counted in the offset.
4485
 *	This is used to help the offload in case there is tunneling such as
4486
 *	IPv6 in IPv4, in such case the ip header offset should point to the
4487
 *	inner ip header and IPv4 checksum of the external header should be
4488
 *	calculated by driver.
4489
 * @IWM_TX_CMD_OFFLD_L4_EN: enable TCP/UDP checksum
4490
 * @IWM_TX_CMD_OFFLD_L3_EN: enable IP header checksum
4491
 * @IWM_TX_CMD_OFFLD_MH_SIZE: size of the mac header in words. Includes the IV
4492
 *	field. Doesn't include the pad.
4493
 * @IWM_TX_CMD_OFFLD_PAD: mark 2-byte pad was inserted after the mac header for
4494
 *	alignment
4495
 * @IWM_TX_CMD_OFFLD_AMSDU: mark TX command is A-MSDU
4496
 */
4497
enum iwm_tx_offload_assist_flags_pos {
4498
	IWM_TX_CMD_OFFLD_IP_HDR =	0,
4499
	IWM_TX_CMD_OFFLD_L4_EN =	6,
4500
	IWM_TX_CMD_OFFLD_L3_EN =	7,
4501
	IWM_TX_CMD_OFFLD_MH_SIZE =	8,
4502
	IWM_TX_CMD_OFFLD_PAD =		13,
4503
	IWM_TX_CMD_OFFLD_AMSDU =	14,
4504
};
4505
4506
#define IWM_TX_CMD_OFFLD_MH_MASK	0x1f
4507
#define IWM_TX_CMD_OFFLD_IP_HDR_MASK	0x3f
4508
4309
/* TODO: complete documentation for try_cnt and btkill_cnt */
4509
/* TODO: complete documentation for try_cnt and btkill_cnt */
4310
/**
4510
/**
4311
 * struct iwm_tx_cmd - TX command struct to FW
4511
 * struct iwm_tx_cmd - TX command struct to FW
4312
 * ( IWM_TX_CMD = 0x1c )
4512
 * ( IWM_TX_CMD = 0x1c )
4313
 * @len: in bytes of the payload, see below for details
4513
 * @len: in bytes of the payload, see below for details
4314
 * @next_frame_len: same as len, but for next frame (0 if not applicable)
4514
 * @offload_assist: TX offload configuration
4315
 *	Used for fragmentation and bursting, but not in 11n aggregation.
4316
 * @tx_flags: combination of IWM_TX_CMD_FLG_*
4515
 * @tx_flags: combination of IWM_TX_CMD_FLG_*
4317
 * @rate_n_flags: rate for *all* Tx attempts, if IWM_TX_CMD_FLG_STA_RATE_MSK is
4516
 * @rate_n_flags: rate for *all* Tx attempts, if IWM_TX_CMD_FLG_STA_RATE_MSK is
4318
 *	cleared. Combination of IWM_RATE_MCS_*
4517
 *	cleared. Combination of IWM_RATE_MCS_*
Lines 4348-4354 enum iwm_tx_pm_timeouts { Link Here
4348
 */
4547
 */
4349
struct iwm_tx_cmd {
4548
struct iwm_tx_cmd {
4350
	uint16_t len;
4549
	uint16_t len;
4351
	uint16_t next_frame_len;
4550
	uint16_t offload_assist;
4352
	uint32_t tx_flags;
4551
	uint32_t tx_flags;
4353
	struct {
4552
	struct {
4354
		uint8_t try_cnt;
4553
		uint8_t try_cnt;
Lines 4361-4368 struct iwm_tx_cmd { Link Here
4361
	uint8_t initial_rate_index;
4560
	uint8_t initial_rate_index;
4362
	uint8_t reserved2;
4561
	uint8_t reserved2;
4363
	uint8_t key[16];
4562
	uint8_t key[16];
4364
	uint16_t next_frame_flags;
4563
	uint32_t reserved3;
4365
	uint16_t reserved3;
4366
	uint32_t life_time;
4564
	uint32_t life_time;
4367
	uint32_t dram_lsb_ptr;
4565
	uint32_t dram_lsb_ptr;
4368
	uint8_t dram_msb_ptr;
4566
	uint8_t dram_msb_ptr;
Lines 4370-4376 struct iwm_tx_cmd { Link Here
4370
	uint8_t data_retry_limit;
4568
	uint8_t data_retry_limit;
4371
	uint8_t tid_tspec;
4569
	uint8_t tid_tspec;
4372
	uint16_t pm_frame_timeout;
4570
	uint16_t pm_frame_timeout;
4373
	uint16_t driver_txop;
4571
	uint16_t reserved4;
4374
	uint8_t payload[0];
4572
	uint8_t payload[0];
4375
	struct ieee80211_frame hdr[0];
4573
	struct ieee80211_frame hdr[0];
4376
} __packed; /* IWM_TX_CMD_API_S_VER_3 */
4574
} __packed; /* IWM_TX_CMD_API_S_VER_3 */
Lines 5289-5310 struct iwm_scan_req_umac_tail { Link Here
5289
	struct iwm_ssid_ie direct_scan[IWM_PROBE_OPTION_MAX];
5487
	struct iwm_ssid_ie direct_scan[IWM_PROBE_OPTION_MAX];
5290
} __packed;
5488
} __packed;
5291
5489
5490
/**
5491
 * struct iwm_scan_uma_chan_param
5492
 * @flags: channel flags &enum iwm_scan_channel_flags
5493
 * @count: num of channels in scan request
5494
 * @reserved: for future use and alignment
5495
 */
5496
struct iwm_scan_umac_chan_param {
5497
	uint8_t flags;
5498
	uint8_t count;
5499
	uint16_t reserved;
5500
} __packed;
5501
5292
/**
5502
/**
5293
 * struct iwm_scan_req_umac
5503
 * struct iwm_scan_req_umac
5294
 * @flags: &enum iwm_umac_scan_flags
5504
 * @flags: &enum iwm_umac_scan_flags
5295
 * @uid: scan id, &enum iwm_umac_scan_uid_offsets
5505
 * @uid: scan id, &enum iwm_umac_scan_uid_offsets
5296
 * @ooc_priority: out of channel priority - &enum iwm_scan_priority
5506
 * @ooc_priority: out of channel priority - &enum iwm_scan_priority
5297
 * @general_flags: &enum iwm_umac_scan_general_flags
5507
 * @general_flags: &enum iwm_umac_scan_general_flags
5508
 * @scan_start_mac_id: report the scan start TSF time according to this mac TSF
5298
 * @extended_dwell: dwell time for channels 1, 6 and 11
5509
 * @extended_dwell: dwell time for channels 1, 6 and 11
5299
 * @active_dwell: dwell time for active scan
5510
 * @active_dwell: dwell time for active scan per LMAC
5300
 * @passive_dwell: dwell time for passive scan
5511
 * @passive_dwell: dwell time for passive scan per LMAC
5301
 * @fragmented_dwell: dwell time for fragmented passive scan
5512
 * @fragmented_dwell: dwell time for fragmented passive scan
5302
 * @max_out_time: max out of serving channel time
5513
 * @adwell_default_n_aps: for adaptive dwell the default number of APs
5303
 * @suspend_time: max suspend time
5514
 *	per channel
5304
 * @scan_priority: scan internal prioritization &enum iwm_scan_priority
5515
 * @adwell_default_n_aps_social: for adaptive dwell the default
5305
 * @channel_flags: &enum iwm_scan_channel_flags
5516
 *	number of APs per social (1,6,11) channel
5306
 * @n_channels: num of channels in scan request
5517
 * @general_flags2: &enum iwl_umac_scan_general_flags2
5518
 * @adwell_max_budget: for adaptive dwell the maximal budget of TU to be added
5519
 *	to total scan time
5520
 * @max_out_time: max out of serving channel time, per LMAC - for CDB there
5521
 *	are 2 LMACs
5522
 * @suspend_time: max suspend time, per LMAC - for CDB there are 2 LMACs
5523
 * @scan_priority: scan internal prioritization &enum iwl_scan_priority
5524
 * @num_of_fragments: Number of fragments needed for full coverage per band.
5525
 *	Relevant only for fragmented scan.
5526
 * @channel: &struct iwl_scan_umac_chan_param
5307
 * @reserved: for future use and alignment
5527
 * @reserved: for future use and alignment
5528
 * @reserved3: for future use and alignment
5308
 * @data: &struct iwm_scan_channel_cfg_umac and
5529
 * @data: &struct iwm_scan_channel_cfg_umac and
5309
 *	&struct iwm_scan_req_umac_tail
5530
 *	&struct iwm_scan_req_umac_tail
5310
 */
5531
 */
Lines 5312-5332 struct iwm_scan_req_umac { Link Here
5312
	uint32_t flags;
5533
	uint32_t flags;
5313
	uint32_t uid;
5534
	uint32_t uid;
5314
	uint32_t ooc_priority;
5535
	uint32_t ooc_priority;
5315
	/* SCAN_GENERAL_PARAMS_API_S_VER_1 */
5536
	uint16_t general_flags;
5316
	uint32_t general_flags;
5537
	uint8_t reserved;
5317
	uint8_t extended_dwell;
5538
	uint8_t scan_start_mac_id;
5318
	uint8_t active_dwell;
5539
	union {
5319
	uint8_t passive_dwell;
5540
		struct {
5320
	uint8_t fragmented_dwell;
5541
			uint8_t extended_dwell;
5321
	uint32_t max_out_time;
5542
			uint8_t active_dwell;
5322
	uint32_t suspend_time;
5543
			uint8_t passive_dwell;
5323
	uint32_t scan_priority;
5544
			uint8_t fragmented_dwell;
5324
	/* SCAN_CHANNEL_PARAMS_API_S_VER_1 */
5545
			uint32_t max_out_time;
5325
	uint8_t channel_flags;
5546
			uint32_t suspend_time;
5326
	uint8_t n_channels;
5547
			uint32_t scan_priority;
5327
	uint16_t reserved;
5548
			struct iwm_scan_umac_chan_param channel;
5328
	uint8_t data[];
5549
			uint8_t data[];
5329
} __packed; /* SCAN_REQUEST_CMD_UMAC_API_S_VER_1 */
5550
		} v1;
5551
		struct {
5552
			uint8_t active_dwell;
5553
			uint8_t passive_dwell;
5554
			uint8_t fragmented_dwell;
5555
			uint8_t adwell_default_n_aps;
5556
			uint8_t adwell_default_n_aps_social;
5557
			uint8_t reserved3;
5558
			uint16_t adwell_max_budget;
5559
			uint32_t max_out_time[2];
5560
			uint32_t suspend_time[2];
5561
			uint32_t scan_priority;
5562
			struct iwm_scan_umac_chan_param channel;
5563
			uint8_t data[];
5564
		} v7;
5565
	};
5566
} __packed;
5567
5568
#define IWM_SCAN_REQ_UMAC_SIZE_V7 48
5569
#define IWM_SCAN_REQ_UMAC_SIZE_V1 36
5330
5570
5331
/**
5571
/**
5332
 * struct iwm_umac_scan_abort
5572
 * struct iwm_umac_scan_abort
Lines 5636-5665 struct iwm_mvm_keyinfo { Link Here
5636
#define IWM_ADD_STA_BAID_SHIFT		8
5876
#define IWM_ADD_STA_BAID_SHIFT		8
5637
5877
5638
/**
5878
/**
5639
 * struct iwm_mvm_add_sta_cmd - Add/modify a station in the fw's sta table.
5879
 * struct iwl_mvm_add_sta_cmd_v7 - Add/modify a station in the fw's sta table.
5640
 * ( REPLY_ADD_STA = 0x18 )
5880
 * ( REPLY_ADD_STA = 0x18 )
5641
 * @add_modify: 1: modify existing, 0: add new station
5881
 * @add_modify: see &enum iwl_sta_mode
5642
 * @awake_acs:
5882
 * @awake_acs: ACs to transmit data on while station is sleeping (for U-APSD)
5643
 * @tid_disable_tx: is tid BIT(tid) enabled for Tx. Clear BIT(x) to enable
5883
 * @tid_disable_tx: is tid BIT(tid) enabled for Tx. Clear BIT(x) to enable
5644
 *	AMPDU for tid x. Set %IWM_STA_MODIFY_TID_DISABLE_TX to change this field.
5884
 *	AMPDU for tid x. Set %STA_MODIFY_TID_DISABLE_TX to change this field.
5645
 * @mac_id_n_color: the Mac context this station belongs to
5885
 * @mac_id_n_color: the Mac context this station belongs to,
5646
 * @addr[IEEE80211_ADDR_LEN]: station's MAC address
5886
 *	see &enum iwl_ctxt_id_and_color
5887
 * @addr: station's MAC address
5888
 * @reserved2: reserved
5647
 * @sta_id: index of station in uCode's station table
5889
 * @sta_id: index of station in uCode's station table
5648
 * @modify_mask: IWM_STA_MODIFY_*, selects which parameters to modify vs. leave
5890
 * @modify_mask: STA_MODIFY_*, selects which parameters to modify vs. leave
5649
 *	alone. 1 - modify, 0 - don't change.
5891
 *	alone. 1 - modify, 0 - don't change.
5650
 * @station_flags: look at %iwm_sta_flags
5892
 * @reserved3: reserved
5651
 * @station_flags_msk: what of %station_flags have changed
5893
 * @station_flags: look at &enum iwl_sta_flags
5894
 * @station_flags_msk: what of %station_flags have changed,
5895
 *	also &enum iwl_sta_flags
5652
 * @add_immediate_ba_tid: tid for which to add block-ack support (Rx)
5896
 * @add_immediate_ba_tid: tid for which to add block-ack support (Rx)
5653
 *	Set %IWM_STA_MODIFY_ADD_BA_TID to use this field, and also set
5897
 *	Set %STA_MODIFY_ADD_BA_TID to use this field, and also set
5654
 *	add_immediate_ba_ssn.
5898
 *	add_immediate_ba_ssn.
5655
 * @remove_immediate_ba_tid: tid for which to remove block-ack support (Rx)
5899
 * @remove_immediate_ba_tid: tid for which to remove block-ack support (Rx)
5656
 *	Set %IWM_STA_MODIFY_REMOVE_BA_TID to use this field
5900
 *	Set %STA_MODIFY_REMOVE_BA_TID to use this field
5657
 * @add_immediate_ba_ssn: ssn for the Rx block-ack session. Used together with
5901
 * @add_immediate_ba_ssn: ssn for the Rx block-ack session. Used together with
5658
 *	add_immediate_ba_tid.
5902
 *	add_immediate_ba_tid.
5659
 * @sleep_tx_count: number of packets to transmit to station even though it is
5903
 * @sleep_tx_count: number of packets to transmit to station even though it is
5660
 *	asleep. Used to synchronise PS-poll and u-APSD responses while ucode
5904
 *	asleep. Used to synchronise PS-poll and u-APSD responses while ucode
5661
 *	keeps track of STA sleep state.
5905
 *	keeps track of STA sleep state.
5662
 * @sleep_state_flags: Look at %iwm_sta_sleep_flag.
5906
 * @sleep_state_flags: Look at &enum iwl_sta_sleep_flag.
5663
 * @assoc_id: assoc_id to be sent in VHT PLCP (9-bit), for grp use 0, for AP
5907
 * @assoc_id: assoc_id to be sent in VHT PLCP (9-bit), for grp use 0, for AP
5664
 *	mac-addr.
5908
 *	mac-addr.
5665
 * @beamform_flags: beam forming controls
5909
 * @beamform_flags: beam forming controls
Lines 5667-5678 struct iwm_mvm_keyinfo { Link Here
5667
 *
5911
 *
5668
 * The device contains an internal table of per-station information, with info
5912
 * The device contains an internal table of per-station information, with info
5669
 * on security keys, aggregation parameters, and Tx rates for initial Tx
5913
 * on security keys, aggregation parameters, and Tx rates for initial Tx
5670
 * attempt and any retries (set by IWM_REPLY_TX_LINK_QUALITY_CMD).
5914
 * attempt and any retries (set by REPLY_TX_LINK_QUALITY_CMD).
5671
 *
5915
 *
5672
 * ADD_STA sets up the table entry for one station, either creating a new
5916
 * ADD_STA sets up the table entry for one station, either creating a new
5673
 * entry, or modifying a pre-existing one.
5917
 * entry, or modifying a pre-existing one.
5674
 */
5918
 */
5675
struct iwm_mvm_add_sta_cmd {
5919
struct iwm_mvm_add_sta_cmd_v7 {
5676
	uint8_t add_modify;
5920
	uint8_t add_modify;
5677
	uint8_t awake_acs;
5921
	uint8_t awake_acs;
5678
	uint16_t tid_disable_tx;
5922
	uint16_t tid_disable_tx;
Lines 5691-5699 struct iwm_mvm_add_sta_cmd { Link Here
5691
	uint16_t sleep_state_flags;
5935
	uint16_t sleep_state_flags;
5692
	uint16_t assoc_id;
5936
	uint16_t assoc_id;
5693
	uint16_t beamform_flags;
5937
	uint16_t beamform_flags;
5694
	uint32_t tfd_queue_msk;
5938
	uint16_t tfd_queue_msk;
5695
} __packed; /* ADD_STA_CMD_API_S_VER_7 */
5939
} __packed; /* ADD_STA_CMD_API_S_VER_7 */
5696
5940
5941
/**
5942
 * enum iwm_sta_type - FW station types
5943
 * ( REPLY_ADD_STA = 0x18 )
5944
 * @IWM_STA_LINK: Link station - normal RX and TX traffic.
5945
 * @IWM_STA_GENERAL_PURPOSE: General purpose. In AP mode used for beacons
5946
 *	and probe responses.
5947
 * @IWM_STA_MULTICAST: multicast traffic,
5948
 * @IWM_STA_TDLS_LINK: TDLS link station
5949
 * @IWM_STA_AUX_ACTIVITY: auxilary station (scan, ROC and so on).
5950
 */
5951
enum iwm_sta_type {
5952
	IWM_STA_LINK,
5953
	IWM_STA_GENERAL_PURPOSE,
5954
	IWM_STA_MULTICAST,
5955
	IWM_STA_TDLS_LINK,
5956
	IWM_STA_AUX_ACTIVITY,
5957
};
5958
5959
/**
5960
 * struct iwm_mvm_add_sta_cmd - Add/modify a station in the fw's sta table.
5961
 * ( REPLY_ADD_STA = 0x18 )
5962
 * @add_modify: see &enum iwm_sta_mode
5963
 * @awake_acs: ACs to transmit data on while station is sleeping (for U-APSD)
5964
 * @tid_disable_tx: is tid BIT(tid) enabled for Tx. Clear BIT(x) to enable
5965
 *	AMPDU for tid x. Set %STA_MODIFY_TID_DISABLE_TX to change this field.
5966
 * @mac_id_n_color: the Mac context this station belongs to,
5967
 *	see &enum iwl_ctxt_id_and_color
5968
 * @addr: station's MAC address
5969
 * @reserved2: reserved
5970
 * @sta_id: index of station in uCode's station table
5971
 * @modify_mask: STA_MODIFY_*, selects which parameters to modify vs. leave
5972
 *	alone. 1 - modify, 0 - don't change.
5973
 * @reserved3: reserved
5974
 * @station_flags: look at &enum iwm_sta_flags
5975
 * @station_flags_msk: what of %station_flags have changed,
5976
 *	also &enum iwm_sta_flags
5977
 * @add_immediate_ba_tid: tid for which to add block-ack support (Rx)
5978
 *	Set %STA_MODIFY_ADD_BA_TID to use this field, and also set
5979
 *	add_immediate_ba_ssn.
5980
 * @remove_immediate_ba_tid: tid for which to remove block-ack support (Rx)
5981
 *	Set %STA_MODIFY_REMOVE_BA_TID to use this field
5982
 * @add_immediate_ba_ssn: ssn for the Rx block-ack session. Used together with
5983
 *	add_immediate_ba_tid.
5984
 * @sleep_tx_count: number of packets to transmit to station even though it is
5985
 *	asleep. Used to synchronise PS-poll and u-APSD responses while ucode
5986
 *	keeps track of STA sleep state.
5987
 * @station_type: type of this station. See &enum iwl_sta_type.
5988
 * @sleep_state_flags: Look at &enum iwl_sta_sleep_flag.
5989
 * @assoc_id: assoc_id to be sent in VHT PLCP (9-bit), for grp use 0, for AP
5990
 *	mac-addr.
5991
 * @beamform_flags: beam forming controls
5992
 * @tfd_queue_msk: tfd queues used by this station.
5993
 *	Obselete for new TX API (9 and above).
5994
 * @rx_ba_window: aggregation window size
5995
 * @sp_length: the size of the SP in actual number of frames
5996
 * @uapsd_acs:  4 LS bits are trigger enabled ACs, 4 MS bits are the deliver
5997
 *	enabled ACs.
5998
 *
5999
 * The device contains an internal table of per-station information, with info
6000
 * on security keys, aggregation parameters, and Tx rates for initial Tx
6001
 * attempt and any retries (set by REPLY_TX_LINK_QUALITY_CMD).
6002
 *
6003
 * ADD_STA sets up the table entry for one station, either creating a new
6004
 * entry, or modifying a pre-existing one.
6005
 */
6006
struct iwm_mvm_add_sta_cmd {
6007
	uint8_t add_modify;
6008
	uint8_t awake_acs;
6009
	uint16_t tid_disable_tx;
6010
	uint32_t mac_id_n_color;
6011
	uint8_t addr[IEEE80211_ADDR_LEN]; /* _STA_ID_MODIFY_INFO_API_S_VER_1 */
6012
	uint16_t reserved2;
6013
	uint8_t sta_id;
6014
	uint8_t modify_mask;
6015
	uint16_t reserved3;
6016
	uint32_t station_flags;
6017
	uint32_t station_flags_msk;
6018
	uint8_t add_immediate_ba_tid;
6019
	uint8_t remove_immediate_ba_tid;
6020
	uint16_t add_immediate_ba_ssn;
6021
	uint16_t sleep_tx_count;
6022
	uint8_t sleep_state_flags;
6023
	uint8_t station_type;
6024
	uint16_t assoc_id;
6025
	uint16_t beamform_flags;
6026
	uint32_t tfd_queue_msk;
6027
	uint16_t rx_ba_window;
6028
	uint8_t sp_length;
6029
	uint8_t uapsd_acs;
6030
} __packed; /* ADD_STA_CMD_API_S_VER_10 */
6031
5697
/**
6032
/**
5698
 * struct iwm_mvm_add_sta_key_cmd - add/modify sta key
6033
 * struct iwm_mvm_add_sta_key_cmd - add/modify sta key
5699
 * ( IWM_REPLY_ADD_STA_KEY = 0x17 )
6034
 * ( IWM_REPLY_ADD_STA_KEY = 0x17 )
(-)b/sys/dev/iwm/if_iwmvar.h (-24 / +20 lines)
Lines 165-184 struct iwm_ucode_capabilities { Link Here
165
	uint8_t enabled_capa[howmany(IWM_NUM_UCODE_TLV_CAPA, NBBY)];
165
	uint8_t enabled_capa[howmany(IWM_NUM_UCODE_TLV_CAPA, NBBY)];
166
};
166
};
167
167
168
static inline int
169
fw_has_api(const struct iwm_ucode_capabilities *capabilities,
170
	   unsigned int api)
171
{
172
	return isset(capabilities->enabled_api, api);
173
}
174
175
static inline int
176
fw_has_capa(const struct iwm_ucode_capabilities *capabilities,
177
	    unsigned int capa)
178
{
179
	return isset(capabilities->enabled_capa, capa);
180
}
181
182
/* one for each uCode image (inst/data, init/runtime/wowlan) */
168
/* one for each uCode image (inst/data, init/runtime/wowlan) */
183
struct iwm_fw_desc {
169
struct iwm_fw_desc {
184
	const void *data;	/* vmalloc'ed data */
170
	const void *data;	/* vmalloc'ed data */
Lines 299-309 struct iwm_tx_ring { Link Here
299
	int			cur;
285
	int			cur;
300
};
286
};
301
287
302
#define IWM_RX_RING_COUNT	256
288
#define IWM_RX_LEGACY_RING_COUNT	256
303
/* Linux driver optionally uses 8k buffer */
289
#define IWM_RX_MQ_RING_COUNT		512
290
304
#define IWM_RBUF_SIZE		4096
291
#define IWM_RBUF_SIZE		4096
305
292
306
#define	IWM_MAX_SCATTER		20
293
#define IWM_MAX_SCATTER		20
307
294
308
struct iwm_rx_data {
295
struct iwm_rx_data {
309
	struct mbuf	*m;
296
	struct mbuf	*m;
Lines 311-322 struct iwm_rx_data { Link Here
311
};
298
};
312
299
313
struct iwm_rx_ring {
300
struct iwm_rx_ring {
314
	struct iwm_dma_info	desc_dma;
301
	struct iwm_dma_info	free_desc_dma;
302
	struct iwm_dma_info	used_desc_dma;
315
	struct iwm_dma_info	stat_dma;
303
	struct iwm_dma_info	stat_dma;
316
	struct iwm_dma_info	buf_dma;
304
	struct iwm_dma_info	buf_dma;
317
	uint32_t		*desc;
305
	void			*desc;
318
	struct iwm_rb_status	*stat;
306
	struct iwm_rb_status	*stat;
319
	struct iwm_rx_data	data[IWM_RX_RING_COUNT];
307
	struct iwm_rx_data	data[512];
320
	bus_dmamap_t		spare_map;	/* for iwm_rx_addbuf() */
308
	bus_dmamap_t		spare_map;	/* for iwm_rx_addbuf() */
321
	bus_dma_tag_t           data_dmat;
309
	bus_dma_tag_t           data_dmat;
322
	int			cur;
310
	int			cur;
Lines 459-466 struct iwm_softc { Link Here
459
	struct iwm_rx_ring	rxq;
447
	struct iwm_rx_ring	rxq;
460
	int			qfullmsk;
448
	int			qfullmsk;
461
449
462
	int			sc_sf_state;
463
464
	/* ICT table. */
450
	/* ICT table. */
465
	struct iwm_dma_info	ict_dma;
451
	struct iwm_dma_info	ict_dma;
466
	int			ict_cur;
452
	int			ict_cur;
Lines 526-533 struct iwm_softc { Link Here
526
	struct iwm_notif_statistics_v10 sc_stats;
512
	struct iwm_notif_statistics_v10 sc_stats;
527
	int			sc_noise;
513
	int			sc_noise;
528
514
529
	caddr_t			sc_drvbpf;
530
531
	struct iwm_rx_radiotap_header sc_rxtap;
515
	struct iwm_rx_radiotap_header sc_rxtap;
532
	struct iwm_tx_radiotap_header sc_txtap;
516
	struct iwm_tx_radiotap_header sc_txtap;
533
517
Lines 580-582 struct iwm_softc { Link Here
580
#define	IWM_LOCK(_sc)		mtx_lock(&(_sc)->sc_mtx)
564
#define	IWM_LOCK(_sc)		mtx_lock(&(_sc)->sc_mtx)
581
#define	IWM_UNLOCK(_sc)		mtx_unlock(&(_sc)->sc_mtx)
565
#define	IWM_UNLOCK(_sc)		mtx_unlock(&(_sc)->sc_mtx)
582
#define IWM_LOCK_DESTROY(_sc)	mtx_destroy(&(_sc)->sc_mtx)
566
#define IWM_LOCK_DESTROY(_sc)	mtx_destroy(&(_sc)->sc_mtx)
567
568
static inline bool
569
iwm_fw_has_api(struct iwm_softc *sc, unsigned int api)
570
{
571
	return isset(sc->sc_fw.ucode_capa.enabled_api, api);
572
}
573
574
static inline bool
575
iwm_fw_has_capa(struct iwm_softc *sc, unsigned int capa)
576
{
577
	return isset(sc->sc_fw.ucode_capa.enabled_capa, capa);
578
}
(-)b/sys/modules/iwm/Makefile (-1 / +2 lines)
Lines 7-13 KMOD= if_iwm Link Here
7
SRCS=	if_iwm.c if_iwm_binding.c if_iwm_util.c if_iwm_phy_db.c
7
SRCS=	if_iwm.c if_iwm_binding.c if_iwm_util.c if_iwm_phy_db.c
8
SRCS+=	if_iwm_mac_ctxt.c if_iwm_phy_ctxt.c if_iwm_time_event.c
8
SRCS+=	if_iwm_mac_ctxt.c if_iwm_phy_ctxt.c if_iwm_time_event.c
9
SRCS+=	if_iwm_power.c if_iwm_scan.c if_iwm_led.c if_iwm_notif_wait.c
9
SRCS+=	if_iwm_power.c if_iwm_scan.c if_iwm_led.c if_iwm_notif_wait.c
10
SRCS+=	if_iwm_7000.c if_iwm_8000.c if_iwm_fw.c if_iwm_sta.c if_iwm_sf.c
10
SRCS+=	if_iwm_7000.c if_iwm_8000.c if_iwm_9000.c if_iwm_fw.c if_iwm_9260.c
11
SRCS+=	if_iwm_sta.c if_iwm_sf.c
11
# bus layer
12
# bus layer
12
SRCS+=	if_iwm_pcie_trans.c
13
SRCS+=	if_iwm_pcie_trans.c
13
SRCS+=	device_if.h bus_if.h pci_if.h opt_wlan.h opt_iwm.h
14
SRCS+=	device_if.h bus_if.h pci_if.h opt_wlan.h opt_iwm.h

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