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Lines 87-92
__FBSDID("$FreeBSD$");
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| 87 |
rounddown(BCM_SDHCI_SLOT_LEFT(slot), BCM_SDHCI_BUFFER_SIZE)) |
87 |
rounddown(BCM_SDHCI_SLOT_LEFT(slot), BCM_SDHCI_BUFFER_SIZE)) |
| 88 |
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88 |
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| 89 |
#define DATA_PENDING_MASK (SDHCI_INT_DATA_AVAIL | SDHCI_INT_SPACE_AVAIL) |
89 |
#define DATA_PENDING_MASK (SDHCI_INT_DATA_AVAIL | SDHCI_INT_SPACE_AVAIL) |
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90 |
#define DATA_XFER_MASK (DATA_PENDING_MASK | SDHCI_INT_DATA_END) |
| 90 |
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91 |
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| 91 |
#ifdef DEBUG |
92 |
#ifdef DEBUG |
| 92 |
static int bcm2835_sdhci_debug = 0; |
93 |
static int bcm2835_sdhci_debug = 0; |
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Lines 579-585
bcm_sdhci_start_dma_seg(struct bcm_sdhci_softc *sc)
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| 579 |
if (idx == 0) { |
580 |
if (idx == 0) { |
| 580 |
bus_dmamap_sync(sc->sc_dma_tag, sc->sc_dma_map, sync_op); |
581 |
bus_dmamap_sync(sc->sc_dma_tag, sc->sc_dma_map, sync_op); |
| 581 |
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582 |
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| 582 |
slot->intmask &= ~DATA_PENDING_MASK; |
583 |
slot->intmask &= ~DATA_XFER_MASK; |
| 583 |
bcm_sdhci_write_4(sc->sc_dev, slot, SDHCI_SIGNAL_ENABLE, |
584 |
bcm_sdhci_write_4(sc->sc_dev, slot, SDHCI_SIGNAL_ENABLE, |
| 584 |
slot->intmask); |
585 |
slot->intmask); |
| 585 |
} |
586 |
} |
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Lines 600-606
bcm_sdhci_dma_exit(struct bcm_sdhci_softc *sc)
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| 600 |
mtx_assert(&slot->mtx, MA_OWNED); |
601 |
mtx_assert(&slot->mtx, MA_OWNED); |
| 601 |
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602 |
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| 602 |
/* Re-enable interrupts */ |
603 |
/* Re-enable interrupts */ |
| 603 |
slot->intmask |= DATA_PENDING_MASK; |
604 |
slot->intmask |= DATA_XFER_MASK; |
| 604 |
bcm_sdhci_write_4(slot->bus, slot, SDHCI_SIGNAL_ENABLE, |
605 |
bcm_sdhci_write_4(slot->bus, slot, SDHCI_SIGNAL_ENABLE, |
| 605 |
slot->intmask); |
606 |
slot->intmask); |
| 606 |
} |
607 |
} |
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Lines 654-659
bcm_sdhci_dma_intr(int ch, void *arg)
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| 654 |
sdhci_finish_data(slot); |
655 |
sdhci_finish_data(slot); |
| 655 |
bcm_sdhci_dma_exit(sc); |
656 |
bcm_sdhci_dma_exit(sc); |
| 656 |
} |
657 |
} |
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658 |
} else if ((reg & SDHCI_INT_DATA_END) != 0) { |
| 659 |
bcm_sdhci_dma_exit(sc); |
| 660 |
bcm_sdhci_write_4(slot->bus, slot, SDHCI_INT_STATUS, |
| 661 |
reg); |
| 662 |
slot->flags &= ~PLATFORM_DATA_STARTED; |
| 663 |
sdhci_finish_data(slot); |
| 657 |
} else { |
664 |
} else { |
| 658 |
bcm_sdhci_dma_exit(sc); |
665 |
bcm_sdhci_dma_exit(sc); |
| 659 |
} |
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} |
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Lines 732-738
bcm_sdhci_finish_transfer(device_t dev, struct sdhci_slot *slot)
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| 732 |
{ |
739 |
{ |
| 733 |
struct bcm_sdhci_softc *sc = device_get_softc(slot->bus); |
740 |
struct bcm_sdhci_softc *sc = device_get_softc(slot->bus); |
| 734 |
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741 |
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| 735 |
/* Clean up */ |
742 |
/* |
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743 |
* Clean up. Interrupts are clearly enabled, because we received an |
| 744 |
* SDHCI_INT_DATA_END to get this far -- just make sure we don't leave |
| 745 |
* anything laying around. |
| 746 |
*/ |
| 736 |
if (sc->dmamap_seg_count != 0) { |
747 |
if (sc->dmamap_seg_count != 0) { |
| 737 |
/* |
748 |
/* |
| 738 |
* Our segment math should have worked out such that we would |
749 |
* Our segment math should have worked out such that we would |
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Lines 753-759
bcm_sdhci_finish_transfer(device_t dev, struct sdhci_slot *slot)
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| 753 |
sc->dmamap_seg_index = 0; |
764 |
sc->dmamap_seg_index = 0; |
| 754 |
} |
765 |
} |
| 755 |
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766 |
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| 756 |
bcm_sdhci_dma_exit(sc); |
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| 757 |
sdhci_finish_data(slot); |
767 |
sdhci_finish_data(slot); |
| 758 |
} |
768 |
} |
| 759 |
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769 |
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