FreeBSD Bugzilla – Attachment 210549 Details for
Bug 243201
Zynq/Zybo uart reference clock speed is wrong in device tree file.
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fix uart reference clock in zynq device tree files
patch.uartclk.txt (text/plain), 892 bytes, created by
Thomas Skibo
on 2020-01-09 00:36:15 UTC
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Description:
fix uart reference clock in zynq device tree files
Filename:
MIME Type:
Creator:
Thomas Skibo
Created:
2020-01-09 00:36:15 UTC
Size:
892 bytes
patch
obsolete
>Index: sys/dts/arm/zedboard.dts >=================================================================== >--- sys/dts/arm/zedboard.dts (revision 356206) >+++ sys/dts/arm/zedboard.dts (working copy) >@@ -54,6 +54,7 @@ > > &uart1 { > status = "okay"; >+ clock-frequency = <50000000>; > }; > > ð0 { >Index: sys/dts/arm/zynq-7000.dtsi >=================================================================== >--- sys/dts/arm/zynq-7000.dtsi (revision 356206) >+++ sys/dts/arm/zynq-7000.dtsi (working copy) >@@ -136,7 +136,7 @@ > reg = <0x0000 0x1000>; > interrupts = <0 27 4>; > interrupt-parent = <&GIC>; >- clock-frequency = <50000000>; >+ clock-frequency = <100000000>; > }; > > uart1: uart@1000 { >@@ -146,7 +146,7 @@ > reg = <0x1000 0x1000>; > interrupts = <0 50 4>; > interrupt-parent = <&GIC>; >- clock-frequency = <50000000>; >+ clock-frequency = <100000000>; > }; > > // USB controllers
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