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(-)b/gdb/arm-fbsd-kern.c (-2 / +17 lines)
Lines 73-84 arm_fbsd_supply_pcb(struct regcache *regcache, CORE_ADDR pcb_addr) Link Here
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  regcache->raw_supply_unsigned(ARM_PS_REGNUM, 0);
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  regcache->raw_supply_unsigned(ARM_PS_REGNUM, 0);
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}
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}
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#define PSR_MODE        0x0000001f      /* mode mask */
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#define PSR_USR32_MODE  0x00000010
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static struct trad_frame_cache *
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static struct trad_frame_cache *
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arm_fbsd_trapframe_cache (struct frame_info *this_frame, void **this_cache)
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arm_fbsd_trapframe_cache (struct frame_info *this_frame, void **this_cache)
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{
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{
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  struct gdbarch *gdbarch = get_frame_arch (this_frame);
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  struct gdbarch *gdbarch = get_frame_arch (this_frame);
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  enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
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  enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
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  struct trad_frame_cache *cache;
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  struct trad_frame_cache *cache;
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  uint32_t psr;
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  CORE_ADDR func, pc, sp;
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  CORE_ADDR func, pc, sp;
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  const char *name;
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  const char *name;
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  int i;
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  int i;
Lines 94-103 arm_fbsd_trapframe_cache (struct frame_info *this_frame, void **this_cache) Link Here
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  find_pc_partial_function (func, &name, NULL, NULL);
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  find_pc_partial_function (func, &name, NULL, NULL);
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  /* Read $PSR to determine where SP and LR are. */
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  psr = read_memory_unsigned_integer (sp, 4, byte_order);
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  for (i = 0; i <= 12; i++)
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  for (i = 0; i <= 12; i++)
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    trad_frame_set_reg_addr (cache, ARM_A1_REGNUM + i, sp + 4 + i * 4);
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    trad_frame_set_reg_addr (cache, ARM_A1_REGNUM + i, sp + 4 + i * 4);
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  trad_frame_set_reg_addr (cache, ARM_SP_REGNUM, sp + 14 * 4);
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  if ((psr & PSR_MODE) == PSR_USR32_MODE)
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  trad_frame_set_reg_addr (cache, ARM_LR_REGNUM, sp + 15 * 4);
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    {
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      trad_frame_set_reg_addr (cache, ARM_SP_REGNUM, sp + 14 * 4);
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      trad_frame_set_reg_addr (cache, ARM_LR_REGNUM, sp + 15 * 4);
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    }
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  else
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    {
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      trad_frame_set_reg_addr (cache, ARM_SP_REGNUM, sp + 16 * 4);
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      trad_frame_set_reg_addr (cache, ARM_LR_REGNUM, sp + 17 * 4);
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    }
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  trad_frame_set_reg_addr (cache, ARM_PC_REGNUM, sp + 18 * 4);
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  trad_frame_set_reg_addr (cache, ARM_PC_REGNUM, sp + 18 * 4);
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  trad_frame_set_reg_addr (cache, ARM_PS_REGNUM, sp);
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  trad_frame_set_reg_addr (cache, ARM_PS_REGNUM, sp);
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