Attachment #22040 for bug #38372

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Lines 122-128 Link Here

(-)/usr/home/brp/puc/200205211000/puc.c (-10 / +106 lines)
122		122
123	struct puc_device {	123	struct puc_device {
124	struct resource_list resources;	124	struct resource_list resources;
		125	u_int type; /* the type of the port: PUC_TYPE_NONE, _COM,
		126	* _LPT */
125	u_int serialfreq;	127	u_int serialfreq;
		128	u_int ppc_capabilities; /* flags for the LPT */
		129	u_int baserid;/* address of base register for LPT */
126	};	130	};
127		131
128	static int puc_pci_probe(device_t dev);	132	static int puc_pci_probe(device_t dev);
Lines 151-156 Link Here
151	static void puc_print_resource_list(struct resource_list *);	155	static void puc_print_resource_list(struct resource_list *);
152	#endif	156	#endif
153		157
		158
		159	/* allocate the a second IOPORT for LPT devices that need it */
		160	static void
		161	puc_alloc_ECP(device_t dev, struct puc_softc * sc, int xrid)
		162	{
		163	struct resource *res;
		164	int rid, bidx;
		165
		166	rid = xrid;
		167	bidx = PUC_PORT_BAR_INDEX(rid);
		168	if (sc->sc_bar_mappings[bidx].res != NULL)
		169	return;
		170	res = bus_alloc_resource(dev, SYS_RES_IOPORT, &rid,
		171	0ul, ~0ul, 1, RF_ACTIVE);
		172	if (res == NULL) {
		173	printf("could not get resource\n");
		174	return;
		175	}
		176	sc->sc_bar_mappings[bidx].res = res;
		177	#ifdef PUC_DEBUG
		178	printf("port bst %x, start %x, end %x\n",
		179	(u_int) rman_get_bustag(res), (u_int) rman_get_start(res),
		180	(u_int) rman_get_end(res));
		181	#endif
		182	}
		183
154	static int	184	static int
155	puc_pci_probe(device_t dev)	185	puc_pci_probe(device_t dev)
156	{	186	{
Lines 236-243 Link Here
236	sc->sc_bar_mappings[bidx].res = res;	267	sc->sc_bar_mappings[bidx].res = res;
237	#ifdef PUC_DEBUG	268	#ifdef PUC_DEBUG
238	printf("port bst %x, start %x, end %x\n",	269	printf("port bst %x, start %x, end %x\n",
239	(u_int)rman_get_bustag(res), (u_int)rman_get_start(res),	270	(u_int) rman_get_bustag(res), (u_int) rman_get_start(res),
240	(u_int)rman_get_end(res));	271	(u_int) rman_get_end(res));
		272	#endif
		273	#if 0
		274	/* for an LPT we allocate a second region */
		275	if ((sc->sc_desc->ports[i].type == PUC_PORT_TYPE_LPT)
		276	&& (sc->sc_desc->ports[i].serialfreq != 0x00)) {
		277	puc_alloc_ECP(dev, sc, 0x14);
		278	}
241	#endif	279	#endif
242	}	280	}
243		281
Lines 251-257 Link Here
251		289
252	switch (sc->sc_desc->ports[i].type) {	290	switch (sc->sc_desc->ports[i].type) {
253	case PUC_PORT_TYPE_COM:	291	case PUC_PORT_TYPE_COM:
254	typestr = "sio";	292	break;
		293	case PUC_PORT_TYPE_LPT:
255	break;	294	break;
256	default:	295	default:
257	continue;	296	continue;
Lines 286-292 Link Here
286	free(pdev, M_DEVBUF);	326	free(pdev, M_DEVBUF);
287	return (ENOMEM);	327	return (ENOMEM);
288	}	328	}
		329	rle->res->r_start = rman_get_start(res) +
		330	sc->sc_desc->ports[i].offset;
		331	rle->res->r_end = rle->res->r_start + 8 - 1;
		332	rle->res->r_bustag = rman_get_bustag(res);
		333	bus_space_subregion(rle->res->r_bustag,
		334	rman_get_bushandle(res),
		335	sc->sc_desc->ports[i].offset, 8,
		336	&rle->res->r_bushandle);
		337	}
		338	#if 0
		339	/*
		340	* if it is an LPT and we have a second IOPORT for ECP
		341	* allocated, then also copy it to the list
		342	*/
		343	if ((sc->sc_desc->ports[i].type == PUC_PORT_TYPE_LPT)
		344	&& (sc->sc_desc->ports[i].type != 0x00)) {
		345
		346	/* Now fake an IOPORT resource */
		347	res = sc->sc_bar_mappings[bidx].res;
		348	resource_list_add(&pdev->resources, SYS_RES_IOPORT, 1,
		349	rman_get_start(res) + sc->sc_desc->ports[i].offset,
		350	rman_get_end(res) + sc->sc_desc->ports[i].offset + 8 - 1,
		351	8);
		352	rle = resource_list_find(&pdev->resources, SYS_RES_IOPORT, 1);
289		353
		354	if (sc->barmuxed == 0) {
		355	rle->res = sc->sc_bar_mappings[bidx].res;
		356	} else {
		357	rle->res = malloc(sizeof(struct resource), M_DEVBUF,
		358	M_WAITOK \| M_ZERO);
		359	if (rle->res == NULL) {
		360	free(pdev, M_DEVBUF);
		361	return (ENOMEM);
		362	}
290	rle->res->r_start = rman_get_start(res) +	363	rle->res->r_start = rman_get_start(res) +
291	sc->sc_desc->ports[i].offset;	364	sc->sc_desc->ports[i].offset;
292	rle->res->r_end = rle->res->r_start + 8 - 1;	365	rle->res->r_end = rle->res->r_start + 8 - 1;
Lines 296-304 Link Here
296	sc->sc_desc->ports[i].offset, 8,	369	sc->sc_desc->ports[i].offset, 8,
297	&rle->res->r_bushandle);	370	&rle->res->r_bushandle);
298	}	371	}
		372	}
		373	#endif
		374	pdev->type = sc->sc_desc->ports[i].type;
299		375
		376	switch (pdev->type) {
		377	case PUC_PORT_TYPE_COM:
		378	typestr = "sio";
300	pdev->serialfreq = sc->sc_desc->ports[i].serialfreq;	379	pdev->serialfreq = sc->sc_desc->ports[i].serialfreq;
301		380	break;
		381	case PUC_PORT_TYPE_LPT:
		382	typestr = "ppc";
		383	pdev->ppc_capabilities = sc->sc_desc->ports[i].serialfreq;
		384	pdev->baserid = sc->sc_desc->ports[i].bar;
		385	break;
		386	}
302	childunit = puc_find_free_unit(typestr);	387	childunit = puc_find_free_unit(typestr);
303	sc->sc_ports[i].dev = device_add_child(dev, typestr, childunit);	388	sc->sc_ports[i].dev = device_add_child(dev, typestr, childunit);
304	if (sc->sc_ports[i].dev == NULL) {	389	if (sc->sc_ports[i].dev == NULL) {
Lines 320-326 Link Here
320	sc->sc_desc->ports[i].type,	405	sc->sc_desc->ports[i].type,
321	sc->sc_desc->ports[i].bar,	406	sc->sc_desc->ports[i].bar,
322	sc->sc_desc->ports[i].offset);	407	sc->sc_desc->ports[i].offset);
323	print_resource_list(&pdev->resources);	408	puc_print_resource_list(&pdev->resources);
324	#endif	409	#endif
325	if (device_probe_and_attach(sc->sc_ports[i].dev) != 0) {	410	if (device_probe_and_attach(sc->sc_ports[i].dev) != 0) {
326	if (sc->barmuxed) {	411	if (sc->barmuxed) {
Lines 343-350 Link Here
343	* This is just an brute force interrupt handler. It just calls all the	428	* This is just an brute force interrupt handler. It just calls all the
344	* registered handlers sequencially.	429	* registered handlers sequencially.
345	*	430	*
346	* Later on we should maybe have a different handler for boards that can	431	* Later on we should maybe have a different handler for boards that can tell us
347	* tell us which device generated the interrupt.	432	* which device generated the interrupt.
348	*/	433	*/
349	static void	434	static void
350	puc_intr(void *arg)	435	puc_intr(void *arg)
Lines 515-521 Link Here
515	#undef rdspio	598	#undef rdspio
516	#undef wrspio	599	#undef wrspio
517		600
518	static int puc_find_free_unit(char *name)	601	static int
		602	puc_find_free_unit(char *name)
519	{	603	{
520	devclass_t dc;	604	devclass_t dc;
521	int start;	605	int start;
Lines 543-552 Link Here
543	{	627	{
544	struct resource_list_entry *rle;	628	struct resource_list_entry *rle;
545		629
546	printf("print_resource_list: rl %p\n", rl);	630	printf("puc_print_resource_list: rl %p\n", rl);
547	SLIST_FOREACH(rle, rl, link)	631	SLIST_FOREACH(rle, rl, link)
548	printf("type %x, rid %x\n", rle->type, rle->rid);	632	printf("type %x, rid %x\n", rle->type, rle->rid);
549	printf("print_resource_list: end.\n");	633	printf("puc_print_resource_list: end.\n");
550	}	634	}
551	#endif	635	#endif
552		636
Lines 676-681 Link Here
676	case PUC_IVAR_FREQ:	760	case PUC_IVAR_FREQ:
677	*result = pdev->serialfreq;	761	*result = pdev->serialfreq;
678	break;	762	break;
		763	case PUC_IVAR_TYPE:
		764	*result = pdev->type;
		765	break;
		766	case PUC_IVAR_BASERID:
		767	*result = pdev->baserid;
		768	break;
		769	/*
		770	* case PUC_IVAR_EXTREG: result = pdev->extreg; break;
		771	*/
		772	case PUC_IVAR_PPCCAP:
		773	*result = pdev->ppc_capabilities;
		774	break;
679	default:	775	default:
680	return (ENOENT);	776	return (ENOENT);
681	}	777	}

Lines 39-49 Link Here

(-)/usr/home/brp/puc/200205211000/pucdata.c (+13 lines)
39	*/	39	*/
40		40
41	#include <sys/param.h>	41	#include <sys/param.h>
		42	#include <sys/bus.h>
		43	#include <machine/bus.h>
42		44
43	#include <pci/pcireg.h>	45	#include <pci/pcireg.h>
44	#include <pci/pcivar.h>	46	#include <pci/pcivar.h>
45	#include <isa/sioreg.h>	47	#include <isa/sioreg.h>
		48	#include <isa/ppcreg.h>
46	#include <dev/puc/pucvar.h>	49	#include <dev/puc/pucvar.h>
		50	#include <dev/ppbus/ppbconf.h>
47		51
48	#define COM_FREQ DEFAULT_RCLK	52	#define COM_FREQ DEFAULT_RCLK
49		53
Lines 686-691 Link Here
686	{ PUC_PORT_TYPE_LPT, 0x10, 0x00, 0x00 },	690	{ PUC_PORT_TYPE_LPT, 0x10, 0x00, 0x00 },
687	},	691	},
688	},	692	},
		693
		694	/* Oxford Semiconductor OX12PCI840 PCI Parallel port */
		695	{ "Qxford Semiconductor OX12PCI840 Parallel port",
		696	{ 0x1415, 0x8403, 0, 0 },
		697	{ 0xffff, 0xffff, 0, 0 },
		698	{
		699	{ PUC_PORT_TYPE_LPT, 0x10, 0x00, 0x00 },
		700	},
		701	},
689		702
690	/* NetMos 2S1P PCI 16C650 : 2S, 1P */	703	/* NetMos 2S1P PCI 16C650 : 2S, 1P */
691	{ "NetMos NM9835 Dual UART and 1284 Printer port",	704	{ "NetMos NM9835 Dual UART and 1284 Printer port",

Lines 74-80 Link Here

(-)/usr/home/brp/puc/200205211000/pucvar.h (-2 / +6 lines)
74	int type;	74	int type;
75	int bar;	75	int bar;
76	int offset;	76	int offset;
77	u_int serialfreq;	77	u_int serialfreq; /* for LPT devices: capabilities of lpt */
78	} ports[PUC_MAX_PORTS];	78	} ports[PUC_MAX_PORTS];
79	};	79	};
80		80
Lines 94-100 Link Here
94	#define PUC_MAX_BAR 6	94	#define PUC_MAX_BAR 6
95		95
96	enum puc_device_ivars {	96	enum puc_device_ivars {
97	PUC_IVAR_FREQ	97	PUC_IVAR_FREQ,
		98	PUC_IVAR_TYPE,
		99	PUC_IVAR_BASERID,
		100	PUC_IVAR_EXTREG,
		101	PUC_IVAR_PPCCAP
98	};	102	};
99		103
100	extern const struct puc_device_description puc_devices[];	104	extern const struct puc_device_description puc_devices[];




}

DRIVER_MODULE(ppc, isa, ppc_driver, ppc_devclass, 0, 0);

#ifdef __i386__
#include "puc.h"
#endif

#if NPUC <= 0
#error NPUC not defined
#endif

#if NPUC > 0
#include <dev/puc/pucvar.h>

static int ppc_puc_probe(device_t dev);
static int ppc_puc_attach(device_t dev);


static device_method_t ppc_puc_methods[] = {
	/* device interface */
	DEVMETHOD(device_probe,         ppc_puc_probe),
	DEVMETHOD(device_attach,        ppc_puc_attach),

	/* bus interface */
	DEVMETHOD(bus_read_ivar,	ppc_read_ivar),
	DEVMETHOD(bus_setup_intr,	ppc_setup_intr),
	DEVMETHOD(bus_teardown_intr,	ppc_teardown_intr),

	/* ppbus interface */
	DEVMETHOD(ppbus_io,		ppc_io),
	DEVMETHOD(ppbus_exec_microseq,	ppc_exec_microseq),
	DEVMETHOD(ppbus_reset_epp,	ppc_reset_epp),
	DEVMETHOD(ppbus_setmode,	ppc_setmode),
	DEVMETHOD(ppbus_ecp_sync,	ppc_ecp_sync),
	DEVMETHOD(ppbus_read,		ppc_read),
	DEVMETHOD(ppbus_write,		ppc_write),

        { 0, 0 }
  };

static driver_t ppc_puc_driver = {
	"ppc",
	ppc_puc_methods,
	sizeof(struct ppc_data),
};

static int ppc_puc_probe(device_t dev)
{
  u_int type;

  if (BUS_READ_IVAR(device_get_parent(dev), dev, PUC_IVAR_TYPE,
		    &type) != 0)
    type = PUC_PORT_TYPE_NONE;
  if (type != PUC_PORT_TYPE_LPT)
    return 1;

  return (0);
}

static int ppc_puc_attach(device_t dev)
{
	struct ppc_data *ppc;

	device_t ppbus;

	/*
	 * Allocate the ppc_data structure.
	 */
	ppc = DEVTOSOFTC(dev);
	bzero(ppc, sizeof(struct ppc_data));

	ppc->rid_irq = ppc->rid_drq = ppc->rid_ioport = 0;
	ppc->res_irq = ppc->res_drq = ppc->res_ioport = 0;

	/* IO port is mandatory */
	ppc->rid_ioport = 0;
	ppc->res_ioport =
	  bus_alloc_resource(dev, SYS_RES_IOPORT,
			     &ppc->rid_ioport, 0, ~0,
			     1, RF_ACTIVE);
 	ppc->ppc_base = rman_get_start(ppc->res_ioport);

	ppc->bsh = rman_get_bushandle(ppc->res_ioport);
	ppc->bst = rman_get_bustag(ppc->res_ioport);

	BUS_READ_IVAR(device_get_parent(dev), dev, PUC_IVAR_PPCCAP,
		      &ppc->ppc_avm);

	/* 0x20 enable interrupt */
	ppc->ppc_flags = PPB_SPP | 0x20;

	ppc->rid_irq = 0;
	ppc->res_irq = bus_alloc_resource(dev, SYS_RES_IRQ, &ppc->rid_irq,
					  0ul, ~0ul, 1, RF_SHAREABLE);

	if (ppc->res_irq)
	  {
	    ppc->ppc_irq = rman_get_start(ppc->res_irq);
	  }

	if (ppc->res_drq)
		ppc->ppc_dmachan = rman_get_start(ppc->res_drq);

	ppc->ppc_unit = device_get_unit(dev);
	ppc->ppc_model = GENERIC;

	ppc->ppc_mode = PPB_COMPATIBLE;
	ppc->ppc_epp = (ppc->ppc_flags & 0x10) >> 4;

	ppc->ppc_type = PPC_TYPE_GENERIC;


	device_printf(dev, "puc chipset (%s) in %s mode%s\n",
		      ppc_avms[ppc->ppc_avm],
		      ppc_modes[ppc->ppc_mode], (PPB_IS_EPP(ppc->ppc_mode)) ?
		      ppc_epp_protocol[ppc->ppc_epp] : "");

	if (ppc->ppc_fifo)
		device_printf(dev, "FIFO with %d/%d/%d bytes threshold\n",
			      ppc->ppc_fifo, ppc->ppc_wthr, ppc->ppc_rthr);

#if 0
/*  	if ((ppc->ppc_avm & PPB_ECP) && (ppc->ppc_dmachan > 0)) { */
  		/* acquire the DMA channel forever */	/* XXX */
/*  		isa_dma_acquire(ppc->ppc_dmachan); */
  		isa_dmainit(ppc->ppc_dmachan, 1024); /* nlpt.BUFSIZE */
/*  	} */
#endif

	/* add ppbus as a child of this isa to parallel bridge */
	ppbus = device_add_child(dev, "ppbus", -1);

	/*
	 * Probe the ppbus and attach devices found.
	 */
	device_probe_and_attach(ppbus);

	return (0);
}


DRIVER_MODULE(ppc, puc, ppc_puc_driver, ppc_devclass, 0, 0);
#endif




.\"
.\" $FreeBSD: src/share/man/man4/puc.4,v 1.1.2.1 2002/03/07 17:48:38 jhay Exp $
.\"
.Dd 21 May 2002
.Dt PUC 4
.Os
.Sh NAME

.Cd device pci
.Cd device puc
.Cd device sio
.Cd device ppc
.Cd options PUC_FASTINTR
.Sh DESCRIPTION
This driver acts as a shim to connect pci serial ports to the
.Xr sio 4
driver and to connect pci parallel ports to the
.Xr ppc 4 driver.
.Pp
The list of supported devices is in 
.Em src/sys/dev/puc/pucdata.c.

.Em silo overflow
errors.
It cannot be used if the interrupt is shared.
.Pp
The parallel port driver hooks into the
.Xr ppc 4
layer and therefore allows the port to be used by all devices that
interact with the parallel bus device.
.Sh SEE ALSO
.Xr sio 4
.Xr ppc 4
.Xr ppbus 4
.Sh HISTORY
This driver took the idea from the
.Nx

driver and still use the same structure to describe cards to ease exchanging
card info.
.Sh BUGS
Parallel ports are only supported in compatibility mode.
.Xr sio 4
driver at the moment.
Someone should write support for parallel ports using the
.Xr lpt 4
driver.

Return to bug 38372

Lines 2162-2164 Link Here

(-)/usr/home/brp/puc/200205211000/ppc.c (+141 lines)
2162	}	2162	}
2163		2163
2164	DRIVER_MODULE(ppc, isa, ppc_driver, ppc_devclass, 0, 0);	2164	DRIVER_MODULE(ppc, isa, ppc_driver, ppc_devclass, 0, 0);
		2165
		2166	#ifdef __i386__
		2167	#include "puc.h"
		2168	#endif
		2169
		2170	#if NPUC <= 0
		2171	#error NPUC not defined
		2172	#endif
		2173
		2174	#if NPUC > 0
		2175	#include <dev/puc/pucvar.h>
		2176
		2177	static int ppc_puc_probe(device_t dev);
		2178	static int ppc_puc_attach(device_t dev);
		2179
		2180
		2181	static device_method_t ppc_puc_methods[] = {
		2182	/* device interface */
		2183	DEVMETHOD(device_probe, ppc_puc_probe),
		2184	DEVMETHOD(device_attach, ppc_puc_attach),
		2185
		2186	/* bus interface */
		2187	DEVMETHOD(bus_read_ivar, ppc_read_ivar),
		2188	DEVMETHOD(bus_setup_intr, ppc_setup_intr),
		2189	DEVMETHOD(bus_teardown_intr, ppc_teardown_intr),
		2190
		2191	/* ppbus interface */
		2192	DEVMETHOD(ppbus_io, ppc_io),
		2193	DEVMETHOD(ppbus_exec_microseq, ppc_exec_microseq),
		2194	DEVMETHOD(ppbus_reset_epp, ppc_reset_epp),
		2195	DEVMETHOD(ppbus_setmode, ppc_setmode),
		2196	DEVMETHOD(ppbus_ecp_sync, ppc_ecp_sync),
		2197	DEVMETHOD(ppbus_read, ppc_read),
		2198	DEVMETHOD(ppbus_write, ppc_write),
		2199
		2200	{ 0, 0 }
		2201	};
		2202
		2203	static driver_t ppc_puc_driver = {
		2204	"ppc",
		2205	ppc_puc_methods,
		2206	sizeof(struct ppc_data),
		2207	};
		2208
		2209	static int ppc_puc_probe(device_t dev)
		2210	{
		2211	u_int type;
		2212
		2213	if (BUS_READ_IVAR(device_get_parent(dev), dev, PUC_IVAR_TYPE,
		2214	&type) != 0)
		2215	type = PUC_PORT_TYPE_NONE;
		2216	if (type != PUC_PORT_TYPE_LPT)
		2217	return 1;
		2218
		2219	return (0);
		2220	}
		2221
		2222	static int ppc_puc_attach(device_t dev)
		2223	{
		2224	struct ppc_data *ppc;
		2225
		2226	device_t ppbus;
		2227
		2228	/*
2229	* Allocate the ppc_data structure.
2230	*/
2231	ppc = DEVTOSOFTC(dev);
2232	bzero(ppc, sizeof(struct ppc_data));
2233
2234	ppc->rid_irq = ppc->rid_drq = ppc->rid_ioport = 0;
2235	ppc->res_irq = ppc->res_drq = ppc->res_ioport = 0;
2236
2237	/* IO port is mandatory */
2238	ppc->rid_ioport = 0;
2239	ppc->res_ioport =
2240	bus_alloc_resource(dev, SYS_RES_IOPORT,
2241	&ppc->rid_ioport, 0, ~0,
2242	1, RF_ACTIVE);
2243	ppc->ppc_base = rman_get_start(ppc->res_ioport);
2244
2245	ppc->bsh = rman_get_bushandle(ppc->res_ioport);
2246	ppc->bst = rman_get_bustag(ppc->res_ioport);
2247
2248	BUS_READ_IVAR(device_get_parent(dev), dev, PUC_IVAR_PPCCAP,
2249	&ppc->ppc_avm);
2250
2251	/* 0x20 enable interrupt */
2252	ppc->ppc_flags = PPB_SPP \| 0x20;
2253
2254	ppc->rid_irq = 0;
2255	ppc->res_irq = bus_alloc_resource(dev, SYS_RES_IRQ, &ppc->rid_irq,
2256	0ul, ~0ul, 1, RF_SHAREABLE);
2257
2258	if (ppc->res_irq)
2259	{
2260	ppc->ppc_irq = rman_get_start(ppc->res_irq);
2261	}
2262
2263	if (ppc->res_drq)
2264	ppc->ppc_dmachan = rman_get_start(ppc->res_drq);
2265
2266	ppc->ppc_unit = device_get_unit(dev);
2267	ppc->ppc_model = GENERIC;
2268
2269	ppc->ppc_mode = PPB_COMPATIBLE;
2270	ppc->ppc_epp = (ppc->ppc_flags & 0x10) >> 4;
2271
2272	ppc->ppc_type = PPC_TYPE_GENERIC;
2273
2274
2275	device_printf(dev, "puc chipset (%s) in %s mode%s\n",
2276	ppc_avms[ppc->ppc_avm],
2277	ppc_modes[ppc->ppc_mode], (PPB_IS_EPP(ppc->ppc_mode)) ?
2278	ppc_epp_protocol[ppc->ppc_epp] : "");
2279
2280	if (ppc->ppc_fifo)
2281	device_printf(dev, "FIFO with %d/%d/%d bytes threshold\n",
2282	ppc->ppc_fifo, ppc->ppc_wthr, ppc->ppc_rthr);
2283
2284	#if 0
2285	/* if ((ppc->ppc_avm & PPB_ECP) && (ppc->ppc_dmachan > 0)) { */
2286	/* acquire the DMA channel forever / / XXX */
2287	/* isa_dma_acquire(ppc->ppc_dmachan); */
2288	isa_dmainit(ppc->ppc_dmachan, 1024); /* nlpt.BUFSIZE */
2289	/* } */
2290	#endif
2291
2292	/* add ppbus as a child of this isa to parallel bridge */
2293	ppbus = device_add_child(dev, "ppbus", -1);
2294
2295	/*
2296	* Probe the ppbus and attach devices found.
2297	*/
2298	device_probe_and_attach(ppbus);
2299
2300	return (0);
2301	}
2302
2303
2304	DRIVER_MODULE(ppc, puc, ppc_puc_driver, ppc_devclass, 0, 0);
2305	#endif

Lines 24-30 Link Here

(-)/usr/home/brp/puc/200205211000/puc.4 (-8 / +12 lines)
24	.\"	24	.\"
25	.\" $FreeBSD: src/share/man/man4/puc.4,v 1.1.2.1 2002/03/07 17:48:38 jhay Exp $	25	.\" $FreeBSD: src/share/man/man4/puc.4,v 1.1.2.1 2002/03/07 17:48:38 jhay Exp $
26	.\"	26	.\"
27	.Dd February 7, 2002	27	.Dd 21 May 2002
28	.Dt PUC 4	28	.Dt PUC 4
29	.Os	29	.Os
30	.Sh NAME	30	.Sh NAME
Lines 34-44 Link Here
34	.Cd device pci	34	.Cd device pci
35	.Cd device puc	35	.Cd device puc
36	.Cd device sio	36	.Cd device sio
		37	.Cd device ppc
37	.Cd options PUC_FASTINTR	38	.Cd options PUC_FASTINTR
38	.Sh DESCRIPTION	39	.Sh DESCRIPTION
39	This driver acts as a shim to connect pci serial ports to the	40	This driver acts as a shim to connect pci serial ports to the
40	.Xr sio 4	41	.Xr sio 4
41	driver.	42	driver and to connect pci parallel ports to the
		43	.Xr ppc 4 driver.
42	.Pp	44	.Pp
43	The list of supported devices is in	45	The list of supported devices is in
44	.Em src/sys/dev/puc/pucdata.c.	46	.Em src/sys/dev/puc/pucdata.c.
Lines 51-58 Link Here
51	.Em silo overflow	53	.Em silo overflow
52	errors.	54	errors.
53	It cannot be used if the interrupt is shared.	55	It cannot be used if the interrupt is shared.
		56	.Pp
		57	The parallel port driver hooks into the
		58	.Xr ppc 4
		59	layer and therefore allows the port to be used by all devices that
		60	interact with the parallel bus device.
54	.Sh SEE ALSO	61	.Sh SEE ALSO
55	.Xr sio 4	62	.Xr sio 4
		63	.Xr ppc 4
		64	.Xr ppbus 4
56	.Sh HISTORY	65	.Sh HISTORY
57	This driver took the idea from the	66	This driver took the idea from the
58	.Nx	67	.Nx
Lines 60-68 Link Here
60	driver and still use the same structure to describe cards to ease exchanging	69	driver and still use the same structure to describe cards to ease exchanging
61	card info.	70	card info.
62	.Sh BUGS	71	.Sh BUGS
63	Only serial ports are supported through the	72	Parallel ports are only supported in compatibility mode.
64	.Xr sio 4
65	driver at the moment.
66	Someone should write support for parallel ports using the
67	.Xr lpt 4
68	driver.