Attachment #221502 for bug #243401

Lines 103-108 Link Here

(-)sys/dev/ahci/ahci.c (-35 / +212 lines)
103	#define RECOVERY_REQUEST_SENSE 2	103	#define RECOVERY_REQUEST_SENSE 2
104	#define recovery_slot spriv_field1	104	#define recovery_slot spriv_field1
105		105
		106	SYSCTL_NODE(_hw, OID_AUTO, ahci, CTLFLAG_RW, 0, "AHCI debugging");
		107
		108	int ahci_verbose = 0;
		109	SYSCTL_INT(_hw_ahci, OID_AUTO, verbose, CTLFLAG_RWTUN,
		110	&ahci_verbose, 0, "AHCI debug verbosity");
		111
106	static uint32_t	112	static uint32_t
107	ahci_ch_detval(struct ahci_channel *ch, uint32_t val)	113	ahci_ch_detval(struct ahci_channel *ch, uint32_t val)
108	{	114	{
Lines 125-131 Link Here
125	AHCI_CCCC_EN);	131	AHCI_CCCC_EN);
126	ctlr->cccv = (ATA_INL(ctlr->r_mem, AHCI_CCCC) &	132	ctlr->cccv = (ATA_INL(ctlr->r_mem, AHCI_CCCC) &
127	AHCI_CCCC_INT_MASK) >> AHCI_CCCC_INT_SHIFT;	133	AHCI_CCCC_INT_MASK) >> AHCI_CCCC_INT_SHIFT;
128	if (bootverbose) {	134	if (bootverbose \|\| ahci_verbose) {
129	device_printf(dev,	135	device_printf(dev,
130	"CCC with %dms/4cmd enabled on vector %d\n",	136	"CCC with %dms/4cmd enabled on vector %d\n",
131	ctlr->ccc, ctlr->cccv);	137	ctlr->ccc, ctlr->cccv);
Lines 322-328 Link Here
322	device_printf(dev, "quirks=0x%b\n", ctlr->quirks,	328	device_printf(dev, "quirks=0x%b\n", ctlr->quirks,
323	AHCI_Q_BIT_STRING);	329	AHCI_Q_BIT_STRING);
324	}	330	}
325	if (bootverbose) {	331	if (bootverbose \|\| ahci_verbose) {
326	device_printf(dev, "Caps:%s%s%s%s%s%s%s%s %sGbps",	332	device_printf(dev, "Caps:%s%s%s%s%s%s%s%s %sGbps",
327	(ctlr->caps & AHCI_CAP_64BIT) ? " 64bit":"",	333	(ctlr->caps & AHCI_CAP_64BIT) ? " 64bit":"",
328	(ctlr->caps & AHCI_CAP_SNCQ) ? " NCQ":"",	334	(ctlr->caps & AHCI_CAP_SNCQ) ? " NCQ":"",
Lines 347-353 Link Here
347	(ctlr->caps & AHCI_CAP_SXS) ? " eSATA":"",	353	(ctlr->caps & AHCI_CAP_SXS) ? " eSATA":"",
348	(ctlr->caps & AHCI_CAP_NPMASK) + 1);	354	(ctlr->caps & AHCI_CAP_NPMASK) + 1);
349	}	355	}
350	if (bootverbose && version >= 0x00010200) {	356	if ((bootverbose \|\| ahci_verbose) && version >= 0x00010200) {
351	device_printf(dev, "Caps2:%s%s%s%s%s%s\n",	357	device_printf(dev, "Caps2:%s%s%s%s%s%s\n",
352	(ctlr->caps2 & AHCI_CAP2_DESO) ? " DESO":"",	358	(ctlr->caps2 & AHCI_CAP2_DESO) ? " DESO":"",
353	(ctlr->caps2 & AHCI_CAP2_SADM) ? " SADM":"",	359	(ctlr->caps2 & AHCI_CAP2_SADM) ? " SADM":"",
Lines 857-863 Link Here
857	ch->chcaps \|= AHCI_P_CMD_FBSCP;	863	ch->chcaps \|= AHCI_P_CMD_FBSCP;
858	if (ch->caps2 & AHCI_CAP2_SDS)	864	if (ch->caps2 & AHCI_CAP2_SDS)
859	ch->chscaps = ATA_INL(ch->r_mem, AHCI_P_DEVSLP);	865	ch->chscaps = ATA_INL(ch->r_mem, AHCI_P_DEVSLP);
860	if (bootverbose) {	866	if (bootverbose \|\| ahci_verbose) {
861	device_printf(dev, "Caps:%s%s%s%s%s%s\n",	867	device_printf(dev, "Caps:%s%s%s%s%s%s\n",
862	(ch->chcaps & AHCI_P_CMD_HPCP) ? " HPCP":"",	868	(ch->chcaps & AHCI_P_CMD_HPCP) ? " HPCP":"",
863	(ch->chcaps & AHCI_P_CMD_MPSP) ? " MPSP":"",	869	(ch->chcaps & AHCI_P_CMD_MPSP) ? " MPSP":"",
Lines 980-985 Link Here
980	struct ahci_channel *ch = device_get_softc(dev);	986	struct ahci_channel *ch = device_get_softc(dev);
981	uint64_t work;	987	uint64_t work;
982		988
		989	if (ahci_verbose > 2)
		990	device_printf(dev, "ahci_ch_init: Start\n");
		991
983	/* Disable port interrupts */	992	/* Disable port interrupts */
984	ATA_OUTL(ch->r_mem, AHCI_P_IE, 0);	993	ATA_OUTL(ch->r_mem, AHCI_P_IE, 0);
985	/* Setup work areas */	994	/* Setup work areas */
Lines 996-1001 Link Here
996	((ch->pm_level > 2) ? AHCI_P_CMD_ASP : 0 )));	1005	((ch->pm_level > 2) ? AHCI_P_CMD_ASP : 0 )));
997	ahci_start_fr(ch);	1006	ahci_start_fr(ch);
998	ahci_start(ch, 1);	1007	ahci_start(ch, 1);
		1008
		1009	if (ahci_verbose > 2)
		1010	device_printf(dev, "ahci_ch_init: Done\n");
999	return (0);	1011	return (0);
1000	}	1012	}
1001		1013
Lines 1004-1009 Link Here
1004	{	1016	{
1005	struct ahci_channel *ch = device_get_softc(dev);	1017	struct ahci_channel *ch = device_get_softc(dev);
1006		1018
		1019	if (ahci_verbose > 2)
		1020	device_printf(dev, "ahci_ch_deinit: Start\n");
		1021
1007	/* Disable port interrupts. */	1022	/* Disable port interrupts. */
1008	ATA_OUTL(ch->r_mem, AHCI_P_IE, 0);	1023	ATA_OUTL(ch->r_mem, AHCI_P_IE, 0);
1009	/* Reset command register. */	1024	/* Reset command register. */
Lines 1017-1022 Link Here
1017	DELAY(100);	1032	DELAY(100);
1018	/* Disable PHY. */	1033	/* Disable PHY. */
1019	ATA_OUTL(ch->r_mem, AHCI_P_SCTL, ATA_SC_DET_DISABLE);	1034	ATA_OUTL(ch->r_mem, AHCI_P_SCTL, ATA_SC_DET_DISABLE);
		1035
		1036	if (ahci_verbose > 2)
		1037	device_printf(dev, "ahci_ch_deinit: Done\n");
		1038
1020	return (0);	1039	return (0);
1021	}	1040	}
1022		1041
Lines 1045-1055 Link Here
1045	{	1064	{
1046	struct ahci_channel *ch = device_get_softc(dev);	1065	struct ahci_channel *ch = device_get_softc(dev);
1047		1066
		1067	if (ahci_verbose > 2)
		1068	device_printf(dev, "ahci_ch_resume: Start\n");
		1069
1048	mtx_lock(&ch->mtx);	1070	mtx_lock(&ch->mtx);
1049	ahci_ch_init(dev);	1071	ahci_ch_init(dev);
1050	ahci_reset(ch);	1072	ahci_reset(ch);
1051	xpt_release_simq(ch->sim, TRUE);	1073	xpt_release_simq(ch->sim, TRUE);
1052	mtx_unlock(&ch->mtx);	1074	mtx_unlock(&ch->mtx);
		1075
		1076	if (ahci_verbose > 2)
		1077	device_printf(dev, "ahci_ch_resume: Done\n");
1053	return (0);	1078	return (0);
1054	}	1079	}
1055		1080
Lines 1218-1230 Link Here
1218	static int	1243	static int
1219	ahci_phy_check_events(struct ahci_channel *ch, u_int32_t serr)	1244	ahci_phy_check_events(struct ahci_channel *ch, u_int32_t serr)
1220	{	1245	{
1221
1222	if (((ch->pm_level == 0) && (serr & ATA_SE_PHY_CHANGED)) \|\|	1246	if (((ch->pm_level == 0) && (serr & ATA_SE_PHY_CHANGED)) \|\|
1223	((ch->pm_level != 0 \|\| ch->listening) && (serr & ATA_SE_EXCHANGED))) {	1247	((ch->pm_level != 0 \|\| ch->listening) && (serr & ATA_SE_EXCHANGED))) {
1224	u_int32_t status = ATA_INL(ch->r_mem, AHCI_P_SSTS);	1248	u_int32_t status = ATA_INL(ch->r_mem, AHCI_P_SSTS);
1225	union ccb *ccb;	1249	union ccb *ccb;
1226		1250
1227	if (bootverbose) {	1251	if (bootverbose \|\| ahci_verbose) {
1228	if ((status & ATA_SS_DET_MASK) != ATA_SS_DET_NO_DEVICE)	1252	if ((status & ATA_SS_DET_MASK) != ATA_SS_DET_NO_DEVICE)
1229	device_printf(ch->dev, "CONNECT requested\n");	1253	device_printf(ch->dev, "CONNECT requested\n");
1230	else	1254	else
Lines 1259-1265 Link Here
1259	if ((status & AHCI_P_CMD_CPD) == 0)	1283	if ((status & AHCI_P_CMD_CPD) == 0)
1260	return;	1284	return;
1261		1285
1262	if (bootverbose) {	1286	if (bootverbose \|\| ahci_verbose) {
1263	dev = ch->dev;	1287	dev = ch->dev;
1264	if (status & AHCI_P_CMD_CPS) {	1288	if (status & AHCI_P_CMD_CPS) {
1265	device_printf(dev, "COLD CONNECT requested\n");	1289	device_printf(dev, "COLD CONNECT requested\n");
Lines 1285-1291 Link Here
1285		1309
1286	if (ch->caps & AHCI_CAP_SSNTF)	1310	if (ch->caps & AHCI_CAP_SSNTF)
1287	ATA_OUTL(ch->r_mem, AHCI_P_SNTF, status);	1311	ATA_OUTL(ch->r_mem, AHCI_P_SNTF, status);
1288	if (bootverbose)	1312	if (bootverbose \|\| ahci_verbose)
1289	device_printf(ch->dev, "SNTF 0x%04x\n", status);	1313	device_printf(ch->dev, "SNTF 0x%04x\n", status);
1290	for (i = 0; i < 16; i++) {	1314	for (i = 0; i < 16; i++) {
1291	if ((status & (1 << i)) == 0)	1315	if ((status & (1 << i)) == 0)
Lines 1673-1678 Link Here
1673	uint8_t val;	1697	uint8_t val;
1674	uint16_t cmd_flags;	1698	uint16_t cmd_flags;
1675		1699
		1700	if (!mtx_owned(&ch->mtx))
		1701	device_printf(ch->dev, "ahci_execute_transaction: channel mutex not owned!\n");
		1702
1676	/* Get a piece of the workspace for this request */	1703	/* Get a piece of the workspace for this request */
1677	ctp = (struct ahci_cmd_tab *)	1704	ctp = (struct ahci_cmd_tab *)
1678	(ch->dma.work + AHCI_CT_OFFSET + (AHCI_CT_SIZE * slot->slot));	1705	(ch->dma.work + AHCI_CT_OFFSET + (AHCI_CT_SIZE * slot->slot));
Lines 1698-1703 Link Here
1698	if (ccb->ataio.cmd.control & ATA_A_RESET) {	1725	if (ccb->ataio.cmd.control & ATA_A_RESET) {
1699	softreset = 1;	1726	softreset = 1;
1700	/* Kick controller into sane state */	1727	/* Kick controller into sane state */
		1728	if (ahci_verbose > 2)
		1729	device_printf(ch->dev, "ahci_execute_transaction: Kicking controller into sane state\n");
1701	ahci_stop(ch);	1730	ahci_stop(ch);
1702	ahci_clo(ch);	1731	ahci_clo(ch);
1703	ahci_start(ch, 0);	1732	ahci_start(ch, 0);
Lines 1943-1948 Link Here
1943	int lastto;	1972	int lastto;
1944	uint32_t sig;	1973	uint32_t sig;
1945		1974
		1975	if (!mtx_owned(&ch->mtx))
		1976	device_printf(ch->dev, "ahci_end_transaction: channel mutex not owned!\n");
		1977
1946	bus_dmamap_sync(ch->dma.work_tag, ch->dma.work_map,	1978	bus_dmamap_sync(ch->dma.work_tag, ch->dma.work_map,
1947	BUS_DMASYNC_POSTREAD \| BUS_DMASYNC_POSTWRITE);	1979	BUS_DMASYNC_POSTREAD \| BUS_DMASYNC_POSTWRITE);
1948	clp = (struct ahci_cmd_list *)	1980	clp = (struct ahci_cmd_list *)
Lines 2116-2125 Link Here
2116	if (ch->rslots == 0) {	2148	if (ch->rslots == 0) {
2117	/* if there was fatal error - reset port. */	2149	/* if there was fatal error - reset port. */
2118	if (ch->toslots != 0 \|\| ch->fatalerr) {	2150	if (ch->toslots != 0 \|\| ch->fatalerr) {
		2151	if (ahci_verbose > 2)
		2152	device_printf(ch->dev, "ahci_end_transaction: Calling ahci_reset\n");
2119	ahci_reset(ch);	2153	ahci_reset(ch);
2120	} else {	2154	} else {
2121	/* if we have slots in error, we can reinit port. */	2155	/* if we have slots in error, we can reinit port. */
2122	if (ch->eslots != 0) {	2156	if (ch->eslots != 0) {
		2157	if (ahci_verbose > 2)
		2158	device_printf(ch->dev, "ahci_end_transaction: Reinit port (eslots=%08x)\n", ch->eslots);
2123	ahci_stop(ch);	2159	ahci_stop(ch);
2124	ahci_clo(ch);	2160	ahci_clo(ch);
2125	ahci_start(ch, 1);	2161	ahci_start(ch, 1);
Lines 2174-2179 Link Here
2174	ch->hold[i] = NULL;	2210	ch->hold[i] = NULL;
2175	ch->numhslots--;	2211	ch->numhslots--;
2176	}	2212	}
		2213	if (ahci_verbose > 2)
		2214	device_printf(ch->dev, "ahci_issue_recovery: Calling ahci_reset\n");
2177	ahci_reset(ch);	2215	ahci_reset(ch);
2178	return;	2216	return;
2179	}	2217	}
Lines 2308-2313 Link Here
2308	{	2346	{
2309	u_int32_t cmd;	2347	u_int32_t cmd;
2310		2348
		2349	if (ahci_verbose > 2)
		2350	device_printf(ch->dev, "AHCI engine(fbs=%d): starting\n", fbs);
		2351
2311	/* Run the channel start callback, if any. */	2352	/* Run the channel start callback, if any. */
2312	if (ch->start)	2353	if (ch->start)
2313	ch->start(ch);	2354	ch->start(ch);
Lines 2327-2332 Link Here
2327	cmd &= ~AHCI_P_CMD_PMA;	2368	cmd &= ~AHCI_P_CMD_PMA;
2328	ATA_OUTL(ch->r_mem, AHCI_P_CMD, cmd \| AHCI_P_CMD_ST \|	2369	ATA_OUTL(ch->r_mem, AHCI_P_CMD, cmd \| AHCI_P_CMD_ST \|
2329	(ch->pm_present ? AHCI_P_CMD_PMA : 0));	2370	(ch->pm_present ? AHCI_P_CMD_PMA : 0));
		2371
		2372	if (ahci_verbose > 2)
		2373	device_printf(ch->dev, "ahci_start: Done\n");
2330	}	2374	}
2331		2375
2332	static void	2376	static void
Lines 2334-2353 Link Here
2334	{	2378	{
2335	u_int32_t cmd;	2379	u_int32_t cmd;
2336	int timeout;	2380	int timeout;
2337		2381	int delay_time = 10;
		2382	int timeout_limit = 100000; /* 50000 */
		2383	int ci = -1;
		2384	int last_ci = 0;
		2385	int sact = -1;
		2386	int last_sact = 0;
		2387	int ccs = -1;
		2388	int last_ccs = 0;
		2389	int cr = 1;
		2390	int last_cr = 0;
		2391
		2392	if (ahci_verbose > 2)
		2393	device_printf(ch->dev, "AHCI engine: stopping\n");
		2394
2338	/* Kill all activity on this channel */	2395	/* Kill all activity on this channel */
2339	cmd = ATA_INL(ch->r_mem, AHCI_P_CMD);	2396	cmd = ATA_INL(ch->r_mem, AHCI_P_CMD);
		2397	if ((cmd & AHCI_P_CMD_ST) == 0) {
		2398	/* Not started */
		2399	if (ahci_verbose > 2)
		2400	device_printf(ch->dev, "AHCI engine already stopped (ignoring)\n");
		2401	return;
		2402	}
		2403
		2404	last_cr = ((cmd & AHCI_P_CMD_CR) != 0);
		2405	if (!last_cr) {
		2406	/* No Commands Running */
		2407	if (ahci_verbose > 2)
		2408	device_printf(ch->dev, "AHCI engine not running (notice only)\n");
		2409	}
		2410
2340	ATA_OUTL(ch->r_mem, AHCI_P_CMD, cmd & ~AHCI_P_CMD_ST);	2411	ATA_OUTL(ch->r_mem, AHCI_P_CMD, cmd & ~AHCI_P_CMD_ST);
		2412
2341	/* Wait for activity stop. */	2413	/* Wait for activity stop. */
2342	timeout = 0;	2414	timeout = 0;
2343	do {	2415	do {
2344	DELAY(10);	2416	DELAY(delay_time);
2345	if (timeout++ > 50000) {	2417	if (++timeout >= timeout_limit) {
2346	device_printf(ch->dev, "stopping AHCI engine failed\n");	2418	device_printf(ch->dev,
		2419	"stopping AHCI engine: timeout at %d us (cr=%d, ccs=%d, ci=%d, sact=%d)\n",
		2420	timeout*delay_time, cr, ccs, ci, sact);
2347	break;	2421	break;
2348	}	2422	}
2349	} while (ATA_INL(ch->r_mem, AHCI_P_CMD) & AHCI_P_CMD_CR);	2423
		2424	cmd = ATA_INL(ch->r_mem, AHCI_P_CMD);
		2425	cr = ((cmd & AHCI_P_CMD_CR) != 0);
		2426	ccs = ((cmd & AHCI_P_CMD_CCS_MASK) >> AHCI_P_CMD_CCS_SHIFT);
		2427
		2428	ci = ATA_INL(ch->r_mem, AHCI_P_CI);
		2429	sact = ATA_INL(ch->r_mem, AHCI_P_SACT);
		2430
		2431	if (cr != last_cr) {
		2432	if (ahci_verbose > 2)
		2433	device_printf(ch->dev, "stopping AHCI engine: cr: %d -> %d at time %d us\n",
		2434	last_cr, cr, timeout*delay_time);
		2435	last_cr = cr;
		2436	}
		2437
		2438	if (ci != last_ci) {
		2439	if (ahci_verbose > 2)
		2440	device_printf(ch->dev, "stopping AHCI engine: ci: %d -> %d at time %d us\n",
		2441	last_ci, ci, timeout*delay_time);
		2442	last_ci = ci;
		2443	}
		2444
		2445	if (sact != last_sact) {
		2446	if (ahci_verbose > 2)
		2447	device_printf(ch->dev, "stopping AHCI engine: sact: %d -> %d at time %d us\n",
		2448	last_sact, sact, timeout*delay_time);
		2449	last_sact = sact;
		2450	}
		2451
		2452	if (ccs != last_ccs) {
		2453	if (ahci_verbose > 2)
		2454	device_printf(ch->dev, "stopping AHCI engine: ccs: %d -> %d at time %d us\n",
		2455	last_ccs, ccs, timeout*delay_time);
		2456	last_ccs = ccs;
		2457	}
		2458	} while (cr);
2350	ch->eslots = 0;	2459	ch->eslots = 0;
		2460
		2461	if (ahci_verbose && timeout < timeout_limit)
		2462	device_printf(ch->dev, "AHCI engine stopped at time %d us\n", timeout*delay_time);
2351	}	2463	}
2352		2464
2353	static void	2465	static void
Lines 2356-2361 Link Here
2356	u_int32_t cmd;	2468	u_int32_t cmd;
2357	int timeout;	2469	int timeout;
2358		2470
		2471	if (ahci_verbose > 2)
		2472	device_printf(ch->dev, "ahci_clo: Start\n");
		2473
2359	/* Issue Command List Override if supported */	2474	/* Issue Command List Override if supported */
2360	if (ch->caps & AHCI_CAP_SCLO) {	2475	if (ch->caps & AHCI_CAP_SCLO) {
2361	cmd = ATA_INL(ch->r_mem, AHCI_P_CMD);	2476	cmd = ATA_INL(ch->r_mem, AHCI_P_CMD);
Lines 2370-2377 Link Here
2370	}	2485	}
2371	} while (ATA_INL(ch->r_mem, AHCI_P_CMD) & AHCI_P_CMD_CLO);	2486	} while (ATA_INL(ch->r_mem, AHCI_P_CMD) & AHCI_P_CMD_CLO);
2372	}	2487	}
		2488	if (ahci_verbose > 2)
		2489	device_printf(ch->dev, "ahci_clo: Done\n");
2373	}	2490	}
2374		2491
		2492
2375	static void	2493	static void
2376	ahci_stop_fr(struct ahci_channel *ch)	2494	ahci_stop_fr(struct ahci_channel *ch)
2377	{	2495	{
Lines 2378-2383 Link Here
2378	u_int32_t cmd;	2496	u_int32_t cmd;
2379	int timeout;	2497	int timeout;
2380		2498
		2499	if (ahci_verbose > 2)
		2500	device_printf(ch->dev, "ahci_stop_fr: Start\n");
		2501
2381	/* Kill all FIS reception on this channel */	2502	/* Kill all FIS reception on this channel */
2382	cmd = ATA_INL(ch->r_mem, AHCI_P_CMD);	2503	cmd = ATA_INL(ch->r_mem, AHCI_P_CMD);
2383	ATA_OUTL(ch->r_mem, AHCI_P_CMD, cmd & ~AHCI_P_CMD_FRE);	2504	ATA_OUTL(ch->r_mem, AHCI_P_CMD, cmd & ~AHCI_P_CMD_FRE);
Lines 2390-2395 Link Here
2390	break;	2511	break;
2391	}	2512	}
2392	} while (ATA_INL(ch->r_mem, AHCI_P_CMD) & AHCI_P_CMD_FR);	2513	} while (ATA_INL(ch->r_mem, AHCI_P_CMD) & AHCI_P_CMD_FR);
		2514	if (ahci_verbose > 2)
		2515	device_printf(ch->dev, "ahci_stop_fr: Done\n");
2393	}	2516	}
2394		2517
2395	static void	2518	static void
Lines 2397-2405 Link Here
2397	{	2520	{
2398	u_int32_t cmd;	2521	u_int32_t cmd;
2399		2522
		2523	if (ahci_verbose > 2)
		2524	device_printf(ch->dev, "ahci_start_fr: Start\n");
		2525
2400	/* Start FIS reception on this channel */	2526	/* Start FIS reception on this channel */
2401	cmd = ATA_INL(ch->r_mem, AHCI_P_CMD);	2527	cmd = ATA_INL(ch->r_mem, AHCI_P_CMD);
2402	ATA_OUTL(ch->r_mem, AHCI_P_CMD, cmd \| AHCI_P_CMD_FRE);	2528	ATA_OUTL(ch->r_mem, AHCI_P_CMD, cmd \| AHCI_P_CMD_FRE);
		2529
		2530	if (ahci_verbose > 2)
		2531	device_printf(ch->dev, "ahci_start_fr: Done\n");
2403	}	2532	}
2404		2533
2405	static int	2534	static int
Lines 2422-2428 Link Here
2422	DELAY(1000);	2551	DELAY(1000);
2423	timeout++;	2552	timeout++;
2424	}	2553	}
2425	if (bootverbose)	2554	if (bootverbose \|\| ahci_verbose)
2426	device_printf(ch->dev, "AHCI reset: device ready after %dms\n",	2555	device_printf(ch->dev, "AHCI reset: device ready after %dms\n",
2427	timeout + t0);	2556	timeout + t0);
2428	return (0);	2557	return (0);
Lines 2433-2438 Link Here
2433	{	2562	{
2434	struct ahci_channel *ch = arg;	2563	struct ahci_channel *ch = arg;
2435		2564
		2565	if (ahci_verbose > 2)
		2566	device_printf(ch->dev, "ahci_reset_to: Timeout!\n");
		2567
2436	if (ch->resetting == 0)	2568	if (ch->resetting == 0)
2437	return;	2569	return;
2438	ch->resetting--;	2570	ch->resetting--;
Lines 2439-2449 Link Here
2439	if (ahci_wait_ready(ch, ch->resetting == 0 ? -1 : 0,	2571	if (ahci_wait_ready(ch, ch->resetting == 0 ? -1 : 0,
2440	(310 - ch->resetting) * 100) == 0) {	2572	(310 - ch->resetting) * 100) == 0) {
2441	ch->resetting = 0;	2573	ch->resetting = 0;
		2574	if (ahci_verbose > 2)
		2575	device_printf(ch->dev, "ahci_reset_to: Starting up channel!\n");
2442	ahci_start(ch, 1);	2576	ahci_start(ch, 1);
2443	xpt_release_simq(ch->sim, TRUE);	2577	xpt_release_simq(ch->sim, TRUE);
2444	return;	2578	return;
2445	}	2579	}
2446	if (ch->resetting == 0) {	2580	if (ch->resetting == 0) {
		2581	if (ahci_verbose > 2)
		2582	device_printf(ch->dev, "ahci_reset_to: Restarting channel!\n");
2447	ahci_clo(ch);	2583	ahci_clo(ch);
2448	ahci_start(ch, 1);	2584	ahci_start(ch, 1);
2449	xpt_release_simq(ch->sim, TRUE);	2585	xpt_release_simq(ch->sim, TRUE);
Lines 2457-2465 Link Here
2457	{	2593	{
2458	struct ahci_controller *ctlr = device_get_softc(device_get_parent(ch->dev));	2594	struct ahci_controller *ctlr = device_get_softc(device_get_parent(ch->dev));
2459	int i;	2595	int i;
2460		2596
		2597	if (ahci_verbose > 2)
		2598	device_printf(ch->dev, "ahci_reset: Start\n");
		2599
2461	xpt_freeze_simq(ch->sim, 1);	2600	xpt_freeze_simq(ch->sim, 1);
2462	if (bootverbose)	2601	if (bootverbose \|\| ahci_verbose)
2463	device_printf(ch->dev, "AHCI reset...\n");	2602	device_printf(ch->dev, "AHCI reset...\n");
2464	/* Forget about previous reset. */	2603	/* Forget about previous reset. */
2465	if (ch->resetting) {	2604	if (ch->resetting) {
Lines 2506-2512 Link Here
2506	ATA_OUTL(ch->r_mem, AHCI_P_IE, 0);	2645	ATA_OUTL(ch->r_mem, AHCI_P_IE, 0);
2507	/* Reset and reconnect PHY, */	2646	/* Reset and reconnect PHY, */
2508	if (!ahci_sata_phy_reset(ch)) {	2647	if (!ahci_sata_phy_reset(ch)) {
2509	if (bootverbose)	2648	if (bootverbose \|\| ahci_verbose)
2510	device_printf(ch->dev,	2649	device_printf(ch->dev,
2511	"AHCI reset: device not found\n");	2650	"AHCI reset: device not found\n");
2512	ch->devices = 0;	2651	ch->devices = 0;
Lines 2515-2523 Link Here
2515	(((ch->pm_level != 0) ? AHCI_P_IX_CPD \| AHCI_P_IX_MP : 0) \|	2654	(((ch->pm_level != 0) ? AHCI_P_IX_CPD \| AHCI_P_IX_MP : 0) \|
2516	AHCI_P_IX_PRC \| AHCI_P_IX_PC));	2655	AHCI_P_IX_PRC \| AHCI_P_IX_PC));
2517	xpt_release_simq(ch->sim, TRUE);	2656	xpt_release_simq(ch->sim, TRUE);
		2657	if (ahci_verbose > 2)
		2658	device_printf(ch->dev, "ahci_reset: Done (ahci_sata_phy_reset failed)\n");
2518	return;	2659	return;
2519	}	2660	}
2520	if (bootverbose)	2661	if (bootverbose \|\| ahci_verbose)
2521	device_printf(ch->dev, "AHCI reset: device found\n");	2662	device_printf(ch->dev, "AHCI reset: device found\n");
2522	/* Wait for clearing busy status. */	2663	/* Wait for clearing busy status. */
2523	if (ahci_wait_ready(ch, dumping ? 31000 : 0, 0)) {	2664	if (ahci_wait_ready(ch, dumping ? 31000 : 0, 0)) {
Lines 2541-2546 Link Here
2541	ahci_start(ch, 1);	2682	ahci_start(ch, 1);
2542	xpt_release_simq(ch->sim, TRUE);	2683	xpt_release_simq(ch->sim, TRUE);
2543	}	2684	}
		2685	if (ahci_verbose > 2)
		2686	device_printf(ch->dev, "ahci_reset: Done\n");
2544	}	2687	}
2545		2688
2546	static int	2689	static int
Lines 2603-2643 Link Here
2603	{	2746	{
2604	u_int32_t status;	2747	u_int32_t status;
2605	int timeout, found = 0;	2748	int timeout, found = 0;
		2749	int last_status = 0;
		2750	int delay_time = 10; /* 10 us */
		2751	int timeout_full_limit = 100000 / delay_time; /* 100ms */
		2752	int timeout_detect_limit = 10000 / delay_time; /* 10ms */
		2753
		2754	if (ahci_verbose > 2)
		2755	device_printf(ch->dev, "ahci_sata_connect: Start\n");
		2756
		2757	for (timeout = 0; timeout < timeout_full_limit ; timeout++) {
		2758	status = ATA_INL(ch->r_mem, AHCI_P_SSTS);
2606		2759
2607	/* Wait up to 100ms for "connect well" */	2760	if (status != last_status) {
2608	for (timeout = 0; timeout < 1000 ; timeout++) {	2761	if (ahci_verbose > 1)
2609	status = ATA_INL(ch->r_mem, AHCI_P_SSTS);	2762	device_printf(ch->dev, "SATA changed status 0x%08x -> 0x%08x at time=%dus\n",
2610	if ((status & ATA_SS_DET_MASK) != ATA_SS_DET_NO_DEVICE)	2763	last_status, status, timeout * delay_time);
		2764	last_status = status;
		2765	}
		2766	if ((status & ATA_SS_DET_MASK) != ATA_SS_DET_NO_DEVICE) {
2611	found = 1;	2767	found = 1;
		2768	/* Increase timeout to 500ms after first status change to allow for slow devices
		2769	(needed on Dell BOSS-S1 with later firmwares) */
		2770	if (ch->quirks & AHCI_Q_SLOWDEV)
		2771	timeout_full_limit = 500000 / delay_time;
		2772	}
2612	if (((status & ATA_SS_DET_MASK) == ATA_SS_DET_PHY_ONLINE) &&	2773	if (((status & ATA_SS_DET_MASK) == ATA_SS_DET_PHY_ONLINE) &&
2613	((status & ATA_SS_SPD_MASK) != ATA_SS_SPD_NO_SPEED) &&	2774	((ch->quirks & AHCI_Q_NOSPD) \|\| (status & ATA_SS_SPD_MASK) != ATA_SS_SPD_NO_SPEED) &&
2614	((status & ATA_SS_IPM_MASK) == ATA_SS_IPM_ACTIVE))	2775	((status & ATA_SS_IPM_MASK) == ATA_SS_IPM_ACTIVE))
2615	break;	2776	break;
2616	if ((status & ATA_SS_DET_MASK) == ATA_SS_DET_PHY_OFFLINE) {	2777	if ((status & ATA_SS_DET_MASK) == ATA_SS_DET_PHY_OFFLINE) {
2617	if (bootverbose) {	2778	if (bootverbose \|\| ahci_verbose) {
2618	device_printf(ch->dev, "SATA offline status=%08x\n",	2779	device_printf(ch->dev, "SATA offline status 0x%08x at time=%dus\n",
2619	status);	2780	status, timeout * delay_time);
2620	}	2781	}
		2782	if (ahci_verbose > 2)
		2783	device_printf(ch->dev, "ahci_sata_connect: Done (0)\n");
2621	return (0);	2784	return (0);
2622	}	2785	}
2623	if (found == 0 && timeout >= 100)	2786	if (found == 0 && timeout >= timeout_detect_limit)
2624	break;	2787	break;
2625	DELAY(100);	2788	DELAY(delay_time);
2626	}	2789	}
2627	if (timeout >= 1000 \|\| !found) {	2790	if (!found \|\| timeout >= timeout_full_limit) {
2628	if (bootverbose) {	2791	if (bootverbose \|\| ahci_verbose) {
2629	device_printf(ch->dev,	2792	device_printf(ch->dev,
2630	"SATA connect timeout time=%dus status=%08x\n",	2793	"SATA connect timeout status 0x%08x at time=%dus\n",
2631	timeout * 100, status);	2794	status, timeout * delay_time);
2632	}	2795	}
		2796	if (ahci_verbose > 2)
		2797	device_printf(ch->dev, "ahci_sata_connect: Done (0)\n");
2633	return (0);	2798	return (0);
2634	}	2799	}
2635	if (bootverbose) {	2800	if (bootverbose \|\| ahci_verbose) {
2636	device_printf(ch->dev, "SATA connect time=%dus status=%08x\n",	2801	device_printf(ch->dev, "SATA connect status 0x%08x at time=%dus\n",
2637	timeout * 100, status);	2802	status, timeout * delay_time);
2638	}	2803	}
2639	/* Clear SATA error register */	2804	/* Clear SATA error register */
2640	ATA_OUTL(ch->r_mem, AHCI_P_SERR, 0xffffffff);	2805	ATA_OUTL(ch->r_mem, AHCI_P_SERR, 0xffffffff);
		2806	if (ahci_verbose > 2)
		2807	device_printf(ch->dev, "ahci_sata_connect: Done (1)\n");
2641	return (1);	2808	return (1);
2642	}	2809	}
2643		2810
Lines 2647-2652 Link Here
2647	int sata_rev;	2814	int sata_rev;
2648	uint32_t val, detval;	2815	uint32_t val, detval;
2649		2816
		2817	if (ahci_verbose > 2)
		2818	device_printf(ch->dev, "ahci_sata_phy_reset: Start\n");
		2819
2650	if (ch->listening) {	2820	if (ch->listening) {
2651	val = ATA_INL(ch->r_mem, AHCI_P_CMD);	2821	val = ATA_INL(ch->r_mem, AHCI_P_CMD);
2652	val \|= AHCI_P_CMD_SUD;	2822	val \|= AHCI_P_CMD_SUD;
Lines 2679-2686 Link Here
2679	ch->listening = 1;	2849	ch->listening = 1;
2680	} else if (ch->pm_level > 0)	2850	} else if (ch->pm_level > 0)
2681	ATA_OUTL(ch->r_mem, AHCI_P_SCTL, ATA_SC_DET_DISABLE);	2851	ATA_OUTL(ch->r_mem, AHCI_P_SCTL, ATA_SC_DET_DISABLE);
		2852	if (ahci_verbose > 2)
		2853	device_printf(ch->dev, "ahci_sata_phy_reset: Done (0)\n");
2682	return (0);	2854	return (0);
2683	}	2855	}
		2856	if (ahci_verbose > 2)
		2857	device_printf(ch->dev, "ahci_sata_phy_reset: Done (1)\n");
2684	return (1);	2858	return (1);
2685	}	2859	}
2686		2860
Lines 2829-2834 Link Here
2829	}	3003	}
2830	case XPT_RESET_BUS: /* Reset the specified SCSI bus */	3004	case XPT_RESET_BUS: /* Reset the specified SCSI bus */
2831	case XPT_RESET_DEV: /* Bus Device Reset the specified SCSI device */	3005	case XPT_RESET_DEV: /* Bus Device Reset the specified SCSI device */
		3006	if (ahci_verbose > 2)
		3007	device_printf(ch->dev, "ahciaction: Calling ahci_reset (%s)\n",
		3008	(ccb->ccb_h.func_code == XPT_RESET_BUS ? "XPT_RESET_BUS" : "XPT_RESET_DEV"));
2832	ahci_reset(ch);	3009	ahci_reset(ch);
2833	ccb->ccb_h.status = CAM_REQ_CMP;	3010	ccb->ccb_h.status = CAM_REQ_CMP;
2834	break;	3011	break;

Lines 624-629 Link Here

(-)sys/dev/ahci/ahci.h (-1 / +5 lines)
624	#define AHCI_Q_MRVL_SR_DEL 0x00200000	624	#define AHCI_Q_MRVL_SR_DEL 0x00200000
625	#define AHCI_Q_NOCCS 0x00400000	625	#define AHCI_Q_NOCCS 0x00400000
626	#define AHCI_Q_NOAUX 0x00800000	626	#define AHCI_Q_NOAUX 0x00800000
		627	#define AHCI_Q_NOSPD 0x01000000 /* Ignore SPD field in status */
		628	#define AHCI_Q_SLOWDEV 0x02000000 /* Device is slow in detecting drives */
627		629
628	#define AHCI_Q_BIT_STRING \	630	#define AHCI_Q_BIT_STRING \
629	"\020" \	631	"\020" \
Lines 650-656 Link Here
650	"\025NOMSIX" \	652	"\025NOMSIX" \
651	"\026MRVL_SR_DEL" \	653	"\026MRVL_SR_DEL" \
652	"\027NOCCS" \	654	"\027NOCCS" \
653	"\030NOAUX"	655	"\030NOAUX" \
		656	"\031NOSPD" \
		657	"\032SLOWDEV"
654		658
655	int ahci_attach(device_t dev);	659	int ahci_attach(device_t dev);
656	int ahci_detach(device_t dev);	660	int ahci_detach(device_t dev);

Lines 1-4 Link Here

(-)sys/dev/ahci/ahci_pci.c (-2 / +2 lines)
1	/*-	1	/*
2	* Copyright (c) 2009-2012 Alexander Motin <mav@FreeBSD.org>	2	* Copyright (c) 2009-2012 Alexander Motin <mav@FreeBSD.org>
3	* All rights reserved.	3	* All rights reserved.
4	*	4	*
Lines 269-275 Link Here
269	{0x91a01b4b, 0x00, "Marvell 88SE91Ax", 0},	269	{0x91a01b4b, 0x00, "Marvell 88SE91Ax", 0},
270	{0x92151b4b, 0x00, "Marvell 88SE9215", 0},	270	{0x92151b4b, 0x00, "Marvell 88SE9215", 0},
271	{0x92201b4b, 0x00, "Marvell 88SE9220", AHCI_Q_ALTSIG},	271	{0x92201b4b, 0x00, "Marvell 88SE9220", AHCI_Q_ALTSIG},
272	{0x92301b4b, 0x00, "Marvell 88SE9230", AHCI_Q_ALTSIG},	272	{0x92301b4b, 0x00, "Marvell 88SE9230", AHCI_Q_ALTSIG\|AHCI_Q_SLOWDEV}, /* AHCI_Q_ALTSIG */
273	{0x92351b4b, 0x00, "Marvell 88SE9235", 0},	273	{0x92351b4b, 0x00, "Marvell 88SE9235", 0},
274	{0x06201103, 0x00, "HighPoint RocketRAID 620", 0},	274	{0x06201103, 0x00, "HighPoint RocketRAID 620", 0},
275	{0x06201b4b, 0x00, "HighPoint RocketRAID 620", 0},	275	{0x06201b4b, 0x00, "HighPoint RocketRAID 620", 0},

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