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(-)b/sys/dev/uart/uart_bus_pci.c (+8 lines)
Lines 155-160 static const struct pci_id pci_ns8250_ids[] = { Link Here
155 
       24 * DEFAULT_RCLK, 2 },
 155 
       24 * DEFAULT_RCLK, 2 },
156 
{ 0x8086, 0x5aee, 0xffff, 0, "Intel Apollo Lake SIO/LPSS UART 3", 0x10,
 156 
{ 0x8086, 0x5aee, 0xffff, 0, "Intel Apollo Lake SIO/LPSS UART 3", 0x10,
157 
       24 * DEFAULT_RCLK, 2 },
 157 
       24 * DEFAULT_RCLK, 2 },
158 
{ 0x8086, 0x31bc, 0xffff, 0, "Intel Gemini Lake SIO/LPSS UART 0", 0x10,
159 
       24 * DEFAULT_RCLK, 2 },
160 
{ 0x8086, 0x31be, 0xffff, 0, "Intel Gemini Lake SIO/LPSS UART 1", 0x10,
161 
       24 * DEFAULT_RCLK, 2 },
162 
{ 0x8086, 0x31c0, 0xffff, 0, "Intel Gemini Lake SIO/LPSS UART 2", 0x10,
163 
       24 * DEFAULT_RCLK, 2 },
164 
{ 0x8086, 0x31ee, 0xffff, 0, "Intel Gemini Lake SIO/LPSS UART 3", 0x10,
165 
       24 * DEFAULT_RCLK, 2 },
158 
{ 0x8086, 0x8811, 0xffff, 0, "Intel EG20T Serial Port 0", 0x10 },
 166 
{ 0x8086, 0x8811, 0xffff, 0, "Intel EG20T Serial Port 0", 0x10 },
159 
{ 0x8086, 0x8812, 0xffff, 0, "Intel EG20T Serial Port 1", 0x10 },
 167 
{ 0x8086, 0x8812, 0xffff, 0, "Intel EG20T Serial Port 1", 0x10 },
160 
{ 0x8086, 0x8813, 0xffff, 0, "Intel EG20T Serial Port 2", 0x10 },
 168 
{ 0x8086, 0x8813, 0xffff, 0, "Intel EG20T Serial Port 2", 0x10 },

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