View | Details | Raw Unified | Return to bug 260651 | Differences between
and this patch

Collapse All | Expand All

(-)b/www/node14/Makefile (-1 / +1 lines)
Lines 1-7 Link Here
1 
PORTNAME=	node
 1 
PORTNAME=	node
2 
DISTVERSIONPREFIX=	v
 2 
DISTVERSIONPREFIX=	v
3 
DISTVERSION=	14.18.1
 3 
DISTVERSION=	14.18.1
4 
PORTREVISION=	1
 4 
PORTREVISION=	2
5 
CATEGORIES=	www
 5 
CATEGORIES=	www
6 
MASTER_SITES=	http://nodejs.org/dist/v${DISTVERSION}/
 6 
MASTER_SITES=	http://nodejs.org/dist/v${DISTVERSION}/
7 
PKGNAMESUFFIX=	14
 7 
PKGNAMESUFFIX=	14
(-)b/www/node14/files/patch-deps_v8_src_base_platform_platform-posix.cc (+11 lines)
Added Link Here
1 
--- deps/v8/src/base/platform/platform-posix.cc.orig	2021-10-12 04:13:34 UTC
2 
+++ deps/v8/src/base/platform/platform-posix.cc
3 
@@ -162,7 +162,7 @@ void* Allocate(void* hint, size_t size, OS::MemoryPerm
4
5 
 }  // namespace
6
7 
-#if V8_OS_LINUX || V8_OS_FREEBSD
8 
+#if V8_OS_LINUX
9 
 #ifdef __arm__
10
11 
 bool OS::ArmUsingHardFloat() {
(-)b/www/node14/files/patch-deps_v8_src_codegen_arm_cpu-arm.cc (+28 lines)
Added Link Here
1 
--- deps/v8/src/codegen/arm/cpu-arm.cc.orig	2021-10-12 04:13:34 UTC
2 
+++ deps/v8/src/codegen/arm/cpu-arm.cc
3 
@@ -2,12 +2,14 @@
4 
 // Use of this source code is governed by a BSD-style license that can be
5 
 // found in the LICENSE file.
6
7 
+#include "include/v8config.h"
8 
 // CPU specific code for arm independent of OS goes here.
9 
 #ifdef __arm__
10 
 #ifdef __QNXNTO__
11 
 #include <sys/mman.h>  // for cache flushing.
12 
 #undef MAP_TYPE        // NOLINT
13 
 #elif V8_OS_FREEBSD
14 
+#include <sys/cdefs.h>
15 
 #include <machine/sysarch.h>  // for cache flushing
16 
 #include <sys/types.h>
17 
 #else
18 
@@ -29,9 +31,7 @@ V8_NOINLINE void CpuFeatures::FlushICache(void* start,
19 
 #if V8_OS_QNX
20 
   msync(start, size, MS_SYNC | MS_INVALIDATE_ICACHE);
21 
 #elif V8_OS_FREEBSD
22 
-  struct arm_sync_icache_args args = {
23 
-      .addr = reinterpret_cast<uintptr_t>(start), .len = size};
24 
-  sysarch(ARM_SYNC_ICACHE, reinterpret_cast<void*>(&args));
25 
+  arm_sync_icache(reinterpret_cast<uintptr_t>(start), size);
26 
 #else
27 
   register uint32_t beg asm("r0") = reinterpret_cast<uint32_t>(start);
28 
   register uint32_t end asm("r1") = beg + size;

Return to bug 260651