|
Lines 119-124
static int ig4iic_pci_detach(device_t dev);
Link Here
|
| 119 |
#define PCI_CHIP_COMETLAKE_V_I2C_1 0xa3e18086 |
119 |
#define PCI_CHIP_COMETLAKE_V_I2C_1 0xa3e18086 |
| 120 |
#define PCI_CHIP_COMETLAKE_V_I2C_2 0xa3e28086 |
120 |
#define PCI_CHIP_COMETLAKE_V_I2C_2 0xa3e28086 |
| 121 |
#define PCI_CHIP_COMETLAKE_V_I2C_3 0xa3e38086 |
121 |
#define PCI_CHIP_COMETLAKE_V_I2C_3 0xa3e38086 |
|
|
122 |
#define PCI_CHIP_ICELAKE_LP_I2C_0 0x34e88086 |
| 123 |
#define PCI_CHIP_ICELAKE_LP_I2C_1 0x34e98086 |
| 124 |
#define PCI_CHIP_ICELAKE_LP_I2C_2 0x34ea8086 |
| 125 |
#define PCI_CHIP_ICELAKE_LP_I2C_3 0x34eb8086 |
| 126 |
#define PCI_CHIP_ICELAKE_LP_I2C_4 0x34c58086 |
| 127 |
#define PCI_CHIP_ICELAKE_LP_I2C_5 0x34c68086 |
| 122 |
#define PCI_CHIP_TIGERLAKE_H_I2C_0 0x43d88086 |
128 |
#define PCI_CHIP_TIGERLAKE_H_I2C_0 0x43d88086 |
| 123 |
#define PCI_CHIP_TIGERLAKE_H_I2C_1 0x43e88086 |
129 |
#define PCI_CHIP_TIGERLAKE_H_I2C_1 0x43e88086 |
| 124 |
#define PCI_CHIP_TIGERLAKE_H_I2C_2 0x43e98086 |
130 |
#define PCI_CHIP_TIGERLAKE_H_I2C_2 0x43e98086 |
|
Lines 225-230
static struct ig4iic_pci_device ig4iic_pci_devices[] = {
Link Here
|
| 225 |
{ PCI_CHIP_COMETLAKE_V_I2C_1, "Intel Comet Lake-V I2C Controller-1", IG4_CANNONLAKE}, |
231 |
{ PCI_CHIP_COMETLAKE_V_I2C_1, "Intel Comet Lake-V I2C Controller-1", IG4_CANNONLAKE}, |
| 226 |
{ PCI_CHIP_COMETLAKE_V_I2C_2, "Intel Comet Lake-V I2C Controller-2", IG4_CANNONLAKE}, |
232 |
{ PCI_CHIP_COMETLAKE_V_I2C_2, "Intel Comet Lake-V I2C Controller-2", IG4_CANNONLAKE}, |
| 227 |
{ PCI_CHIP_COMETLAKE_V_I2C_3, "Intel Comet Lake-V I2C Controller-3", IG4_CANNONLAKE}, |
233 |
{ PCI_CHIP_COMETLAKE_V_I2C_3, "Intel Comet Lake-V I2C Controller-3", IG4_CANNONLAKE}, |
|
|
234 |
{ PCI_CHIP_ICELAKE_LP_I2C_0, "Intel Ice Lake-LP I2C Controller-0", IG4_TIGERLAKE}, |
| 235 |
{ PCI_CHIP_ICELAKE_LP_I2C_1, "Intel Ice Lake-LP I2C Controller-1", IG4_TIGERLAKE}, |
| 236 |
{ PCI_CHIP_ICELAKE_LP_I2C_2, "Intel Ice Lake-LP I2C Controller-2", IG4_TIGERLAKE}, |
| 237 |
{ PCI_CHIP_ICELAKE_LP_I2C_3, "Intel Ice Lake-LP I2C Controller-3", IG4_TIGERLAKE}, |
| 238 |
{ PCI_CHIP_ICELAKE_LP_I2C_4, "Intel Ice Lake-LP I2C Controller-4", IG4_TIGERLAKE}, |
| 239 |
{ PCI_CHIP_ICELAKE_LP_I2C_5, "Intel Ice Lake-LP I2C Controller-5", IG4_TIGERLAKE}, |
| 228 |
{ PCI_CHIP_TIGERLAKE_H_I2C_0, "Intel Tiger Lake-H I2C Controller-0", IG4_TIGERLAKE}, |
240 |
{ PCI_CHIP_TIGERLAKE_H_I2C_0, "Intel Tiger Lake-H I2C Controller-0", IG4_TIGERLAKE}, |
| 229 |
{ PCI_CHIP_TIGERLAKE_H_I2C_1, "Intel Tiger Lake-H I2C Controller-1", IG4_TIGERLAKE}, |
241 |
{ PCI_CHIP_TIGERLAKE_H_I2C_1, "Intel Tiger Lake-H I2C Controller-1", IG4_TIGERLAKE}, |
| 230 |
{ PCI_CHIP_TIGERLAKE_H_I2C_2, "Intel Tiger Lake-H I2C Controller-2", IG4_TIGERLAKE}, |
242 |
{ PCI_CHIP_TIGERLAKE_H_I2C_2, "Intel Tiger Lake-H I2C Controller-2", IG4_TIGERLAKE}, |