FreeBSD Bugzilla – Attachment 81544 Details for
Bug 116771
New port devel/tbb: a library that provides thread building blocks
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file.shar
file.shar (text/plain), 45.96 KB, created by
Arun Sharma
on 2007-10-01 00:30:01 UTC
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Description:
file.shar
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Creator:
Arun Sharma
Created:
2007-10-01 00:30:01 UTC
Size:
45.96 KB
patch
obsolete
># This is a shell archive. Save it in a file, remove anything before ># this line, and then unpack it by entering "sh file". Note, it may ># create directories; files and directories will be owned by you and ># have default permissions. ># ># This archive contains: ># ># devel/tbb/files/patch-freebsd ># devel/tbb/Makefile ># devel/tbb/pkg-descr ># devel/tbb/pkg-plist ># devel/tbb/distinfo ># >echo x - devel/tbb/files/patch-freebsd >sed 's/^X//' >devel/tbb/files/patch-freebsd << 'END-of-devel/tbb/files/patch-freebsd' >XFreeBSD support. >X >XSigned-off-by: Arun Sharma <arun-public@sharma-home.net> >X >Xdiff -r 627751b671bb -r ac2c116b7cee build/common.inc >X--- a/build/common.inc Sat Sep 29 16:18:03 2007 -0700 >X+++ b/build/common.inc Sat Sep 29 16:51:17 2007 -0700 >X@@ -37,6 +37,9 @@ ifndef tbb_os >X endif >X ifeq ($(OS), Darwin) >X export tbb_os=macos >X+ endif >X+ ifeq ($(OS), FreeBSD) >X+ export tbb_os=freebsd >X endif >X endif >X endif >Xdiff -r 627751b671bb -r ac2c116b7cee build/freebsd.gcc.inc >X--- /dev/null Thu Jan 01 00:00:00 1970 +0000 >X+++ b/build/freebsd.gcc.inc Sat Sep 29 16:51:17 2007 -0700 >X@@ -0,0 +1,98 @@ >X+# Copyright 2005-2007 Intel Corporation. All Rights Reserved. >X+# >X+# This file is part of Threading Building Blocks. >X+# >X+# Threading Building Blocks is free software; you can redistribute it >X+# and/or modify it under the terms of the GNU General Public License >X+# version 2 as published by the Free Software Foundation. >X+# >X+# Threading Building Blocks is distributed in the hope that it will be >X+# useful, but WITHOUT ANY WARRANTY; without even the implied warranty >X+# of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the >X+# GNU General Public License for more details. >X+# >X+# You should have received a copy of the GNU General Public License >X+# along with Threading Building Blocks; if not, write to the Free Software >X+# Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA >X+# >X+# As a special exception, you may use this file as part of a free software >X+# library without restriction. Specifically, if other files instantiate >X+# templates or use macros or inline functions from this file, or you compile >X+# this file and link it with other files to produce an executable, this >X+# file does not by itself cause the resulting executable to be covered by >X+# the GNU General Public License. This exception does not however >X+# invalidate any other reasons why the executable file might be covered by >X+# the GNU General Public License. >X+ >X+COMPILE_ONLY = -c -MMD >X+PREPROC_ONLY = -E -MMD >X+INCLUDE_KEY = -I >X+DEFINE_KEY = -D >X+OUTPUT_KEY = -o # >X+OUTPUTOBJ_KEY = -o # >X+PIC_KEY = -fPIC >X+WARNING_KEY = -Wall -Werror >X+DYLIB_KEY = -shared >X+LIBDL = >X+ >X+TBB_NOSTRICT = 1 >X+ >X+CPLUS = g++ >X+INCLUDES += -I$(tbb_root)/src/tbb -I$(tbb_root)/include -I$(tbb_root)/src >X+LIB_LINK_FLAGS = -shared >X+LIBS = -lpthread -lrt >X+C_FLAGS = $(CPLUS_FLAGS) -x c >X+ >X+ifeq ($(cfg), release) >X+ CPLUS_FLAGS = -DDO_ITT_NOTIFY -O2 -DUSE_PTHREAD >X+endif >X+ifeq ($(cfg), debug) >X+ CPLUS_FLAGS = -DTBB_DO_ASSERT -DDO_ITT_NOTIFY -g -O0 -DUSE_PTHREAD >X+endif >X+ >X+ASM= >X+ASM_FLAGS= >X+ >X+TBB_ASM.OBJ= >X+ >X+ifeq (itanium,$(arch)) >X+# Position-independent code (PIC) is a must for IA-64 >X+ CPLUS_FLAGS += $(PIC_KEY) >X+ $(PIC_KEY) = >X+endif >X+ >X+ifeq (em64t,$(arch)) >X+ CPLUS_FLAGS += -m64 >X+ LIB_LINK_FLAGS += -m64 >X+endif >X+ >X+ifeq (ia32,$(arch)) >X+ CPLUS_FLAGS += -m32 >X+ LIB_LINK_FLAGS += -m32 >X+endif >X+ >X+#------------------------------------------------------------------------------ >X+# Setting assembler data. >X+#------------------------------------------------------------------------------ >X+%.$(OBJ): %.s >X+ cpp $(ASM_FLAGS) <$< | grep -v '^#' >$*.tmp >X+ $(ASM) -o $@ $*.tmp >X+ rm $*.tmp >X+ >X+ASSEMBLY_SOURCE=$(arch)-gas >X+ifeq (itanium,$(arch)) >X+ ASM=ias >X+ TBB_ASM.OBJ = atomic_support.o lock_byte.o log2.o pause.o >X+endif >X+#------------------------------------------------------------------------------ >X+# End of setting assembler data. >X+#------------------------------------------------------------------------------ >X+ >X+#------------------------------------------------------------------------------ >X+# Setting tbbmalloc data. >X+#------------------------------------------------------------------------------ >X+M_INCLUDES = $(INCLUDES) -I$(MALLOC_ROOT) -I$(MALLOC_SOURCE_ROOT) >X+M_CPLUS_FLAGS = $(CPLUS_FLAGS) -fno-rtti -fno-exceptions -fno-schedule-insns2 >X+#------------------------------------------------------------------------------ >X+# End of setting tbbmalloc data. >X+#------------------------------------------------------------------------------ >Xdiff -r 627751b671bb -r ac2c116b7cee build/freebsd.inc >X--- /dev/null Thu Jan 01 00:00:00 1970 +0000 >X+++ b/build/freebsd.inc Sat Sep 29 16:51:17 2007 -0700 >X@@ -0,0 +1,86 @@ >X+# Copyright 2005-2007 Intel Corporation. All Rights Reserved. >X+# >X+# This file is part of Threading Building Blocks. >X+# >X+# Threading Building Blocks is free software; you can redistribute it >X+# and/or modify it under the terms of the GNU General Public License >X+# version 2 as published by the Free Software Foundation. >X+# >X+# Threading Building Blocks is distributed in the hope that it will be >X+# useful, but WITHOUT ANY WARRANTY; without even the implied warranty >X+# of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the >X+# GNU General Public License for more details. >X+# >X+# You should have received a copy of the GNU General Public License >X+# along with Threading Building Blocks; if not, write to the Free Software >X+# Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA >X+# >X+# As a special exception, you may use this file as part of a free software >X+# library without restriction. Specifically, if other files instantiate >X+# templates or use macros or inline functions from this file, or you compile >X+# this file and link it with other files to produce an executable, this >X+# file does not by itself cause the resulting executable to be covered by >X+# the GNU General Public License. This exception does not however >X+# invalidate any other reasons why the executable file might be covered by >X+# the GNU General Public License. >X+ >X+ifndef arch >X+ ifeq ($(shell uname -m),i686) >X+ export arch:=ia32 >X+ endif >X+ ifeq ($(shell uname -m),ia64) >X+ export arch:=itanium >X+ endif >X+ ifeq ($(shell uname -m),amd64) >X+ export arch:=em64t >X+ endif >X+endif >X+ >X+ifndef runtime >X+ gcc_version_full=$(shell gcc --version | grep 'gcc'| egrep -o ' [0-9]+\.[0-9]+\.[0-9]+.*' | sed -e 's/^\ //') >X+ gcc_version=$(shell echo "$(gcc_version_full)" | egrep -o '^[0-9]+\.[0-9]+\.[0-9]+\s*' | head -n 1 | sed -e 's/ *//g') >X+ os_version:=$(shell uname -r) >X+ os_kernel_version:=$(shell uname -r | sed -e 's/-.*$$//') >X+ export runtime:=cc$(os_version) >X+endif >X+ >X+native_compiler := gcc >X+export compiler ?= gcc >X+debugger ?= gdb >X+ >X+CWD=$(shell pwd) >X+RM?=rm -f >X+RD?=rmdir >X+MD?=mkdir -p >X+NUL= > /dev/null 2>&1 >X+SLASH=/ >X+MAKE_VERSIONS=sh $(tbb_root)/build/version_info_linux.sh $(CPLUS) $(CPLUS_FLAGS) $(INCLUDES) >version_string.tmp >X+MAKE_TBBVARS=sh $(tbb_root)/build/generate_tbbvars.sh >X+ >X+ifdef LD_LIBRARY_PATH >X+ export LD_LIBRARY_PATH := .:$(LD_LIBRARY_PATH) >X+else >X+ export LD_LIBRARY_PATH := . >X+endif >X+ >X+####### Build settigns ######################################################## >X+ >X+OBJ = o >X+DLL = so >X+LIBEXT = so >X+ >X+ifeq ($(cfg),debug) >X+ DEBUG_SUFFIX = _debug >X+endif >X+ >X+TBB.DEF = >X+TBB.DLL = libtbb$(DEBUG_SUFFIX).$(DLL) >X+TBB.LIB = $(TBB.DLL) >X+ >X+MALLOC.DLL = libtbbmalloc$(DEBUG_SUFFIX).so >X+MALLOC.LIB = $(MALLOC.DLL) >X+ >X+TBB_NOSTRICT=1 >X+ >X+ >X+ >Xdiff -r 627751b671bb -r ac2c116b7cee examples/common/gui/convideo.cpp >X--- a/examples/common/gui/convideo.cpp Sat Sep 29 16:18:03 2007 -0700 >X+++ b/examples/common/gui/convideo.cpp Sat Sep 29 16:51:17 2007 -0700 >X@@ -48,7 +48,7 @@ void video::win_load_accelerators(int id >X } >X #endif >X >X-#elif __linux__ || __APPLE__ >X+#elif __linux__ || __APPLE__ || __FreeBSD__ >X >X #include <sched.h> >X #include <sys/time.h> >Xdiff -r 627751b671bb -r ac2c116b7cee examples/parallel_for/tacheon/src/types.h >X--- a/examples/parallel_for/tacheon/src/types.h Sat Sep 29 16:18:03 2007 -0700 >X+++ b/examples/parallel_for/tacheon/src/types.h Sat Sep 29 16:51:17 2007 -0700 >X@@ -61,6 +61,8 @@ >X #ifdef _WIN32 >X #include <malloc.h> >X #define alloca _alloca >X+#elif __FreeBSD__ >X+#include <stdlib.h> >X #else >X #include <alloca.h> >X #endif >Xdiff -r 627751b671bb -r ac2c116b7cee examples/parallel_reduce/convex_hull/convex_hull.h >X--- a/examples/parallel_reduce/convex_hull/convex_hull.h Sat Sep 29 16:18:03 2007 -0700 >X+++ b/examples/parallel_reduce/convex_hull/convex_hull.h Sat Sep 29 16:51:17 2007 -0700 >X@@ -133,7 +133,7 @@ namespace util { >X }; >X >X int random(unsigned int& rseed) { >X-#if __linux__ || __APPLE__ >X+#if __linux__ || __APPLE__ || __FreeBSD__ >X return rand_r(&rseed); >X #elif _WIN32 >X return rand(); >Xdiff -r 627751b671bb -r ac2c116b7cee include/tbb/machine/freebsd_em64t.h >X--- /dev/null Thu Jan 01 00:00:00 1970 +0000 >X+++ b/include/tbb/machine/freebsd_em64t.h Sat Sep 29 16:51:17 2007 -0700 >X@@ -0,0 +1,160 @@ >X+/* >X+ Copyright 2005-2007 Intel Corporation. All Rights Reserved. >X+ >X+ This file is part of Threading Building Blocks. >X+ >X+ Threading Building Blocks is free software; you can redistribute it >X+ and/or modify it under the terms of the GNU General Public License >X+ version 2 as published by the Free Software Foundation. >X+ >X+ Threading Building Blocks is distributed in the hope that it will be >X+ useful, but WITHOUT ANY WARRANTY; without even the implied warranty >X+ of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the >X+ GNU General Public License for more details. >X+ >X+ You should have received a copy of the GNU General Public License >X+ along with Threading Building Blocks; if not, write to the Free Software >X+ Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA >X+ >X+ As a special exception, you may use this file as part of a free software >X+ library without restriction. Specifically, if other files instantiate >X+ templates or use macros or inline functions from this file, or you compile >X+ this file and link it with other files to produce an executable, this >X+ file does not by itself cause the resulting executable to be covered by >X+ the GNU General Public License. This exception does not however >X+ invalidate any other reasons why the executable file might be covered by >X+ the GNU General Public License. >X+*/ >X+ >X+#ifndef __TBB_machine_H >X+#error Do not include this file directly; include tbb_machine.h instead >X+#endif >X+ >X+#include <stdint.h> >X+#include <unistd.h> >X+#include <sched.h> >X+ >X+#define __TBB_OFFSET_OF_NEXT -8 >X+#define __TBB_WORDSIZE 8 >X+#define __TBB_BIG_ENDIAN 0 >X+ >X+//! Load with acquire semantics, both for hardware and compiler. >X+template<typename T> >X+inline T __TBB_load_with_acquire_via_explicit_fence(const volatile T& location) { >X+ T tmp = location; >X+ __asm__ __volatile__("": : :"memory"); >X+ return tmp; >X+} >X+ >X+//! Store with release semantics, both for hardware and compiler. >X+template<typename T, typename V> >X+inline void __TBB_store_with_release_via_explicit_fence(volatile T& location, V value) { >X+ __asm__ __volatile__("": : :"memory"); >X+ location = value; >X+} >X+ >X+#define __TBB_load_with_acquire __TBB_load_with_acquire_via_explicit_fence >X+#define __TBB_store_with_release __TBB_store_with_release_via_explicit_fence >X+ >X+#define __MACHINE_DECL_ATOMICS(S,T,X) \ >X+static inline T __TBB_machine_cmpswp##S (volatile void *ptr, T value, T comparand ) \ >X+{ \ >X+ T result; \ >X+ \ >X+ __asm__ __volatile__("lock\ncmpxchg" X " %2,%1" \ >X+ : "=a"(result), "=m"(*(T *)ptr) \ >X+ : "q"(value), "0"(comparand) \ >X+ : "memory"); \ >X+ return result; \ >X+} \ >X+ \ >X+static inline T __TBB_machine_fetchadd##S(volatile void *ptr, T addend) \ >X+{ \ >X+ T result; \ >X+ __asm__ __volatile__("lock\nxadd" X " %0,%1" \ >X+ : "=r"(result),"=m"(*(T *)ptr) \ >X+ : "0"(addend) \ >X+ : "memory"); \ >X+ return result; \ >X+} \ >X+ \ >X+static inline T __TBB_machine_fetchstore##S(volatile void *ptr, T value) \ >X+{ \ >X+ T result; \ >X+ __asm__ __volatile__("lock\nxchg" X " %0,%1" \ >X+ : "=r"(result),"=m"(*(T *)ptr) \ >X+ : "0"(value) \ >X+ : "memory"); \ >X+ return result; \ >X+} \ >X+ >X+__MACHINE_DECL_ATOMICS(1,int8_t,"") >X+__MACHINE_DECL_ATOMICS(2,int16_t,"") >X+__MACHINE_DECL_ATOMICS(4,int32_t,"") >X+__MACHINE_DECL_ATOMICS(8,int64_t,"q") >X+ >X+static inline int64_t __TBB_machine_lg( uint64_t x ) { >X+ int64_t j; >X+ __asm__ ("bsr %1,%0" : "=r"(j) : "r"(x)); >X+ return j; >X+} >X+ >X+static inline void __TBB_machine_or( volatile void *ptr, uint64_t addend ) { >X+ __asm__ __volatile__("lock\norq %1,%0" : "=m"(*(uint64_t *)ptr) : "r"(addend) : "memory"); >X+} >X+ >X+static inline void __TBB_machine_pause( int32_t delay ) { >X+ for (int32_t i = 0; i < delay; i++) { >X+ __asm__ __volatile__("pause;"); >X+ } >X+ return; >X+} >X+ >X+// Machine specific atomic operations >X+ >X+#define __TBB_CompareAndSwap1(P,V,C) __TBB_machine_cmpswp1(P,V,C) >X+#define __TBB_CompareAndSwap2(P,V,C) __TBB_machine_cmpswp2(P,V,C) >X+#define __TBB_CompareAndSwap4(P,V,C) __TBB_machine_cmpswp4(P,V,C) >X+#define __TBB_CompareAndSwap8(P,V,C) __TBB_machine_cmpswp8(P,V,C) >X+#define __TBB_CompareAndSwapW(P,V,C) __TBB_machine_cmpswp8(P,V,C) >X+ >X+#define __TBB_FetchAndAdd1(P,V) __TBB_machine_fetchadd1(P,V) >X+#define __TBB_FetchAndAdd2(P,V) __TBB_machine_fetchadd2(P,V) >X+#define __TBB_FetchAndAdd4(P,V) __TBB_machine_fetchadd4(P,V) >X+#define __TBB_FetchAndAdd8(P,V) __TBB_machine_fetchadd8(P,V) >X+#define __TBB_FetchAndAddW(P,V) __TBB_machine_fetchadd8(P,V) >X+ >X+#define __TBB_FetchAndStore1(P,V) __TBB_machine_fetchstore1(P,V) >X+#define __TBB_FetchAndStore2(P,V) __TBB_machine_fetchstore2(P,V) >X+#define __TBB_FetchAndStore4(P,V) __TBB_machine_fetchstore4(P,V) >X+#define __TBB_FetchAndStore8(P,V) __TBB_machine_fetchstore8(P,V) >X+#define __TBB_FetchAndStoreW(P,V) __TBB_machine_fetchstore8(P,V) >X+ >X+#define __TBB_Store8(P,V) (*P = V) >X+#define __TBB_Load8(P) (*P) >X+ >X+#define __TBB_AtomicOR(P,V) __TBB_machine_or(P,V) >X+ >X+// Definition of other functions >X+#define __TBB_Yield() sched_yield() >X+#define __TBB_Pause(V) __TBB_machine_pause(V) >X+#define __TBB_Log2(V) __TBB_machine_lg(V) >X+ >X+// Special atomic functions >X+#define __TBB_FetchAndAddWrelease(P,V) __TBB_FetchAndAddW(P,V) >X+#define __TBB_FetchAndIncrementWacquire(P) __TBB_FetchAndAddW(P,1) >X+#define __TBB_FetchAndDecrementWrelease(P) __TBB_FetchAndAddW(P,-1) >X+ >X+// Definition of Lock functions >X+#undef __TBB_TryLockByte >X+#undef __TBB_LockByte >X+ >X+#define __TBB_cpuid >X+static inline void __TBB_x86_cpuid( int32_t buffer[4], int32_t mode ) { >X+ // NOTE: gcc sometimes fails to compile the following asm. But icc always succeeds. >X+ __asm__ ("cpuid" : "=a"(buffer[0]), >X+ "=b"(buffer[1]), >X+ "=c"(buffer[2]), >X+ "=d"(buffer[3]) : "0"(mode) : "memory" ); >X+} >X+ >Xdiff -r 627751b671bb -r ac2c116b7cee include/tbb/machine/freebsd_ia32.h >X--- /dev/null Thu Jan 01 00:00:00 1970 +0000 >X+++ b/include/tbb/machine/freebsd_ia32.h Sat Sep 29 16:51:17 2007 -0700 >X@@ -0,0 +1,225 @@ >X+/* >X+ Copyright 2005-2007 Intel Corporation. All Rights Reserved. >X+ >X+ This file is part of Threading Building Blocks. >X+ >X+ Threading Building Blocks is free software; you can redistribute it >X+ and/or modify it under the terms of the GNU General Public License >X+ version 2 as published by the Free Software Foundation. >X+ >X+ Threading Building Blocks is distributed in the hope that it will be >X+ useful, but WITHOUT ANY WARRANTY; without even the implied warranty >X+ of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the >X+ GNU General Public License for more details. >X+ >X+ You should have received a copy of the GNU General Public License >X+ along with Threading Building Blocks; if not, write to the Free Software >X+ Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA >X+ >X+ As a special exception, you may use this file as part of a free software >X+ library without restriction. Specifically, if other files instantiate >X+ templates or use macros or inline functions from this file, or you compile >X+ this file and link it with other files to produce an executable, this >X+ file does not by itself cause the resulting executable to be covered by >X+ the GNU General Public License. This exception does not however >X+ invalidate any other reasons why the executable file might be covered by >X+ the GNU General Public License. >X+*/ >X+ >X+#ifndef __TBB_machine_H >X+#error Do not include this file directly; include tbb_machine.h instead >X+#endif >X+ >X+#include <stdint.h> >X+#include <unistd.h> >X+#include <sched.h> >X+ >X+#define __TBB_OFFSET_OF_NEXT -4 >X+#define __TBB_WORDSIZE 4 >X+#define __TBB_BIG_ENDIAN 0 >X+ >X+ >X+#define __MACHINE_DECL_ATOMICS(S,T,X) \ >X+static inline T __TBB_machine_cmpswp##S (volatile void *ptr, T value, T comparand ) \ >X+{ \ >X+ T result; \ >X+ \ >X+ __asm__ __volatile__("lock\ncmpxchg" X " %2,%1" \ >X+ : "=a"(result), "=m"(*(T *)ptr) \ >X+ : "q"(value), "0"(comparand) \ >X+ : "memory"); \ >X+ return result; \ >X+} \ >X+ \ >X+static inline T __TBB_machine_fetchadd##S(volatile void *ptr, T addend) \ >X+{ \ >X+ T result; \ >X+ __asm__ __volatile__("lock\nxadd" X " %0,%1" \ >X+ : "=r"(result), "=m"(*(T *)ptr) \ >X+ : "0"(addend) \ >X+ : "memory"); \ >X+ return result; \ >X+} \ >X+ \ >X+static inline T __TBB_machine_fetchstore##S(volatile void *ptr, T value) \ >X+{ \ >X+ T result; \ >X+ __asm__ __volatile__("lock\nxchg" X " %0,%1" \ >X+ : "=r"(result), "=m"(*(T *)ptr) \ >X+ : "0"(value) \ >X+ : "memory"); \ >X+ return result; \ >X+} \ >X+ >X+__MACHINE_DECL_ATOMICS(1,int8_t,"") >X+__MACHINE_DECL_ATOMICS(2,int16_t,"") >X+__MACHINE_DECL_ATOMICS(4,int32_t,"l") >X+ >X+static int64_t __TBB_machine_cmpswp8 (volatile void *ptr, int64_t value, int64_t comparand ) >X+{ >X+ const int32_t comparand_lo = (int32_t)comparand; >X+ const int32_t comparand_hi = *(int32_t*)((intptr_t)&comparand+sizeof(int32_t)); >X+ int64_t result; >X+ // EBX register saved for compliancy with position-independent code (PIC) rules on IA32 >X+ __asm__ __volatile__ ( >X+ "pushl %%ebx\n\t" >X+ "movl (%%ecx),%%ebx\n\t" >X+ "movl 4(%%ecx),%%ecx\n\t" >X+ "lock\ncmpxchg8b (%2)\n\t" >X+ "popl %%ebx" >X+ : "=A"(result), "=m"(*(int64_t *)ptr) >X+ : "S"(ptr), >X+ "a"(comparand_lo), >X+ "d"(comparand_hi), >X+ "c"(&value) >X+ : "memory", "esp"); >X+ return result; >X+} >X+ >X+static inline int32_t __TBB_machine_lg( uint32_t x ) { >X+ int32_t j; >X+ __asm__ ("bsr %1,%0" : "=r"(j) : "r"(x)); >X+ return j; >X+} >X+ >X+static inline void __TBB_machine_or( volatile void *ptr, uint32_t addend ) { >X+ __asm__ __volatile__("lock\norl %1,%0" : "=m"(*(uint32_t *)ptr) : "r"(addend) : "memory"); >X+} >X+ >X+static inline void __TBB_machine_pause( int32_t delay ) { >X+ for (int32_t i = 0; i < delay; i++) { >X+ __asm__ __volatile__("pause;"); >X+ } >X+ return; >X+} >X+ >X+static inline int64_t __TBB_machine_load8 (const volatile void *ptr) { >X+ int64_t result; >X+ __asm__ __volatile__ ( "fildq %1\n\t" >X+ "fistpq %0" : "=m"(result) : "m"(*(uint64_t *)ptr), "m"(result) : "memory" ); >X+ return result; >X+} >X+ >X+static inline void __TBB_machine_store8 (volatile void *ptr, int64_t value) { >X+ __asm__ __volatile__ ( "fildq %1\n\t" >X+ "fistpq (%2)" : "=m"(*(int64_t *)ptr) : "m"(value), "r"(ptr) : "memory" ); >X+} >X+ >X+template <typename T, size_t S> >X+struct __TBB_machine_load_store { >X+ static inline T load_with_acquire(const volatile T& location) { >X+ T to_return = location; >X+ __asm__ __volatile__("" : : : "memory" ); // Compiler fence to keep operations from migrating upwards >X+ return to_return; >X+ } >X+ >X+ static inline void store_with_release(volatile T &location, T value) { >X+ __asm__ __volatile__("" : : : "memory" ); // Compiler fence to keep operations from migrating upwards >X+ location = value; >X+ } >X+}; >X+ >X+template <typename T> >X+struct __TBB_machine_load_store<T,8> { >X+ static inline T load_with_acquire(const volatile T& location) { >X+ T to_return = __TBB_machine_load8((volatile void *)&location); >X+ __asm__ __volatile__("" : : : "memory" ); // Compiler fence to keep operations from migrating upwards >X+ return to_return; >X+ } >X+ >X+ static inline void store_with_release(volatile T &location, T value) { >X+ __asm__ __volatile__("" : : : "memory" ); // Compiler fence to keep operations from migrating downwards >X+ __TBB_machine_store8((volatile void *)&location,(int64_t)value); >X+ } >X+}; >X+ >X+template<typename T> >X+inline T __TBB_machine_load_with_acquire(const volatile T &location) { >X+ return __TBB_machine_load_store<T,sizeof(T)>::load_with_acquire(location); >X+} >X+ >X+template<typename T, typename V> >X+inline void __TBB_machine_store_with_release(volatile T &location, V value) { >X+ __TBB_machine_load_store<T,sizeof(T)>::store_with_release(location,value); >X+} >X+ >X+#define __TBB_load_with_acquire(L) __TBB_machine_load_with_acquire((L)) >X+#define __TBB_store_with_release(L,V) __TBB_machine_store_with_release((L),(V)) >X+ >X+// Machine specific atomic operations >X+ >X+#define __TBB_CompareAndSwap1(P,V,C) __TBB_machine_cmpswp1(P,V,C) >X+#define __TBB_CompareAndSwap2(P,V,C) __TBB_machine_cmpswp2(P,V,C) >X+#define __TBB_CompareAndSwap4(P,V,C) __TBB_machine_cmpswp4(P,V,C) >X+#define __TBB_CompareAndSwap8(P,V,C) __TBB_machine_cmpswp8(P,V,C) >X+#define __TBB_CompareAndSwapW(P,V,C) __TBB_machine_cmpswp4(P,V,C) >X+ >X+#define __TBB_FetchAndAdd1(P,V) __TBB_machine_fetchadd1(P,V) >X+#define __TBB_FetchAndAdd2(P,V) __TBB_machine_fetchadd2(P,V) >X+#define __TBB_FetchAndAdd4(P,V) __TBB_machine_fetchadd4(P,V) >X+#define __TBB_FetchAndAddW(P,V) __TBB_machine_fetchadd4(P,V) >X+ >X+#define __TBB_FetchAndStore1(P,V) __TBB_machine_fetchstore1(P,V) >X+#define __TBB_FetchAndStore2(P,V) __TBB_machine_fetchstore2(P,V) >X+#define __TBB_FetchAndStore4(P,V) __TBB_machine_fetchstore4(P,V) >X+#define __TBB_FetchAndStoreW(P,V) __TBB_machine_fetchstore4(P,V) >X+ >X+#define __TBB_Store8(P,V) __TBB_machine_store8(P,V) >X+#define __TBB_Load8(P) __TBB_machine_load8(P) >X+ >X+#define __TBB_AtomicOR(P,V) __TBB_machine_or(P,V) >X+ >X+ >X+// Those we chose not to implement (they will be implemented generically using CMPSWP8) >X+#undef __TBB_FetchAndAdd8 >X+#undef __TBB_FetchAndStore8 >X+ >X+// Definition of other functions >X+#define __TBB_Yield() sched_yield() >X+#define __TBB_Pause(V) __TBB_machine_pause(V) >X+#define __TBB_Log2(V) __TBB_machine_lg(V) >X+ >X+// Special atomic functions >X+#define __TBB_FetchAndAddWrelease(P,V) __TBB_FetchAndAddW(P,V) >X+#define __TBB_FetchAndIncrementWacquire(P) __TBB_FetchAndAddW(P,1) >X+#define __TBB_FetchAndDecrementWrelease(P) __TBB_FetchAndAddW(P,-1) >X+ >X+// Definition of Lock functions >X+#undef __TBB_TryLockByte >X+#undef __TBB_LockByte >X+ >X+#define __TBB_cpuid >X+static inline void __TBB_x86_cpuid( int32_t buffer[4], int32_t mode ) { >X+ // EBX register saved for compliancy with position-independent code (PIC) rules on IA32 >X+ __asm__ ("pushl %%ebx\n\t" >X+ "cpuid\n\t" >X+ "movl %%ebx,%1\n\t" >X+ "popl %%ebx" >X+ : "=a"(buffer[0]), >X+ "=S"(buffer[1]), >X+ "=c"(buffer[2]), >X+ "=d"(buffer[3]) >X+ : "0"(mode) >X+ : "memory" ); >X+} >X+ >Xdiff -r 627751b671bb -r ac2c116b7cee include/tbb/machine/freebsd_itanium.h >X--- /dev/null Thu Jan 01 00:00:00 1970 +0000 >X+++ b/include/tbb/machine/freebsd_itanium.h Sat Sep 29 16:51:17 2007 -0700 >X@@ -0,0 +1,179 @@ >X+/* >X+ Copyright 2005-2007 Intel Corporation. All Rights Reserved. >X+ >X+ This file is part of Threading Building Blocks. >X+ >X+ Threading Building Blocks is free software; you can redistribute it >X+ and/or modify it under the terms of the GNU General Public License >X+ version 2 as published by the Free Software Foundation. >X+ >X+ Threading Building Blocks is distributed in the hope that it will be >X+ useful, but WITHOUT ANY WARRANTY; without even the implied warranty >X+ of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the >X+ GNU General Public License for more details. >X+ >X+ You should have received a copy of the GNU General Public License >X+ along with Threading Building Blocks; if not, write to the Free Software >X+ Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA >X+ >X+ As a special exception, you may use this file as part of a free software >X+ library without restriction. Specifically, if other files instantiate >X+ templates or use macros or inline functions from this file, or you compile >X+ this file and link it with other files to produce an executable, this >X+ file does not by itself cause the resulting executable to be covered by >X+ the GNU General Public License. This exception does not however >X+ invalidate any other reasons why the executable file might be covered by >X+ the GNU General Public License. >X+*/ >X+ >X+#ifndef __TBB_machine_H >X+#error Do not include this file directly; include tbb_machine.h instead >X+#endif >X+ >X+#include <stdint.h> >X+#include <unistd.h> >X+#include <sched.h> >X+#include <ia64intrin.h> >X+ >X+#define __TBB_OFFSET_OF_NEXT -8 >X+#define __TBB_WORDSIZE 8 >X+#define __TBB_BIG_ENDIAN 0 >X+#define __TBB_DECL_FENCED_ATOMICS 1 >X+ >X+// Most of the functions will be in a .s file >X+ >X+extern "C" { >X+ int8_t __TBB_machine_cmpswp1__TBB_full_fence (volatile void *ptr, int8_t value, int8_t comparand); >X+ int8_t __TBB_machine_fetchadd1__TBB_full_fence (volatile void *ptr, int8_t addend); >X+ int8_t __TBB_machine_fetchadd1acquire(volatile void *ptr, int8_t addend); >X+ int8_t __TBB_machine_fetchadd1release(volatile void *ptr, int8_t addend); >X+ int8_t __TBB_machine_fetchstore1acquire(volatile void *ptr, int8_t value); >X+ int8_t __TBB_machine_fetchstore1release(volatile void *ptr, int8_t value); >X+ >X+ int16_t __TBB_machine_cmpswp2__TBB_full_fence (volatile void *ptr, int16_t value, int16_t comparand); >X+ int16_t __TBB_machine_fetchadd2__TBB_full_fence (volatile void *ptr, int16_t addend); >X+ int16_t __TBB_machine_fetchadd2acquire(volatile void *ptr, int16_t addend); >X+ int16_t __TBB_machine_fetchadd2release(volatile void *ptr, int16_t addend); >X+ int16_t __TBB_machine_fetchstore2acquire(volatile void *ptr, int16_t value); >X+ int16_t __TBB_machine_fetchstore2release(volatile void *ptr, int16_t value); >X+ >X+ int32_t __TBB_machine_fetchstore4__TBB_full_fence (volatile void *ptr, int32_t value); >X+ int32_t __TBB_machine_fetchstore4acquire(volatile void *ptr, int32_t value); >X+ int32_t __TBB_machine_fetchstore4release(volatile void *ptr, int32_t value); >X+ int32_t __TBB_machine_fetchadd4acquire(volatile void *ptr, int32_t addend); >X+ int32_t __TBB_machine_fetchadd4release(volatile void *ptr, int32_t addend); >X+ >X+ int64_t __TBB_machine_cmpswp8__TBB_full_fence (volatile void *ptr, int64_t value, int64_t comparand); >X+ int64_t __TBB_machine_fetchstore8__TBB_full_fence (volatile void *ptr, int64_t value); >X+ int64_t __TBB_machine_fetchstore8acquire(volatile void *ptr, int64_t value); >X+ int64_t __TBB_machine_fetchstore8release(volatile void *ptr, int64_t value); >X+ int64_t __TBB_machine_fetchadd8acquire(volatile void *ptr, int64_t addend); >X+ int64_t __TBB_machine_fetchadd8release(volatile void *ptr, int64_t addend); >X+ >X+ int8_t __TBB_machine_cmpswp1acquire(volatile void *ptr, int8_t value, int8_t comparand); >X+ int8_t __TBB_machine_cmpswp1release(volatile void *ptr, int8_t value, int8_t comparand); >X+ int8_t __TBB_machine_fetchstore1__TBB_full_fence (volatile void *ptr, int8_t value); >X+ >X+ int16_t __TBB_machine_cmpswp2acquire(volatile void *ptr, int16_t value, int16_t comparand); >X+ int16_t __TBB_machine_cmpswp2release(volatile void *ptr, int16_t value, int16_t comparand); >X+ int16_t __TBB_machine_fetchstore2__TBB_full_fence (volatile void *ptr, int16_t value); >X+ >X+ int32_t __TBB_machine_cmpswp4__TBB_full_fence (volatile void *ptr, int32_t value, int32_t comparand); >X+ int32_t __TBB_machine_cmpswp4acquire(volatile void *ptr, int32_t value, int32_t comparand); >X+ int32_t __TBB_machine_cmpswp4release(volatile void *ptr, int32_t value, int32_t comparand); >X+ int32_t __TBB_machine_fetchadd4__TBB_full_fence (volatile void *ptr, int32_t value); >X+ >X+ int64_t __TBB_machine_cmpswp8acquire(volatile void *ptr, int64_t value, int64_t comparand); >X+ int64_t __TBB_machine_cmpswp8release(volatile void *ptr, int64_t value, int64_t comparand); >X+ int64_t __TBB_machine_fetchadd8__TBB_full_fence (volatile void *ptr, int64_t value); >X+ >X+ int64_t __TBB_machine_lg(uint64_t value); >X+ void __TBB_machine_pause(int32_t delay); >X+ bool __TBB_machine_trylockbyte( volatile unsigned char &ptr ); >X+} >X+ >X+#define __TBB_CompareAndSwap1(P,V,C) __TBB_machine_cmpswp1__TBB_full_fence(P,V,C) >X+#define __TBB_CompareAndSwap2(P,V,C) __TBB_machine_cmpswp2__TBB_full_fence(P,V,C) >X+ >X+#define __TBB_FetchAndAdd1(P,V) __TBB_machine_fetchadd1__TBB_full_fence(P,V) >X+#define __TBB_FetchAndAdd1acquire(P,V) __TBB_machine_fetchadd1acquire(P,V) >X+#define __TBB_FetchAndAdd1release(P,V) __TBB_machine_fetchadd1release(P,V) >X+#define __TBB_FetchAndAdd2(P,V) __TBB_machine_fetchadd2__TBB_full_fence(P,V) >X+#define __TBB_FetchAndAdd2acquire(P,V) __TBB_machine_fetchadd2acquire(P,V) >X+#define __TBB_FetchAndAdd2release(P,V) __TBB_machine_fetchadd2release(P,V) >X+#define __TBB_FetchAndAdd4acquire(P,V) __TBB_machine_fetchadd4acquire(P,V) >X+#define __TBB_FetchAndAdd4release(P,V) __TBB_machine_fetchadd4release(P,V) >X+#define __TBB_FetchAndAdd8acquire(P,V) __TBB_machine_fetchadd8acquire(P,V) >X+#define __TBB_FetchAndAdd8release(P,V) __TBB_machine_fetchadd8release(P,V) >X+ >X+#define __TBB_FetchAndStore1acquire(P,V) __TBB_machine_fetchstore1acquire(P,V) >X+#define __TBB_FetchAndStore1release(P,V) __TBB_machine_fetchstore1release(P,V) >X+#define __TBB_FetchAndStore2acquire(P,V) __TBB_machine_fetchstore2acquire(P,V) >X+#define __TBB_FetchAndStore2release(P,V) __TBB_machine_fetchstore2release(P,V) >X+#define __TBB_FetchAndStore4acquire(P,V) __TBB_machine_fetchstore4acquire(P,V) >X+#define __TBB_FetchAndStore4release(P,V) __TBB_machine_fetchstore4release(P,V) >X+#define __TBB_FetchAndStore8acquire(P,V) __TBB_machine_fetchstore8acquire(P,V) >X+#define __TBB_FetchAndStore8release(P,V) __TBB_machine_fetchstore8release(P,V) >X+ >X+#define __TBB_CompareAndSwap1acquire(P,V,C) __TBB_machine_cmpswp1acquire(P,V,C) >X+#define __TBB_CompareAndSwap1release(P,V,C) __TBB_machine_cmpswp1release(P,V,C) >X+#define __TBB_CompareAndSwap2acquire(P,V,C) __TBB_machine_cmpswp2acquire(P,V,C) >X+#define __TBB_CompareAndSwap2release(P,V,C) __TBB_machine_cmpswp2release(P,V,C) >X+#define __TBB_CompareAndSwap4(P,V,C) __TBB_machine_cmpswp4__TBB_full_fence(P,V,C) >X+#define __TBB_CompareAndSwap4acquire(P,V,C) __TBB_machine_cmpswp4acquire(P,V,C) >X+#define __TBB_CompareAndSwap4release(P,V,C) __TBB_machine_cmpswp4release(P,V,C) >X+#define __TBB_CompareAndSwap8(P,V,C) __TBB_machine_cmpswp8__TBB_full_fence(P,V,C) >X+#define __TBB_CompareAndSwap8acquire(P,V,C) __TBB_machine_cmpswp8acquire(P,V,C) >X+#define __TBB_CompareAndSwap8release(P,V,C) __TBB_machine_cmpswp8release(P,V,C) >X+ >X+#define __TBB_FetchAndAdd4(P,V) __TBB_machine_fetchadd4__TBB_full_fence(P,V) >X+#define __TBB_FetchAndAdd8(P,V) __TBB_machine_fetchadd8__TBB_full_fence(P,V) >X+ >X+#define __TBB_FetchAndStore1(P,V) __TBB_machine_fetchstore1__TBB_full_fence(P,V) >X+#define __TBB_FetchAndStore2(P,V) __TBB_machine_fetchstore2__TBB_full_fence(P,V) >X+#define __TBB_FetchAndStore4(P,V) __TBB_machine_fetchstore4__TBB_full_fence(P,V) >X+#define __TBB_FetchAndStore8(P,V) __TBB_machine_fetchstore8__TBB_full_fence(P,V) >X+ >X+#define __TBB_FetchAndIncrementWacquire(P) __TBB_FetchAndAdd8acquire(P,1) >X+#define __TBB_FetchAndDecrementWrelease(P) __TBB_FetchAndAdd8release(P,-1) >X+ >X+#ifndef __INTEL_COMPILER >X+template<typename T, typename V> >X+inline void __TBB_store_with_release_via_explicit_fence(volatile T& location, V value) { >X+ __asm__ __volatile__("": : :"memory"); >X+ location = value; >X+} >X+ >X+//! Load with acquire semantics, both for hardware and compiler. >X+/** Even though GCC imbues volatile loads with acquire semantics, >X+ it sometimes hoists loads over the acquire fence. We use >X+ an explicit memory fence to prevent such incorrect hoisting. */ >X+template<typename T> >X+inline T __TBB_load_with_acquire_via_explicit_fence(const volatile T& location) { >X+ T tmp = location; >X+ __asm__ __volatile__("": : :"memory"); >X+ return tmp; >X+} >X+#define __TBB_load_with_acquire(L) __TBB_load_with_acquire_via_explicit_fence(L) >X+#define __TBB_store_with_release(L,V) __TBB_store_with_release_via_explicit_fence(L,V) >X+#endif >X+ >X+// Special atomic functions >X+#define __TBB_CompareAndSwapW(P,V,C) __TBB_CompareAndSwap8(P,V,C) >X+#define __TBB_FetchAndStoreW(P,V) __TBB_FetchAndStore8(P,V) >X+#define __TBB_FetchAndAddW(P,V) __TBB_FetchAndAdd8(P,V) >X+#define __TBB_FetchAndAddWrelease(P,V) __TBB_FetchAndAdd8release(P,V) >X+ >X+// Not needed >X+#undef __TBB_Store8 >X+#undef __TBB_Load8 >X+ >X+// Definition of Lock functions >X+#define __TBB_TryLockByte(P) __TBB_machine_trylockbyte(P) >X+#undef __TBB_LockByte >X+ >X+// Definition of other utility functions >X+#define __TBB_Yield() sched_yield() >X+#define __TBB_Pause(V) __TBB_machine_pause(V) >X+#define __TBB_Log2(V) __TBB_machine_lg(V) >X+ >Xdiff -r 627751b671bb -r ac2c116b7cee include/tbb/tbb_machine.h >X--- a/include/tbb/tbb_machine.h Sat Sep 29 16:18:03 2007 -0700 >X+++ b/include/tbb/tbb_machine.h Sat Sep 29 16:51:17 2007 -0700 >X@@ -65,6 +65,16 @@ typedef unsigned __int64 uint64_t; >X #include "tbb/machine/linux_em64t.h" >X #elif __ia64__ >X #include "tbb/machine/linux_itanium.h" >X+#endif >X+ >X+#elif __FreeBSD__ >X+ >X+#if __i386__ >X+#include "tbb/machine/freebsd_ia32.h" >X+#elif __x86_64__ >X+#include "tbb/machine/freebsd_em64t.h" >X+#elif __ia64__ >X+#include "tbb/machine/freebsd_itanium.h" >X #endif >X >X #elif __APPLE__ >Xdiff -r 627751b671bb -r ac2c116b7cee src/tbb/cache_aligned_allocator.cpp >X--- a/src/tbb/cache_aligned_allocator.cpp Sat Sep 29 16:18:03 2007 -0700 >X+++ b/src/tbb/cache_aligned_allocator.cpp Sat Sep 29 16:51:17 2007 -0700 >X@@ -69,7 +69,7 @@ static const DynamicLinkDescriptor Mallo >X #define MALLOCLIB_NAME "tbbmalloc" DEBUG_SUFFIX ".dll" >X #elif __APPLE__ >X #define MALLOCLIB_NAME "libtbbmalloc" DEBUG_SUFFIX ".dylib" >X-#elif __linux__ >X+#elif __linux__ || __FreeBSD__ >X #define MALLOCLIB_NAME "libtbbmalloc" DEBUG_SUFFIX ".so" >X #else >X #error Unknown OS >Xdiff -r 627751b671bb -r ac2c116b7cee src/tbb/itt_notify.cpp >X--- a/src/tbb/itt_notify.cpp Sat Sep 29 16:18:03 2007 -0700 >X+++ b/src/tbb/itt_notify.cpp Sat Sep 29 16:51:17 2007 -0700 >X@@ -70,7 +70,7 @@ static const DynamicLinkDescriptor ITT_H >X // LIBITTNOTIFY_NAME is the name of the ITT notification library >X # if _WIN32||_WIN64 >X # define LIBITTNOTIFY_NAME "libittnotify.dll" >X-# elif __linux__ >X+# elif __linux__ || __FreeBSD__ >X # define LIBITTNOTIFY_NAME "libittnotify.so" >X # elif __APPLE__ >X # define LIBITTNOTIFY_NAME "libittnotify.dylib" >Xdiff -r 627751b671bb -r ac2c116b7cee src/tbb/tbb_misc.h >X--- a/src/tbb/tbb_misc.h Sat Sep 29 16:18:03 2007 -0700 >X+++ b/src/tbb/tbb_misc.h Sat Sep 29 16:51:17 2007 -0700 >X@@ -32,11 +32,8 @@ >X #include "tbb/tbb_stddef.h" >X #include "tbb/tbb_machine.h" >X >X-#if __linux__ >X-#include <sys/sysinfo.h> >X-#elif __APPLE__ >X-#include <sys/types.h> >X-#include <sys/sysctl.h> >X+#if defined(__linux__) || defined(__APPLE__) || defined(__FreeBSD__) >X+#include <unistd.h> >X #endif >X >X namespace tbb { >X@@ -59,24 +56,11 @@ static inline int DetectNumberOfWorkers( >X return number_of_workers; >X } >X >X-#elif __linux__ >X+#elif defined(__linux__) || defined(__APPLE__) || defined(__FreeBSD__) >X >X static inline int DetectNumberOfWorkers( void ) { >X if (!number_of_workers) { >X- number_of_workers = get_nprocs(); >X- } >X- return number_of_workers; >X-} >X- >X-#elif __APPLE__ >X- >X-static inline int DetectNumberOfWorkers( void ) { >X- if (!number_of_workers) { >X- int name[2] = {CTL_HW, HW_AVAILCPU}; >X- int ncpu; >X- size_t size = sizeof(ncpu); >X- sysctl( name, 2, &ncpu, &size, NULL, 0 ); >X- number_of_workers = ncpu; >X+ number_of_workers = sysconf(_SC_NPROCESSORS_ONLN); >X } >X return number_of_workers; >X } >Xdiff -r 627751b671bb -r ac2c116b7cee src/tbbmalloc/MemoryAllocator.cpp >X--- a/src/tbbmalloc/MemoryAllocator.cpp Sat Sep 29 16:18:03 2007 -0700 >X+++ b/src/tbbmalloc/MemoryAllocator.cpp Sat Sep 29 16:51:17 2007 -0700 >X@@ -324,7 +324,7 @@ static inline unsigned int highestBitPos >X unsigned int pos; >X #if __ARCH_x86_32||__ARCH_x86_64 >X >X-# if __linux__||__APPLE__ >X+# if __linux__||__APPLE__ || __FreeBSD__ >X __asm__ ("bsr %1,%0" : "=r"(pos) : "r"(number)); >X # elif (_WIN32 && (!_WIN64 || __INTEL_COMPILER)) >X __asm >Xdiff -r 627751b671bb -r ac2c116b7cee src/test/harness.h >X--- a/src/test/harness.h Sat Sep 29 16:18:03 2007 -0700 >X+++ b/src/test/harness.h Sat Sep 29 16:51:17 2007 -0700 >X@@ -38,7 +38,7 @@ >X #include "tbb/tbb_stddef.h" >X #include "harness_assert.h" >X >X-#if __linux__||__APPLE__ >X+#if __linux__||__APPLE__ || __FreeBSD__ >X #include <pthread.h> >X #elif _WIN32||WIN64 >X #include <windows.h> >X@@ -120,7 +120,7 @@ public: >X >X //! Start task >X void start() { >X-#if __linux__||__APPLE__ >X+#if __linux__||__APPLE__ || __FreeBSD__ >X int status = pthread_create(&thread_id, NULL, thread_function, this); >X ASSERT(0==status, "NativeParallelFor: pthread_create failed"); >X #else >X@@ -132,7 +132,7 @@ public: >X >X //! Wait for task to finish >X void wait_to_finish() { >X-#if __linux__||__APPLE__ >X+#if __linux__||__APPLE__ || __FreeBSD__ >X int status = pthread_join( thread_id, NULL ); >X ASSERT( !status, "pthread_join failed" ); >X #else >X@@ -148,7 +148,7 @@ public: >X Top-level caller should let index default to 0. */ >X static size_t build_task_array( const Range& range, const Body& body, NativeParalleForTask* array, size_t index ); >X private: >X-#if __linux__||__APPLE__ >X+#if __linux__||__APPLE__ || __FreeBSD__ >X pthread_t thread_id; >X #else >X HANDLE thread_handle; >X@@ -160,7 +160,7 @@ private: >X //! Body to invoke over the range. >X const Body body; >X >X-#if __linux__||__APPLE__ >X+#if __linux__||__APPLE__ || __FreeBSD__ >X static void* thread_function(void* object) >X #else >X static unsigned __stdcall thread_function( void* object ) >X--- a/src/test/test_concurrent_hash_map.cpp Sat Sep 29 16:51:17 2007 -0700 >X+++ b/src/test/test_concurrent_hash_map.cpp Sat Sep 29 17:08:18 2007 -0700 >X@@ -320,7 +320,7 @@ public: >X // more logical threads than physical threads, and should yield in >X // order to let suspended logical threads make progress. >X j = 0; >X-#if __linux__||__APPLE__ >X+#if __linux__ || __APPLE__ || __FreeBSD__ >X sched_yield(); >X #else >X Sleep(0); >END-of-devel/tbb/files/patch-freebsd >echo x - devel/tbb/Makefile >sed 's/^X//' >devel/tbb/Makefile << 'END-of-devel/tbb/Makefile' >X# New ports collection makefile for: tbb >X# Date created: 30 Sept 2007 >X# >X# $FreeBSD: $ >X# >X >XPORTNAME= tbb >XPORTVERSION= 2.0 >XCATEGORIES= devel >XMASTER_SITES= http://osstbb.intel.com/uploads/76/74/2.0/ >XDISTFILES= tbb20_20070815oss_src.tar.gz >XWRKSRC= ${WRKDIR}/tbb20_20070815oss_src >XPATCH_STRIP= -p1 >XUSE_GMAKE= yes >XALL_TARGET= tbb_release >X >XMAINTAINER= arun@FreeBSD.org >XCOMMENT= A library that provides thread building blocks >X >Xdo-install: >X cd ${WRKSRC}; \ >X ${INSTALL_DATA} build/freebsd*release/libtbb.so \ >X ${PREFIX}/lib/libtbb.so; \ >X ${MKDIR} -p ${PREFIX}/include/tbb/machine; \ >X ${FIND} include -type f -name '*.h' -exec \ >X ${INSTALL_DATA} \{\} ${PREFIX}/\{\} \; >X >X.include <bsd.port.mk> >END-of-devel/tbb/Makefile >echo x - devel/tbb/pkg-descr >sed 's/^X//' >devel/tbb/pkg-descr << 'END-of-devel/tbb/pkg-descr' >XIntel Threading Building Blocks (TBB) offers a rich and complete >Xapproach to expressing parallelism in a C++ program. It is a library >Xthat helps you take advantage of multi-core processor performance >Xwithout having to be a threading expert. Threading Building Blocks >Xis not just a threads-replacement library. It represents a higher-level, >Xtask-based parallelism that abstracts platform details and threading >Xmechanism for performance and scalability. >X >XWWW: http://tbb.sourceforge.net/ >X >X- Arun Sharma >Xarun@FreeBSD.org >END-of-devel/tbb/pkg-descr >echo x - devel/tbb/pkg-plist >sed 's/^X//' >devel/tbb/pkg-plist << 'END-of-devel/tbb/pkg-plist' >Xinclude/tbb/aligned_space.h >Xinclude/tbb/atomic.h >Xinclude/tbb/blocked_range.h >Xinclude/tbb/blocked_range2d.h >Xinclude/tbb/cache_aligned_allocator.h >Xinclude/tbb/concurrent_hash_map.h >Xinclude/tbb/concurrent_queue.h >Xinclude/tbb/concurrent_vector.h >Xinclude/tbb/mutex.h >Xinclude/tbb/parallel_for.h >Xinclude/tbb/parallel_reduce.h >Xinclude/tbb/parallel_scan.h >Xinclude/tbb/parallel_sort.h >Xinclude/tbb/parallel_while.h >Xinclude/tbb/pipeline.h >Xinclude/tbb/queuing_mutex.h >Xinclude/tbb/queuing_rw_mutex.h >Xinclude/tbb/scalable_allocator.h >Xinclude/tbb/task.h >Xinclude/tbb/spin_mutex.h >Xinclude/tbb/spin_rw_mutex.h >Xinclude/tbb/task_scheduler_init.h >Xinclude/tbb/tbb_stddef.h >Xinclude/tbb/tick_count.h >Xinclude/tbb/_tbb_windef.h >Xinclude/tbb/partitioner.h >Xinclude/tbb/tbb_machine.h >Xinclude/tbb/machine/linux_ia32.h >Xinclude/tbb/machine/linux_em64t.h >Xinclude/tbb/machine/linux_itanium.h >Xinclude/tbb/machine/mac_ppc.h >Xinclude/tbb/machine/windows_ia32.h >Xinclude/tbb/machine/windows_ia32_inline.h >Xinclude/tbb/machine/windows_em64t.h >Xinclude/tbb/machine/freebsd_em64t.h >Xinclude/tbb/machine/freebsd_ia32.h >Xinclude/tbb/machine/freebsd_itanium.h >Xlib/libtbb.so >END-of-devel/tbb/pkg-plist >echo x - devel/tbb/distinfo >sed 's/^X//' >devel/tbb/distinfo << 'END-of-devel/tbb/distinfo' >XMD5 (tbb20_20070815oss_src.tar.gz) = 6651f40867760d7aee0b4cb8e44677e2 >XSHA256 (tbb20_20070815oss_src.tar.gz) = 3bb0ec30720fee22f271df332a102a12e097f600be296cab449cbcd5dbd363a5 >XSIZE (tbb20_20070815oss_src.tar.gz) = 715341 >END-of-devel/tbb/distinfo >exit
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bug 116771
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