Attachment #83464 for bug #119205




#include <sys/kernel.h>
#include <sys/module.h>
#include <sys/socket.h>
#include <sys/sysctl.h>

#include <net/if.h>
#include <net/if_arp.h>


static devclass_t dc_devclass;

SYSCTL_NODE(_hw, OID_AUTO, dc, CTLFLAG_RD, 0, "if_dc parameters");

static int dc_ints;
SYSCTL_INT(_hw_dc, OID_AUTO, ints, CTLFLAG_RW, &dc_ints, 0, "");

static int dc_isr_abnormal;
SYSCTL_INT(_hw_dc, OID_AUTO, abnormal, CTLFLAG_RW, &dc_isr_abnormal, 0, "");

static int dc_isr_bus_err;
SYSCTL_INT(_hw_dc, OID_AUTO, bus_err, CTLFLAG_RW, &dc_isr_bus_err, 0, "");

static int dc_isr_normal;
SYSCTL_INT(_hw_dc, OID_AUTO, normal, CTLFLAG_RW, &dc_isr_normal, 0, "");

static int dc_isr_rx_nobuf;
SYSCTL_INT(_hw_dc, OID_AUTO, rx_nobuf, CTLFLAG_RW, &dc_isr_rx_nobuf, 0, "");

static int dc_isr_rx_ok;
SYSCTL_INT(_hw_dc, OID_AUTO, rx_ok, CTLFLAG_RW, &dc_isr_rx_ok, 0, "");

static int dc_isr_rx_watdogtimeo;
SYSCTL_INT(_hw_dc, OID_AUTO, rx_watdogtimeo, CTLFLAG_RW, &dc_isr_rx_watdogtimeo, 0, "");

static int dc_isr_tx_idle;
SYSCTL_INT(_hw_dc, OID_AUTO, tx_idle, CTLFLAG_RW, &dc_isr_tx_idle, 0, "");

static int dc_isr_tx_nobuf;
SYSCTL_INT(_hw_dc, OID_AUTO, tx_nobuf, CTLFLAG_RW, &dc_isr_tx_nobuf, 0, "");

static int dc_isr_tx_ok;
SYSCTL_INT(_hw_dc, OID_AUTO, tx_ok, CTLFLAG_RW, &dc_isr_tx_ok, 0, "");

static int dc_isr_tx_underrun;
SYSCTL_INT(_hw_dc, OID_AUTO, tx_underrun, CTLFLAG_RW, &dc_isr_tx_underrun, 0, "");

static int dc_rx_resync1;
SYSCTL_INT(_hw_dc, OID_AUTO, resync1, CTLFLAG_RW, &dc_rx_resync1, 0, "");

static int dc_rx_resync2;
SYSCTL_INT(_hw_dc, OID_AUTO, resync2, CTLFLAG_RW, &dc_rx_resync2, 0, "");

DRIVER_MODULE(dc, cardbus, dc_driver, dc_devclass, 0, 0);
DRIVER_MODULE(dc, pci, dc_driver, dc_devclass, 0, 0);
DRIVER_MODULE(miibus, dc, miibus_driver, miibus_devclass, 0, 0);

	/* Disable interrupts. */
	CSR_WRITE_4(sc, DC_IMR, 0x00000000);

	dc_ints++;

	while (((status = CSR_READ_4(sc, DC_ISR)) & DC_INTRS) &&
	    status != 0xFFFFFFFF &&
	    (ifp->if_drv_flags & IFF_DRV_RUNNING)) {

		CSR_WRITE_4(sc, DC_ISR, status);

		if (status & DC_ISR_ABNORMAL)
			dc_isr_abnormal++;
		if (status & DC_ISR_NORMAL)
			dc_isr_normal++;

		if (status & DC_ISR_RX_OK) {
			int		curpkts;

			dc_isr_rx_ok++;
			curpkts = ifp->if_ipackets;
			dc_rxeof(sc);
			if (curpkts == ifp->if_ipackets) {
				while (dc_rx_resync(sc)) {
					dc_rx_resync1++;
					dc_rxeof(sc);
				}
			}
		}

	 	if (status & (DC_ISR_TX_OK | DC_ISR_TX_NOBUF)) {
		 	if (status & DC_ISR_TX_OK)
				dc_isr_tx_ok++;
		 	if (status & DC_ISR_TX_NOBUF)
				dc_isr_tx_nobuf++;
			dc_txeof(sc);
		}

		if (status & DC_ISR_TX_IDLE) {
			dc_isr_tx_idle++;
			dc_txeof(sc);
			if (sc->dc_cdata.dc_tx_cnt) {
				DC_SETBIT(sc, DC_NETCFG, DC_NETCFG_TX_ON);

			}
		}

		if (status & DC_ISR_TX_UNDERRUN) {
			dc_isr_tx_underrun++;
			dc_tx_underrun(sc);
		}

		if ((status & DC_ISR_RX_WATDOGTIMEO)
		    || (status & DC_ISR_RX_NOBUF)) {
			int		curpkts;
			if (status & DC_ISR_RX_WATDOGTIMEO)
				dc_isr_rx_watdogtimeo++;
			if (status & DC_ISR_RX_NOBUF)
				dc_isr_rx_nobuf++;
			curpkts = ifp->if_ipackets;
			dc_rxeof(sc);
			if (curpkts == ifp->if_ipackets) {
				while (dc_rx_resync(sc)) {
					dc_rx_resync2++;
					dc_rxeof(sc);
				}
			}
		}

		if (status & DC_ISR_BUS_ERR) {
			dc_isr_bus_err++;
			dc_reset(sc);
			dc_init_locked(sc);
		}

Return to bug 119205

Lines 104-109 Link Here

(-)sys/dev/dc/if_dc.c (-4 / +72 lines)
104	#include <sys/kernel.h>	104	#include <sys/kernel.h>
105	#include <sys/module.h>	105	#include <sys/module.h>
106	#include <sys/socket.h>	106	#include <sys/socket.h>
		107	#include <sys/sysctl.h>
107		108
108	#include <net/if.h>	109	#include <net/if.h>
109	#include <net/if_arp.h>	110	#include <net/if_arp.h>
Lines 333-338 Link Here
333		334
334	static devclass_t dc_devclass;	335	static devclass_t dc_devclass;
335		336
		337	SYSCTL_NODE(_hw, OID_AUTO, dc, CTLFLAG_RD, 0, "if_dc parameters");
		338
		339	static int dc_ints;
		340	SYSCTL_INT(_hw_dc, OID_AUTO, ints, CTLFLAG_RW, &dc_ints, 0, "");
		341
		342	static int dc_isr_abnormal;
		343	SYSCTL_INT(_hw_dc, OID_AUTO, abnormal, CTLFLAG_RW, &dc_isr_abnormal, 0, "");
		344
		345	static int dc_isr_bus_err;
		346	SYSCTL_INT(_hw_dc, OID_AUTO, bus_err, CTLFLAG_RW, &dc_isr_bus_err, 0, "");
		347
		348	static int dc_isr_normal;
		349	SYSCTL_INT(_hw_dc, OID_AUTO, normal, CTLFLAG_RW, &dc_isr_normal, 0, "");
		350
		351	static int dc_isr_rx_nobuf;
		352	SYSCTL_INT(_hw_dc, OID_AUTO, rx_nobuf, CTLFLAG_RW, &dc_isr_rx_nobuf, 0, "");
		353
		354	static int dc_isr_rx_ok;
		355	SYSCTL_INT(_hw_dc, OID_AUTO, rx_ok, CTLFLAG_RW, &dc_isr_rx_ok, 0, "");
		356
		357	static int dc_isr_rx_watdogtimeo;
		358	SYSCTL_INT(_hw_dc, OID_AUTO, rx_watdogtimeo, CTLFLAG_RW, &dc_isr_rx_watdogtimeo, 0, "");
		359
		360	static int dc_isr_tx_idle;
		361	SYSCTL_INT(_hw_dc, OID_AUTO, tx_idle, CTLFLAG_RW, &dc_isr_tx_idle, 0, "");
		362
		363	static int dc_isr_tx_nobuf;
		364	SYSCTL_INT(_hw_dc, OID_AUTO, tx_nobuf, CTLFLAG_RW, &dc_isr_tx_nobuf, 0, "");
		365
		366	static int dc_isr_tx_ok;
		367	SYSCTL_INT(_hw_dc, OID_AUTO, tx_ok, CTLFLAG_RW, &dc_isr_tx_ok, 0, "");
		368
		369	static int dc_isr_tx_underrun;
		370	SYSCTL_INT(_hw_dc, OID_AUTO, tx_underrun, CTLFLAG_RW, &dc_isr_tx_underrun, 0, "");
		371
		372	static int dc_rx_resync1;
		373	SYSCTL_INT(_hw_dc, OID_AUTO, resync1, CTLFLAG_RW, &dc_rx_resync1, 0, "");
		374
		375	static int dc_rx_resync2;
		376	SYSCTL_INT(_hw_dc, OID_AUTO, resync2, CTLFLAG_RW, &dc_rx_resync2, 0, "");
		377
336	DRIVER_MODULE(dc, cardbus, dc_driver, dc_devclass, 0, 0);	378	DRIVER_MODULE(dc, cardbus, dc_driver, dc_devclass, 0, 0);
337	DRIVER_MODULE(dc, pci, dc_driver, dc_devclass, 0, 0);	379	DRIVER_MODULE(dc, pci, dc_driver, dc_devclass, 0, 0);
338	DRIVER_MODULE(miibus, dc, miibus_driver, miibus_devclass, 0, 0);	380	DRIVER_MODULE(miibus, dc, miibus_driver, miibus_devclass, 0, 0);
Lines 3065-3090 Link Here
3065	/* Disable interrupts. */	3107	/* Disable interrupts. */
3066	CSR_WRITE_4(sc, DC_IMR, 0x00000000);	3108	CSR_WRITE_4(sc, DC_IMR, 0x00000000);
3067		3109
		3110	dc_ints++;
		3111
3068	while (((status = CSR_READ_4(sc, DC_ISR)) & DC_INTRS) &&	3112	while (((status = CSR_READ_4(sc, DC_ISR)) & DC_INTRS) &&
3069	status != 0xFFFFFFFF &&	3113	status != 0xFFFFFFFF &&
3070	(ifp->if_drv_flags & IFF_DRV_RUNNING)) {	3114	(ifp->if_drv_flags & IFF_DRV_RUNNING)) {
3071		3115
3072	CSR_WRITE_4(sc, DC_ISR, status);	3116	CSR_WRITE_4(sc, DC_ISR, status);
3073		3117
		3118	if (status & DC_ISR_ABNORMAL)
		3119	dc_isr_abnormal++;
		3120	if (status & DC_ISR_NORMAL)
		3121	dc_isr_normal++;
		3122
3074	if (status & DC_ISR_RX_OK) {	3123	if (status & DC_ISR_RX_OK) {
3075	int curpkts;	3124	int curpkts;
		3125
		3126	dc_isr_rx_ok++;
3076	curpkts = ifp->if_ipackets;	3127	curpkts = ifp->if_ipackets;
3077	dc_rxeof(sc);	3128	dc_rxeof(sc);
3078	if (curpkts == ifp->if_ipackets) {	3129	if (curpkts == ifp->if_ipackets) {
3079	while (dc_rx_resync(sc))	3130	while (dc_rx_resync(sc)) {
		3131	dc_rx_resync1++;
3080	dc_rxeof(sc);	3132	dc_rxeof(sc);
		3133	}
3081	}	3134	}
3082	}	3135	}
3083		3136
3084	if (status & (DC_ISR_TX_OK \| DC_ISR_TX_NOBUF))	3137	if (status & (DC_ISR_TX_OK \| DC_ISR_TX_NOBUF)) {
		3138	if (status & DC_ISR_TX_OK)
		3139	dc_isr_tx_ok++;
		3140	if (status & DC_ISR_TX_NOBUF)
		3141	dc_isr_tx_nobuf++;
3085	dc_txeof(sc);	3142	dc_txeof(sc);
		3143	}
3086		3144
3087	if (status & DC_ISR_TX_IDLE) {	3145	if (status & DC_ISR_TX_IDLE) {
		3146	dc_isr_tx_idle++;
3088	dc_txeof(sc);	3147	dc_txeof(sc);
3089	if (sc->dc_cdata.dc_tx_cnt) {	3148	if (sc->dc_cdata.dc_tx_cnt) {
3090	DC_SETBIT(sc, DC_NETCFG, DC_NETCFG_TX_ON);	3149	DC_SETBIT(sc, DC_NETCFG, DC_NETCFG_TX_ON);
Lines 3092-3112 Link Here
3092	}	3151	}
3093	}	3152	}
3094		3153
3095	if (status & DC_ISR_TX_UNDERRUN)	3154	if (status & DC_ISR_TX_UNDERRUN) {
		3155	dc_isr_tx_underrun++;
3096	dc_tx_underrun(sc);	3156	dc_tx_underrun(sc);
		3157	}
3097		3158
3098	if ((status & DC_ISR_RX_WATDOGTIMEO)	3159	if ((status & DC_ISR_RX_WATDOGTIMEO)
3099	\|\| (status & DC_ISR_RX_NOBUF)) {	3160	\|\| (status & DC_ISR_RX_NOBUF)) {
3100	int curpkts;	3161	int curpkts;
		3162	if (status & DC_ISR_RX_WATDOGTIMEO)
		3163	dc_isr_rx_watdogtimeo++;
		3164	if (status & DC_ISR_RX_NOBUF)
		3165	dc_isr_rx_nobuf++;
3101	curpkts = ifp->if_ipackets;	3166	curpkts = ifp->if_ipackets;
3102	dc_rxeof(sc);	3167	dc_rxeof(sc);
3103	if (curpkts == ifp->if_ipackets) {	3168	if (curpkts == ifp->if_ipackets) {
3104	while (dc_rx_resync(sc))	3169	while (dc_rx_resync(sc)) {
		3170	dc_rx_resync2++;
3105	dc_rxeof(sc);	3171	dc_rxeof(sc);
		3172	}
3106	}	3173	}
3107	}	3174	}
3108		3175
3109	if (status & DC_ISR_BUS_ERR) {	3176	if (status & DC_ISR_BUS_ERR) {
		3177	dc_isr_bus_err++;
3110	dc_reset(sc);	3178	dc_reset(sc);
3111	dc_init_locked(sc);	3179	dc_init_locked(sc);
3112	}	3180	}