|
Removed
Link Here
|
| 1 |
FreeBSD support. |
| 2 |
|
| 3 |
Signed-off-by: Arun Sharma <arun-public@sharma-home.net> |
| 4 |
|
| 5 |
diff -r 627751b671bb -r ac2c116b7cee build/common.inc |
| 6 |
--- a/build/common.inc Sat Sep 29 16:18:03 2007 -0700 |
| 7 |
+++ b/build/common.inc Sat Sep 29 16:51:17 2007 -0700 |
| 8 |
@@ -37,6 +37,9 @@ ifndef tbb_os |
| 9 |
endif |
| 10 |
ifeq ($(OS), Darwin) |
| 11 |
export tbb_os=macos |
| 12 |
+ endif |
| 13 |
+ ifeq ($(OS), FreeBSD) |
| 14 |
+ export tbb_os=freebsd |
| 15 |
endif |
| 16 |
endif |
| 17 |
endif |
| 18 |
diff -r 627751b671bb -r ac2c116b7cee build/freebsd.gcc.inc |
| 19 |
--- /dev/null Thu Jan 01 00:00:00 1970 +0000 |
| 20 |
+++ b/build/freebsd.gcc.inc Sat Sep 29 16:51:17 2007 -0700 |
| 21 |
@@ -0,0 +1,98 @@ |
| 22 |
+# Copyright 2005-2007 Intel Corporation. All Rights Reserved. |
| 23 |
+# |
| 24 |
+# This file is part of Threading Building Blocks. |
| 25 |
+# |
| 26 |
+# Threading Building Blocks is free software; you can redistribute it |
| 27 |
+# and/or modify it under the terms of the GNU General Public License |
| 28 |
+# version 2 as published by the Free Software Foundation. |
| 29 |
+# |
| 30 |
+# Threading Building Blocks is distributed in the hope that it will be |
| 31 |
+# useful, but WITHOUT ANY WARRANTY; without even the implied warranty |
| 32 |
+# of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 33 |
+# GNU General Public License for more details. |
| 34 |
+# |
| 35 |
+# You should have received a copy of the GNU General Public License |
| 36 |
+# along with Threading Building Blocks; if not, write to the Free Software |
| 37 |
+# Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA |
| 38 |
+# |
| 39 |
+# As a special exception, you may use this file as part of a free software |
| 40 |
+# library without restriction. Specifically, if other files instantiate |
| 41 |
+# templates or use macros or inline functions from this file, or you compile |
| 42 |
+# this file and link it with other files to produce an executable, this |
| 43 |
+# file does not by itself cause the resulting executable to be covered by |
| 44 |
+# the GNU General Public License. This exception does not however |
| 45 |
+# invalidate any other reasons why the executable file might be covered by |
| 46 |
+# the GNU General Public License. |
| 47 |
+ |
| 48 |
+COMPILE_ONLY = -c -MMD |
| 49 |
+PREPROC_ONLY = -E -MMD |
| 50 |
+INCLUDE_KEY = -I |
| 51 |
+DEFINE_KEY = -D |
| 52 |
+OUTPUT_KEY = -o # |
| 53 |
+OUTPUTOBJ_KEY = -o # |
| 54 |
+PIC_KEY = -fPIC |
| 55 |
+WARNING_KEY = -Wall -Werror |
| 56 |
+DYLIB_KEY = -shared |
| 57 |
+LIBDL = |
| 58 |
+ |
| 59 |
+TBB_NOSTRICT = 1 |
| 60 |
+ |
| 61 |
+CPLUS = g++ |
| 62 |
+INCLUDES += -I$(tbb_root)/src/tbb -I$(tbb_root)/include -I$(tbb_root)/src |
| 63 |
+LIB_LINK_FLAGS = -shared |
| 64 |
+LIBS = -lpthread |
| 65 |
+C_FLAGS = $(CPLUS_FLAGS) -x c |
| 66 |
+ |
| 67 |
+ifeq ($(cfg), release) |
| 68 |
+ CPLUS_FLAGS = -DDO_ITT_NOTIFY -O2 -DUSE_PTHREAD |
| 69 |
+endif |
| 70 |
+ifeq ($(cfg), debug) |
| 71 |
+ CPLUS_FLAGS = -DTBB_DO_ASSERT -DDO_ITT_NOTIFY -g -O0 -DUSE_PTHREAD |
| 72 |
+endif |
| 73 |
+ |
| 74 |
+ASM= |
| 75 |
+ASM_FLAGS= |
| 76 |
+ |
| 77 |
+TBB_ASM.OBJ= |
| 78 |
+ |
| 79 |
+ifeq (itanium,$(arch)) |
| 80 |
+# Position-independent code (PIC) is a must for IA-64 |
| 81 |
+ CPLUS_FLAGS += $(PIC_KEY) |
| 82 |
+ $(PIC_KEY) = |
| 83 |
+endif |
| 84 |
+ |
| 85 |
+ifeq (em64t,$(arch)) |
| 86 |
+ CPLUS_FLAGS += -m64 |
| 87 |
+ LIB_LINK_FLAGS += -m64 |
| 88 |
+endif |
| 89 |
+ |
| 90 |
+ifeq (ia32,$(arch)) |
| 91 |
+ CPLUS_FLAGS += -m32 |
| 92 |
+ LIB_LINK_FLAGS += -m32 |
| 93 |
+endif |
| 94 |
+ |
| 95 |
+#------------------------------------------------------------------------------ |
| 96 |
+# Setting assembler data. |
| 97 |
+#------------------------------------------------------------------------------ |
| 98 |
+%.$(OBJ): %.s |
| 99 |
+ cpp $(ASM_FLAGS) <$< | grep -v '^#' >$*.tmp |
| 100 |
+ $(ASM) -o $@ $*.tmp |
| 101 |
+ rm $*.tmp |
| 102 |
+ |
| 103 |
+ASSEMBLY_SOURCE=$(arch)-gas |
| 104 |
+ifeq (itanium,$(arch)) |
| 105 |
+ ASM=ias |
| 106 |
+ TBB_ASM.OBJ = atomic_support.o lock_byte.o log2.o pause.o |
| 107 |
+endif |
| 108 |
+#------------------------------------------------------------------------------ |
| 109 |
+# End of setting assembler data. |
| 110 |
+#------------------------------------------------------------------------------ |
| 111 |
+ |
| 112 |
+#------------------------------------------------------------------------------ |
| 113 |
+# Setting tbbmalloc data. |
| 114 |
+#------------------------------------------------------------------------------ |
| 115 |
+M_INCLUDES = $(INCLUDES) -I$(MALLOC_ROOT) -I$(MALLOC_SOURCE_ROOT) |
| 116 |
+M_CPLUS_FLAGS = $(CPLUS_FLAGS) -fno-rtti -fno-exceptions -fno-schedule-insns2 |
| 117 |
+#------------------------------------------------------------------------------ |
| 118 |
+# End of setting tbbmalloc data. |
| 119 |
+#------------------------------------------------------------------------------ |
| 120 |
diff -r 627751b671bb -r ac2c116b7cee build/freebsd.inc |
| 121 |
--- /dev/null Thu Jan 01 00:00:00 1970 +0000 |
| 122 |
+++ b/build/freebsd.inc Sat Sep 29 16:51:17 2007 -0700 |
| 123 |
@@ -0,0 +1,86 @@ |
| 124 |
+# Copyright 2005-2007 Intel Corporation. All Rights Reserved. |
| 125 |
+# |
| 126 |
+# This file is part of Threading Building Blocks. |
| 127 |
+# |
| 128 |
+# Threading Building Blocks is free software; you can redistribute it |
| 129 |
+# and/or modify it under the terms of the GNU General Public License |
| 130 |
+# version 2 as published by the Free Software Foundation. |
| 131 |
+# |
| 132 |
+# Threading Building Blocks is distributed in the hope that it will be |
| 133 |
+# useful, but WITHOUT ANY WARRANTY; without even the implied warranty |
| 134 |
+# of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 135 |
+# GNU General Public License for more details. |
| 136 |
+# |
| 137 |
+# You should have received a copy of the GNU General Public License |
| 138 |
+# along with Threading Building Blocks; if not, write to the Free Software |
| 139 |
+# Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA |
| 140 |
+# |
| 141 |
+# As a special exception, you may use this file as part of a free software |
| 142 |
+# library without restriction. Specifically, if other files instantiate |
| 143 |
+# templates or use macros or inline functions from this file, or you compile |
| 144 |
+# this file and link it with other files to produce an executable, this |
| 145 |
+# file does not by itself cause the resulting executable to be covered by |
| 146 |
+# the GNU General Public License. This exception does not however |
| 147 |
+# invalidate any other reasons why the executable file might be covered by |
| 148 |
+# the GNU General Public License. |
| 149 |
+ |
| 150 |
+ifndef arch |
| 151 |
+ ifeq ($(shell uname -m),i386) |
| 152 |
+ export arch:=ia32 |
| 153 |
+ endif |
| 154 |
+ ifeq ($(shell uname -m),ia64) |
| 155 |
+ export arch:=itanium |
| 156 |
+ endif |
| 157 |
+ ifeq ($(shell uname -m),amd64) |
| 158 |
+ export arch:=em64t |
| 159 |
+ endif |
| 160 |
+endif |
| 161 |
+ |
| 162 |
+ifndef runtime |
| 163 |
+ gcc_version_full=$(shell gcc --version | grep 'gcc'| egrep -o ' [0-9]+\.[0-9]+\.[0-9]+.*' | sed -e 's/^\ //') |
| 164 |
+ gcc_version=$(shell echo "$(gcc_version_full)" | egrep -o '^[0-9]+\.[0-9]+\.[0-9]+\s*' | head -n 1 | sed -e 's/ *//g') |
| 165 |
+ os_version:=$(shell uname -r) |
| 166 |
+ os_kernel_version:=$(shell uname -r | sed -e 's/-.*$$//') |
| 167 |
+ export runtime:=cc$(os_version) |
| 168 |
+endif |
| 169 |
+ |
| 170 |
+native_compiler := gcc |
| 171 |
+export compiler ?= gcc |
| 172 |
+debugger ?= gdb |
| 173 |
+ |
| 174 |
+CWD=$(shell pwd) |
| 175 |
+RM?=rm -f |
| 176 |
+RD?=rmdir |
| 177 |
+MD?=mkdir -p |
| 178 |
+NUL= > /dev/null 2>&1 |
| 179 |
+SLASH=/ |
| 180 |
+MAKE_VERSIONS=sh $(tbb_root)/build/version_info_linux.sh $(CPLUS) $(CPLUS_FLAGS) $(INCLUDES) >version_string.tmp |
| 181 |
+MAKE_TBBVARS=sh $(tbb_root)/build/generate_tbbvars.sh |
| 182 |
+ |
| 183 |
+ifdef LD_LIBRARY_PATH |
| 184 |
+ export LD_LIBRARY_PATH := .:$(LD_LIBRARY_PATH) |
| 185 |
+else |
| 186 |
+ export LD_LIBRARY_PATH := . |
| 187 |
+endif |
| 188 |
+ |
| 189 |
+####### Build settigns ######################################################## |
| 190 |
+ |
| 191 |
+OBJ = o |
| 192 |
+DLL = so |
| 193 |
+LIBEXT = so |
| 194 |
+ |
| 195 |
+ifeq ($(cfg),debug) |
| 196 |
+ DEBUG_SUFFIX = _debug |
| 197 |
+endif |
| 198 |
+ |
| 199 |
+TBB.DEF = |
| 200 |
+TBB.DLL = libtbb$(DEBUG_SUFFIX).$(DLL) |
| 201 |
+TBB.LIB = $(TBB.DLL) |
| 202 |
+ |
| 203 |
+MALLOC.DLL = libtbbmalloc$(DEBUG_SUFFIX).so |
| 204 |
+MALLOC.LIB = $(MALLOC.DLL) |
| 205 |
+ |
| 206 |
+TBB_NOSTRICT=1 |
| 207 |
+ |
| 208 |
+ |
| 209 |
+ |
| 210 |
diff -r 627751b671bb -r ac2c116b7cee examples/common/gui/convideo.cpp |
| 211 |
--- a/examples/common/gui/convideo.cpp Sat Sep 29 16:18:03 2007 -0700 |
| 212 |
+++ b/examples/common/gui/convideo.cpp Sat Sep 29 16:51:17 2007 -0700 |
| 213 |
@@ -48,7 +48,7 @@ void video::win_load_accelerators(int id |
| 214 |
} |
| 215 |
#endif |
| 216 |
|
| 217 |
-#elif __linux__ || __APPLE__ |
| 218 |
+#elif __linux__ || __APPLE__ || __FreeBSD__ |
| 219 |
|
| 220 |
#include <sched.h> |
| 221 |
#include <sys/time.h> |
| 222 |
diff -r 627751b671bb -r ac2c116b7cee examples/parallel_for/tacheon/src/types.h |
| 223 |
--- a/examples/parallel_for/tacheon/src/types.h Sat Sep 29 16:18:03 2007 -0700 |
| 224 |
+++ b/examples/parallel_for/tacheon/src/types.h Sat Sep 29 16:51:17 2007 -0700 |
| 225 |
@@ -61,6 +61,8 @@ |
| 226 |
#ifdef _WIN32 |
| 227 |
#include <malloc.h> |
| 228 |
#define alloca _alloca |
| 229 |
+#elif __FreeBSD__ |
| 230 |
+#include <stdlib.h> |
| 231 |
#else |
| 232 |
#include <alloca.h> |
| 233 |
#endif |
| 234 |
diff -r 627751b671bb -r ac2c116b7cee examples/parallel_reduce/convex_hull/convex_hull.h |
| 235 |
--- a/examples/parallel_reduce/convex_hull/convex_hull.h Sat Sep 29 16:18:03 2007 -0700 |
| 236 |
+++ b/examples/parallel_reduce/convex_hull/convex_hull.h Sat Sep 29 16:51:17 2007 -0700 |
| 237 |
@@ -133,7 +133,7 @@ namespace util { |
| 238 |
}; |
| 239 |
|
| 240 |
int random(unsigned int& rseed) { |
| 241 |
-#if __linux__ || __APPLE__ |
| 242 |
+#if __linux__ || __APPLE__ || __FreeBSD__ |
| 243 |
return rand_r(&rseed); |
| 244 |
#elif _WIN32 |
| 245 |
return rand(); |
| 246 |
diff -r 627751b671bb -r ac2c116b7cee include/tbb/machine/freebsd_em64t.h |
| 247 |
--- /dev/null Thu Jan 01 00:00:00 1970 +0000 |
| 248 |
+++ b/include/tbb/machine/freebsd_em64t.h Sat Sep 29 16:51:17 2007 -0700 |
| 249 |
@@ -0,0 +1,160 @@ |
| 250 |
+/* |
| 251 |
+ Copyright 2005-2007 Intel Corporation. All Rights Reserved. |
| 252 |
+ |
| 253 |
+ This file is part of Threading Building Blocks. |
| 254 |
+ |
| 255 |
+ Threading Building Blocks is free software; you can redistribute it |
| 256 |
+ and/or modify it under the terms of the GNU General Public License |
| 257 |
+ version 2 as published by the Free Software Foundation. |
| 258 |
+ |
| 259 |
+ Threading Building Blocks is distributed in the hope that it will be |
| 260 |
+ useful, but WITHOUT ANY WARRANTY; without even the implied warranty |
| 261 |
+ of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 262 |
+ GNU General Public License for more details. |
| 263 |
+ |
| 264 |
+ You should have received a copy of the GNU General Public License |
| 265 |
+ along with Threading Building Blocks; if not, write to the Free Software |
| 266 |
+ Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA |
| 267 |
+ |
| 268 |
+ As a special exception, you may use this file as part of a free software |
| 269 |
+ library without restriction. Specifically, if other files instantiate |
| 270 |
+ templates or use macros or inline functions from this file, or you compile |
| 271 |
+ this file and link it with other files to produce an executable, this |
| 272 |
+ file does not by itself cause the resulting executable to be covered by |
| 273 |
+ the GNU General Public License. This exception does not however |
| 274 |
+ invalidate any other reasons why the executable file might be covered by |
| 275 |
+ the GNU General Public License. |
| 276 |
+*/ |
| 277 |
+ |
| 278 |
+#ifndef __TBB_machine_H |
| 279 |
+#error Do not include this file directly; include tbb_machine.h instead |
| 280 |
+#endif |
| 281 |
+ |
| 282 |
+#include <stdint.h> |
| 283 |
+#include <unistd.h> |
| 284 |
+#include <sched.h> |
| 285 |
+ |
| 286 |
+#define __TBB_OFFSET_OF_NEXT -8 |
| 287 |
+#define __TBB_WORDSIZE 8 |
| 288 |
+#define __TBB_BIG_ENDIAN 0 |
| 289 |
+ |
| 290 |
+//! Load with acquire semantics, both for hardware and compiler. |
| 291 |
+template<typename T> |
| 292 |
+inline T __TBB_load_with_acquire_via_explicit_fence(const volatile T& location) { |
| 293 |
+ T tmp = location; |
| 294 |
+ __asm__ __volatile__("": : :"memory"); |
| 295 |
+ return tmp; |
| 296 |
+} |
| 297 |
+ |
| 298 |
+//! Store with release semantics, both for hardware and compiler. |
| 299 |
+template<typename T, typename V> |
| 300 |
+inline void __TBB_store_with_release_via_explicit_fence(volatile T& location, V value) { |
| 301 |
+ __asm__ __volatile__("": : :"memory"); |
| 302 |
+ location = value; |
| 303 |
+} |
| 304 |
+ |
| 305 |
+#define __TBB_load_with_acquire __TBB_load_with_acquire_via_explicit_fence |
| 306 |
+#define __TBB_store_with_release __TBB_store_with_release_via_explicit_fence |
| 307 |
+ |
| 308 |
+#define __MACHINE_DECL_ATOMICS(S,T,X) \ |
| 309 |
+static inline T __TBB_machine_cmpswp##S (volatile void *ptr, T value, T comparand ) \ |
| 310 |
+{ \ |
| 311 |
+ T result; \ |
| 312 |
+ \ |
| 313 |
+ __asm__ __volatile__("lock\ncmpxchg" X " %2,%1" \ |
| 314 |
+ : "=a"(result), "=m"(*(T *)ptr) \ |
| 315 |
+ : "q"(value), "0"(comparand) \ |
| 316 |
+ : "memory"); \ |
| 317 |
+ return result; \ |
| 318 |
+} \ |
| 319 |
+ \ |
| 320 |
+static inline T __TBB_machine_fetchadd##S(volatile void *ptr, T addend) \ |
| 321 |
+{ \ |
| 322 |
+ T result; \ |
| 323 |
+ __asm__ __volatile__("lock\nxadd" X " %0,%1" \ |
| 324 |
+ : "=r"(result),"=m"(*(T *)ptr) \ |
| 325 |
+ : "0"(addend) \ |
| 326 |
+ : "memory"); \ |
| 327 |
+ return result; \ |
| 328 |
+} \ |
| 329 |
+ \ |
| 330 |
+static inline T __TBB_machine_fetchstore##S(volatile void *ptr, T value) \ |
| 331 |
+{ \ |
| 332 |
+ T result; \ |
| 333 |
+ __asm__ __volatile__("lock\nxchg" X " %0,%1" \ |
| 334 |
+ : "=r"(result),"=m"(*(T *)ptr) \ |
| 335 |
+ : "0"(value) \ |
| 336 |
+ : "memory"); \ |
| 337 |
+ return result; \ |
| 338 |
+} \ |
| 339 |
+ |
| 340 |
+__MACHINE_DECL_ATOMICS(1,int8_t,"") |
| 341 |
+__MACHINE_DECL_ATOMICS(2,int16_t,"") |
| 342 |
+__MACHINE_DECL_ATOMICS(4,int32_t,"") |
| 343 |
+__MACHINE_DECL_ATOMICS(8,int64_t,"q") |
| 344 |
+ |
| 345 |
+static inline int64_t __TBB_machine_lg( uint64_t x ) { |
| 346 |
+ int64_t j; |
| 347 |
+ __asm__ ("bsr %1,%0" : "=r"(j) : "r"(x)); |
| 348 |
+ return j; |
| 349 |
+} |
| 350 |
+ |
| 351 |
+static inline void __TBB_machine_or( volatile void *ptr, uint64_t addend ) { |
| 352 |
+ __asm__ __volatile__("lock\norq %1,%0" : "=m"(*(uint64_t *)ptr) : "r"(addend) : "memory"); |
| 353 |
+} |
| 354 |
+ |
| 355 |
+static inline void __TBB_machine_pause( int32_t delay ) { |
| 356 |
+ for (int32_t i = 0; i < delay; i++) { |
| 357 |
+ __asm__ __volatile__("pause;"); |
| 358 |
+ } |
| 359 |
+ return; |
| 360 |
+} |
| 361 |
+ |
| 362 |
+// Machine specific atomic operations |
| 363 |
+ |
| 364 |
+#define __TBB_CompareAndSwap1(P,V,C) __TBB_machine_cmpswp1(P,V,C) |
| 365 |
+#define __TBB_CompareAndSwap2(P,V,C) __TBB_machine_cmpswp2(P,V,C) |
| 366 |
+#define __TBB_CompareAndSwap4(P,V,C) __TBB_machine_cmpswp4(P,V,C) |
| 367 |
+#define __TBB_CompareAndSwap8(P,V,C) __TBB_machine_cmpswp8(P,V,C) |
| 368 |
+#define __TBB_CompareAndSwapW(P,V,C) __TBB_machine_cmpswp8(P,V,C) |
| 369 |
+ |
| 370 |
+#define __TBB_FetchAndAdd1(P,V) __TBB_machine_fetchadd1(P,V) |
| 371 |
+#define __TBB_FetchAndAdd2(P,V) __TBB_machine_fetchadd2(P,V) |
| 372 |
+#define __TBB_FetchAndAdd4(P,V) __TBB_machine_fetchadd4(P,V) |
| 373 |
+#define __TBB_FetchAndAdd8(P,V) __TBB_machine_fetchadd8(P,V) |
| 374 |
+#define __TBB_FetchAndAddW(P,V) __TBB_machine_fetchadd8(P,V) |
| 375 |
+ |
| 376 |
+#define __TBB_FetchAndStore1(P,V) __TBB_machine_fetchstore1(P,V) |
| 377 |
+#define __TBB_FetchAndStore2(P,V) __TBB_machine_fetchstore2(P,V) |
| 378 |
+#define __TBB_FetchAndStore4(P,V) __TBB_machine_fetchstore4(P,V) |
| 379 |
+#define __TBB_FetchAndStore8(P,V) __TBB_machine_fetchstore8(P,V) |
| 380 |
+#define __TBB_FetchAndStoreW(P,V) __TBB_machine_fetchstore8(P,V) |
| 381 |
+ |
| 382 |
+#define __TBB_Store8(P,V) (*P = V) |
| 383 |
+#define __TBB_Load8(P) (*P) |
| 384 |
+ |
| 385 |
+#define __TBB_AtomicOR(P,V) __TBB_machine_or(P,V) |
| 386 |
+ |
| 387 |
+// Definition of other functions |
| 388 |
+#define __TBB_Yield() sched_yield() |
| 389 |
+#define __TBB_Pause(V) __TBB_machine_pause(V) |
| 390 |
+#define __TBB_Log2(V) __TBB_machine_lg(V) |
| 391 |
+ |
| 392 |
+// Special atomic functions |
| 393 |
+#define __TBB_FetchAndAddWrelease(P,V) __TBB_FetchAndAddW(P,V) |
| 394 |
+#define __TBB_FetchAndIncrementWacquire(P) __TBB_FetchAndAddW(P,1) |
| 395 |
+#define __TBB_FetchAndDecrementWrelease(P) __TBB_FetchAndAddW(P,-1) |
| 396 |
+ |
| 397 |
+// Definition of Lock functions |
| 398 |
+#undef __TBB_TryLockByte |
| 399 |
+#undef __TBB_LockByte |
| 400 |
+ |
| 401 |
+#define __TBB_cpuid |
| 402 |
+static inline void __TBB_x86_cpuid( int32_t buffer[4], int32_t mode ) { |
| 403 |
+ // NOTE: gcc sometimes fails to compile the following asm. But icc always succeeds. |
| 404 |
+ __asm__ ("cpuid" : "=a"(buffer[0]), |
| 405 |
+ "=b"(buffer[1]), |
| 406 |
+ "=c"(buffer[2]), |
| 407 |
+ "=d"(buffer[3]) : "0"(mode) : "memory" ); |
| 408 |
+} |
| 409 |
+ |
| 410 |
diff -r 627751b671bb -r ac2c116b7cee include/tbb/machine/freebsd_ia32.h |
| 411 |
--- /dev/null Thu Jan 01 00:00:00 1970 +0000 |
| 412 |
+++ b/include/tbb/machine/freebsd_ia32.h Sat Sep 29 16:51:17 2007 -0700 |
| 413 |
@@ -0,0 +1,225 @@ |
| 414 |
+/* |
| 415 |
+ Copyright 2005-2007 Intel Corporation. All Rights Reserved. |
| 416 |
+ |
| 417 |
+ This file is part of Threading Building Blocks. |
| 418 |
+ |
| 419 |
+ Threading Building Blocks is free software; you can redistribute it |
| 420 |
+ and/or modify it under the terms of the GNU General Public License |
| 421 |
+ version 2 as published by the Free Software Foundation. |
| 422 |
+ |
| 423 |
+ Threading Building Blocks is distributed in the hope that it will be |
| 424 |
+ useful, but WITHOUT ANY WARRANTY; without even the implied warranty |
| 425 |
+ of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 426 |
+ GNU General Public License for more details. |
| 427 |
+ |
| 428 |
+ You should have received a copy of the GNU General Public License |
| 429 |
+ along with Threading Building Blocks; if not, write to the Free Software |
| 430 |
+ Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA |
| 431 |
+ |
| 432 |
+ As a special exception, you may use this file as part of a free software |
| 433 |
+ library without restriction. Specifically, if other files instantiate |
| 434 |
+ templates or use macros or inline functions from this file, or you compile |
| 435 |
+ this file and link it with other files to produce an executable, this |
| 436 |
+ file does not by itself cause the resulting executable to be covered by |
| 437 |
+ the GNU General Public License. This exception does not however |
| 438 |
+ invalidate any other reasons why the executable file might be covered by |
| 439 |
+ the GNU General Public License. |
| 440 |
+*/ |
| 441 |
+ |
| 442 |
+#ifndef __TBB_machine_H |
| 443 |
+#error Do not include this file directly; include tbb_machine.h instead |
| 444 |
+#endif |
| 445 |
+ |
| 446 |
+#include <stdint.h> |
| 447 |
+#include <unistd.h> |
| 448 |
+#include <sched.h> |
| 449 |
+ |
| 450 |
+#define __TBB_OFFSET_OF_NEXT -4 |
| 451 |
+#define __TBB_WORDSIZE 4 |
| 452 |
+#define __TBB_BIG_ENDIAN 0 |
| 453 |
+ |
| 454 |
+ |
| 455 |
+#define __MACHINE_DECL_ATOMICS(S,T,X) \ |
| 456 |
+static inline T __TBB_machine_cmpswp##S (volatile void *ptr, T value, T comparand ) \ |
| 457 |
+{ \ |
| 458 |
+ T result; \ |
| 459 |
+ \ |
| 460 |
+ __asm__ __volatile__("lock\ncmpxchg" X " %2,%1" \ |
| 461 |
+ : "=a"(result), "=m"(*(T *)ptr) \ |
| 462 |
+ : "q"(value), "0"(comparand) \ |
| 463 |
+ : "memory"); \ |
| 464 |
+ return result; \ |
| 465 |
+} \ |
| 466 |
+ \ |
| 467 |
+static inline T __TBB_machine_fetchadd##S(volatile void *ptr, T addend) \ |
| 468 |
+{ \ |
| 469 |
+ T result; \ |
| 470 |
+ __asm__ __volatile__("lock\nxadd" X " %0,%1" \ |
| 471 |
+ : "=r"(result), "=m"(*(T *)ptr) \ |
| 472 |
+ : "0"(addend) \ |
| 473 |
+ : "memory"); \ |
| 474 |
+ return result; \ |
| 475 |
+} \ |
| 476 |
+ \ |
| 477 |
+static inline T __TBB_machine_fetchstore##S(volatile void *ptr, T value) \ |
| 478 |
+{ \ |
| 479 |
+ T result; \ |
| 480 |
+ __asm__ __volatile__("lock\nxchg" X " %0,%1" \ |
| 481 |
+ : "=r"(result), "=m"(*(T *)ptr) \ |
| 482 |
+ : "0"(value) \ |
| 483 |
+ : "memory"); \ |
| 484 |
+ return result; \ |
| 485 |
+} \ |
| 486 |
+ |
| 487 |
+__MACHINE_DECL_ATOMICS(1,int8_t,"") |
| 488 |
+__MACHINE_DECL_ATOMICS(2,int16_t,"") |
| 489 |
+__MACHINE_DECL_ATOMICS(4,int32_t,"l") |
| 490 |
+ |
| 491 |
+static int64_t __TBB_machine_cmpswp8 (volatile void *ptr, int64_t value, int64_t comparand ) |
| 492 |
+{ |
| 493 |
+ const int32_t comparand_lo = (int32_t)comparand; |
| 494 |
+ const int32_t comparand_hi = *(int32_t*)((intptr_t)&comparand+sizeof(int32_t)); |
| 495 |
+ int64_t result; |
| 496 |
+ // EBX register saved for compliancy with position-independent code (PIC) rules on IA32 |
| 497 |
+ __asm__ __volatile__ ( |
| 498 |
+ "pushl %%ebx\n\t" |
| 499 |
+ "movl (%%ecx),%%ebx\n\t" |
| 500 |
+ "movl 4(%%ecx),%%ecx\n\t" |
| 501 |
+ "lock\ncmpxchg8b (%2)\n\t" |
| 502 |
+ "popl %%ebx" |
| 503 |
+ : "=A"(result), "=m"(*(int64_t *)ptr) |
| 504 |
+ : "S"(ptr), |
| 505 |
+ "a"(comparand_lo), |
| 506 |
+ "d"(comparand_hi), |
| 507 |
+ "c"(&value) |
| 508 |
+ : "memory", "esp"); |
| 509 |
+ return result; |
| 510 |
+} |
| 511 |
+ |
| 512 |
+static inline int32_t __TBB_machine_lg( uint32_t x ) { |
| 513 |
+ int32_t j; |
| 514 |
+ __asm__ ("bsr %1,%0" : "=r"(j) : "r"(x)); |
| 515 |
+ return j; |
| 516 |
+} |
| 517 |
+ |
| 518 |
+static inline void __TBB_machine_or( volatile void *ptr, uint32_t addend ) { |
| 519 |
+ __asm__ __volatile__("lock\norl %1,%0" : "=m"(*(uint32_t *)ptr) : "r"(addend) : "memory"); |
| 520 |
+} |
| 521 |
+ |
| 522 |
+static inline void __TBB_machine_pause( int32_t delay ) { |
| 523 |
+ for (int32_t i = 0; i < delay; i++) { |
| 524 |
+ __asm__ __volatile__("pause;"); |
| 525 |
+ } |
| 526 |
+ return; |
| 527 |
+} |
| 528 |
+ |
| 529 |
+static inline int64_t __TBB_machine_load8 (const volatile void *ptr) { |
| 530 |
+ int64_t result; |
| 531 |
+ __asm__ __volatile__ ( "fildq %1\n\t" |
| 532 |
+ "fistpq %0" : "=m"(result) : "m"(*(uint64_t *)ptr), "m"(result) : "memory" ); |
| 533 |
+ return result; |
| 534 |
+} |
| 535 |
+ |
| 536 |
+static inline void __TBB_machine_store8 (volatile void *ptr, int64_t value) { |
| 537 |
+ __asm__ __volatile__ ( "fildq %1\n\t" |
| 538 |
+ "fistpq (%2)" : "=m"(*(int64_t *)ptr) : "m"(value), "r"(ptr) : "memory" ); |
| 539 |
+} |
| 540 |
+ |
| 541 |
+template <typename T, size_t S> |
| 542 |
+struct __TBB_machine_load_store { |
| 543 |
+ static inline T load_with_acquire(const volatile T& location) { |
| 544 |
+ T to_return = location; |
| 545 |
+ __asm__ __volatile__("" : : : "memory" ); // Compiler fence to keep operations from migrating upwards |
| 546 |
+ return to_return; |
| 547 |
+ } |
| 548 |
+ |
| 549 |
+ static inline void store_with_release(volatile T &location, T value) { |
| 550 |
+ __asm__ __volatile__("" : : : "memory" ); // Compiler fence to keep operations from migrating upwards |
| 551 |
+ location = value; |
| 552 |
+ } |
| 553 |
+}; |
| 554 |
+ |
| 555 |
+template <typename T> |
| 556 |
+struct __TBB_machine_load_store<T,8> { |
| 557 |
+ static inline T load_with_acquire(const volatile T& location) { |
| 558 |
+ T to_return = __TBB_machine_load8((volatile void *)&location); |
| 559 |
+ __asm__ __volatile__("" : : : "memory" ); // Compiler fence to keep operations from migrating upwards |
| 560 |
+ return to_return; |
| 561 |
+ } |
| 562 |
+ |
| 563 |
+ static inline void store_with_release(volatile T &location, T value) { |
| 564 |
+ __asm__ __volatile__("" : : : "memory" ); // Compiler fence to keep operations from migrating downwards |
| 565 |
+ __TBB_machine_store8((volatile void *)&location,(int64_t)value); |
| 566 |
+ } |
| 567 |
+}; |
| 568 |
+ |
| 569 |
+template<typename T> |
| 570 |
+inline T __TBB_machine_load_with_acquire(const volatile T &location) { |
| 571 |
+ return __TBB_machine_load_store<T,sizeof(T)>::load_with_acquire(location); |
| 572 |
+} |
| 573 |
+ |
| 574 |
+template<typename T, typename V> |
| 575 |
+inline void __TBB_machine_store_with_release(volatile T &location, V value) { |
| 576 |
+ __TBB_machine_load_store<T,sizeof(T)>::store_with_release(location,value); |
| 577 |
+} |
| 578 |
+ |
| 579 |
+#define __TBB_load_with_acquire(L) __TBB_machine_load_with_acquire((L)) |
| 580 |
+#define __TBB_store_with_release(L,V) __TBB_machine_store_with_release((L),(V)) |
| 581 |
+ |
| 582 |
+// Machine specific atomic operations |
| 583 |
+ |
| 584 |
+#define __TBB_CompareAndSwap1(P,V,C) __TBB_machine_cmpswp1(P,V,C) |
| 585 |
+#define __TBB_CompareAndSwap2(P,V,C) __TBB_machine_cmpswp2(P,V,C) |
| 586 |
+#define __TBB_CompareAndSwap4(P,V,C) __TBB_machine_cmpswp4(P,V,C) |
| 587 |
+#define __TBB_CompareAndSwap8(P,V,C) __TBB_machine_cmpswp8(P,V,C) |
| 588 |
+#define __TBB_CompareAndSwapW(P,V,C) __TBB_machine_cmpswp4(P,V,C) |
| 589 |
+ |
| 590 |
+#define __TBB_FetchAndAdd1(P,V) __TBB_machine_fetchadd1(P,V) |
| 591 |
+#define __TBB_FetchAndAdd2(P,V) __TBB_machine_fetchadd2(P,V) |
| 592 |
+#define __TBB_FetchAndAdd4(P,V) __TBB_machine_fetchadd4(P,V) |
| 593 |
+#define __TBB_FetchAndAddW(P,V) __TBB_machine_fetchadd4(P,V) |
| 594 |
+ |
| 595 |
+#define __TBB_FetchAndStore1(P,V) __TBB_machine_fetchstore1(P,V) |
| 596 |
+#define __TBB_FetchAndStore2(P,V) __TBB_machine_fetchstore2(P,V) |
| 597 |
+#define __TBB_FetchAndStore4(P,V) __TBB_machine_fetchstore4(P,V) |
| 598 |
+#define __TBB_FetchAndStoreW(P,V) __TBB_machine_fetchstore4(P,V) |
| 599 |
+ |
| 600 |
+#define __TBB_Store8(P,V) __TBB_machine_store8(P,V) |
| 601 |
+#define __TBB_Load8(P) __TBB_machine_load8(P) |
| 602 |
+ |
| 603 |
+#define __TBB_AtomicOR(P,V) __TBB_machine_or(P,V) |
| 604 |
+ |
| 605 |
+ |
| 606 |
+// Those we chose not to implement (they will be implemented generically using CMPSWP8) |
| 607 |
+#undef __TBB_FetchAndAdd8 |
| 608 |
+#undef __TBB_FetchAndStore8 |
| 609 |
+ |
| 610 |
+// Definition of other functions |
| 611 |
+#define __TBB_Yield() sched_yield() |
| 612 |
+#define __TBB_Pause(V) __TBB_machine_pause(V) |
| 613 |
+#define __TBB_Log2(V) __TBB_machine_lg(V) |
| 614 |
+ |
| 615 |
+// Special atomic functions |
| 616 |
+#define __TBB_FetchAndAddWrelease(P,V) __TBB_FetchAndAddW(P,V) |
| 617 |
+#define __TBB_FetchAndIncrementWacquire(P) __TBB_FetchAndAddW(P,1) |
| 618 |
+#define __TBB_FetchAndDecrementWrelease(P) __TBB_FetchAndAddW(P,-1) |
| 619 |
+ |
| 620 |
+// Definition of Lock functions |
| 621 |
+#undef __TBB_TryLockByte |
| 622 |
+#undef __TBB_LockByte |
| 623 |
+ |
| 624 |
+#define __TBB_cpuid |
| 625 |
+static inline void __TBB_x86_cpuid( int32_t buffer[4], int32_t mode ) { |
| 626 |
+ // EBX register saved for compliancy with position-independent code (PIC) rules on IA32 |
| 627 |
+ __asm__ ("pushl %%ebx\n\t" |
| 628 |
+ "cpuid\n\t" |
| 629 |
+ "movl %%ebx,%1\n\t" |
| 630 |
+ "popl %%ebx" |
| 631 |
+ : "=a"(buffer[0]), |
| 632 |
+ "=S"(buffer[1]), |
| 633 |
+ "=c"(buffer[2]), |
| 634 |
+ "=d"(buffer[3]) |
| 635 |
+ : "0"(mode) |
| 636 |
+ : "memory" ); |
| 637 |
+} |
| 638 |
+ |
| 639 |
diff -r 627751b671bb -r ac2c116b7cee include/tbb/machine/freebsd_itanium.h |
| 640 |
--- /dev/null Thu Jan 01 00:00:00 1970 +0000 |
| 641 |
+++ b/include/tbb/machine/freebsd_itanium.h Sat Sep 29 16:51:17 2007 -0700 |
| 642 |
@@ -0,0 +1,179 @@ |
| 643 |
+/* |
| 644 |
+ Copyright 2005-2007 Intel Corporation. All Rights Reserved. |
| 645 |
+ |
| 646 |
+ This file is part of Threading Building Blocks. |
| 647 |
+ |
| 648 |
+ Threading Building Blocks is free software; you can redistribute it |
| 649 |
+ and/or modify it under the terms of the GNU General Public License |
| 650 |
+ version 2 as published by the Free Software Foundation. |
| 651 |
+ |
| 652 |
+ Threading Building Blocks is distributed in the hope that it will be |
| 653 |
+ useful, but WITHOUT ANY WARRANTY; without even the implied warranty |
| 654 |
+ of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 655 |
+ GNU General Public License for more details. |
| 656 |
+ |
| 657 |
+ You should have received a copy of the GNU General Public License |
| 658 |
+ along with Threading Building Blocks; if not, write to the Free Software |
| 659 |
+ Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA |
| 660 |
+ |
| 661 |
+ As a special exception, you may use this file as part of a free software |
| 662 |
+ library without restriction. Specifically, if other files instantiate |
| 663 |
+ templates or use macros or inline functions from this file, or you compile |
| 664 |
+ this file and link it with other files to produce an executable, this |
| 665 |
+ file does not by itself cause the resulting executable to be covered by |
| 666 |
+ the GNU General Public License. This exception does not however |
| 667 |
+ invalidate any other reasons why the executable file might be covered by |
| 668 |
+ the GNU General Public License. |
| 669 |
+*/ |
| 670 |
+ |
| 671 |
+#ifndef __TBB_machine_H |
| 672 |
+#error Do not include this file directly; include tbb_machine.h instead |
| 673 |
+#endif |
| 674 |
+ |
| 675 |
+#include <stdint.h> |
| 676 |
+#include <unistd.h> |
| 677 |
+#include <sched.h> |
| 678 |
+#include <ia64intrin.h> |
| 679 |
+ |
| 680 |
+#define __TBB_OFFSET_OF_NEXT -8 |
| 681 |
+#define __TBB_WORDSIZE 8 |
| 682 |
+#define __TBB_BIG_ENDIAN 0 |
| 683 |
+#define __TBB_DECL_FENCED_ATOMICS 1 |
| 684 |
+ |
| 685 |
+// Most of the functions will be in a .s file |
| 686 |
+ |
| 687 |
+extern "C" { |
| 688 |
+ int8_t __TBB_machine_cmpswp1__TBB_full_fence (volatile void *ptr, int8_t value, int8_t comparand); |
| 689 |
+ int8_t __TBB_machine_fetchadd1__TBB_full_fence (volatile void *ptr, int8_t addend); |
| 690 |
+ int8_t __TBB_machine_fetchadd1acquire(volatile void *ptr, int8_t addend); |
| 691 |
+ int8_t __TBB_machine_fetchadd1release(volatile void *ptr, int8_t addend); |
| 692 |
+ int8_t __TBB_machine_fetchstore1acquire(volatile void *ptr, int8_t value); |
| 693 |
+ int8_t __TBB_machine_fetchstore1release(volatile void *ptr, int8_t value); |
| 694 |
+ |
| 695 |
+ int16_t __TBB_machine_cmpswp2__TBB_full_fence (volatile void *ptr, int16_t value, int16_t comparand); |
| 696 |
+ int16_t __TBB_machine_fetchadd2__TBB_full_fence (volatile void *ptr, int16_t addend); |
| 697 |
+ int16_t __TBB_machine_fetchadd2acquire(volatile void *ptr, int16_t addend); |
| 698 |
+ int16_t __TBB_machine_fetchadd2release(volatile void *ptr, int16_t addend); |
| 699 |
+ int16_t __TBB_machine_fetchstore2acquire(volatile void *ptr, int16_t value); |
| 700 |
+ int16_t __TBB_machine_fetchstore2release(volatile void *ptr, int16_t value); |
| 701 |
+ |
| 702 |
+ int32_t __TBB_machine_fetchstore4__TBB_full_fence (volatile void *ptr, int32_t value); |
| 703 |
+ int32_t __TBB_machine_fetchstore4acquire(volatile void *ptr, int32_t value); |
| 704 |
+ int32_t __TBB_machine_fetchstore4release(volatile void *ptr, int32_t value); |
| 705 |
+ int32_t __TBB_machine_fetchadd4acquire(volatile void *ptr, int32_t addend); |
| 706 |
+ int32_t __TBB_machine_fetchadd4release(volatile void *ptr, int32_t addend); |
| 707 |
+ |
| 708 |
+ int64_t __TBB_machine_cmpswp8__TBB_full_fence (volatile void *ptr, int64_t value, int64_t comparand); |
| 709 |
+ int64_t __TBB_machine_fetchstore8__TBB_full_fence (volatile void *ptr, int64_t value); |
| 710 |
+ int64_t __TBB_machine_fetchstore8acquire(volatile void *ptr, int64_t value); |
| 711 |
+ int64_t __TBB_machine_fetchstore8release(volatile void *ptr, int64_t value); |
| 712 |
+ int64_t __TBB_machine_fetchadd8acquire(volatile void *ptr, int64_t addend); |
| 713 |
+ int64_t __TBB_machine_fetchadd8release(volatile void *ptr, int64_t addend); |
| 714 |
+ |
| 715 |
+ int8_t __TBB_machine_cmpswp1acquire(volatile void *ptr, int8_t value, int8_t comparand); |
| 716 |
+ int8_t __TBB_machine_cmpswp1release(volatile void *ptr, int8_t value, int8_t comparand); |
| 717 |
+ int8_t __TBB_machine_fetchstore1__TBB_full_fence (volatile void *ptr, int8_t value); |
| 718 |
+ |
| 719 |
+ int16_t __TBB_machine_cmpswp2acquire(volatile void *ptr, int16_t value, int16_t comparand); |
| 720 |
+ int16_t __TBB_machine_cmpswp2release(volatile void *ptr, int16_t value, int16_t comparand); |
| 721 |
+ int16_t __TBB_machine_fetchstore2__TBB_full_fence (volatile void *ptr, int16_t value); |
| 722 |
+ |
| 723 |
+ int32_t __TBB_machine_cmpswp4__TBB_full_fence (volatile void *ptr, int32_t value, int32_t comparand); |
| 724 |
+ int32_t __TBB_machine_cmpswp4acquire(volatile void *ptr, int32_t value, int32_t comparand); |
| 725 |
+ int32_t __TBB_machine_cmpswp4release(volatile void *ptr, int32_t value, int32_t comparand); |
| 726 |
+ int32_t __TBB_machine_fetchadd4__TBB_full_fence (volatile void *ptr, int32_t value); |
| 727 |
+ |
| 728 |
+ int64_t __TBB_machine_cmpswp8acquire(volatile void *ptr, int64_t value, int64_t comparand); |
| 729 |
+ int64_t __TBB_machine_cmpswp8release(volatile void *ptr, int64_t value, int64_t comparand); |
| 730 |
+ int64_t __TBB_machine_fetchadd8__TBB_full_fence (volatile void *ptr, int64_t value); |
| 731 |
+ |
| 732 |
+ int64_t __TBB_machine_lg(uint64_t value); |
| 733 |
+ void __TBB_machine_pause(int32_t delay); |
| 734 |
+ bool __TBB_machine_trylockbyte( volatile unsigned char &ptr ); |
| 735 |
+} |
| 736 |
+ |
| 737 |
+#define __TBB_CompareAndSwap1(P,V,C) __TBB_machine_cmpswp1__TBB_full_fence(P,V,C) |
| 738 |
+#define __TBB_CompareAndSwap2(P,V,C) __TBB_machine_cmpswp2__TBB_full_fence(P,V,C) |
| 739 |
+ |
| 740 |
+#define __TBB_FetchAndAdd1(P,V) __TBB_machine_fetchadd1__TBB_full_fence(P,V) |
| 741 |
+#define __TBB_FetchAndAdd1acquire(P,V) __TBB_machine_fetchadd1acquire(P,V) |
| 742 |
+#define __TBB_FetchAndAdd1release(P,V) __TBB_machine_fetchadd1release(P,V) |
| 743 |
+#define __TBB_FetchAndAdd2(P,V) __TBB_machine_fetchadd2__TBB_full_fence(P,V) |
| 744 |
+#define __TBB_FetchAndAdd2acquire(P,V) __TBB_machine_fetchadd2acquire(P,V) |
| 745 |
+#define __TBB_FetchAndAdd2release(P,V) __TBB_machine_fetchadd2release(P,V) |
| 746 |
+#define __TBB_FetchAndAdd4acquire(P,V) __TBB_machine_fetchadd4acquire(P,V) |
| 747 |
+#define __TBB_FetchAndAdd4release(P,V) __TBB_machine_fetchadd4release(P,V) |
| 748 |
+#define __TBB_FetchAndAdd8acquire(P,V) __TBB_machine_fetchadd8acquire(P,V) |
| 749 |
+#define __TBB_FetchAndAdd8release(P,V) __TBB_machine_fetchadd8release(P,V) |
| 750 |
+ |
| 751 |
+#define __TBB_FetchAndStore1acquire(P,V) __TBB_machine_fetchstore1acquire(P,V) |
| 752 |
+#define __TBB_FetchAndStore1release(P,V) __TBB_machine_fetchstore1release(P,V) |
| 753 |
+#define __TBB_FetchAndStore2acquire(P,V) __TBB_machine_fetchstore2acquire(P,V) |
| 754 |
+#define __TBB_FetchAndStore2release(P,V) __TBB_machine_fetchstore2release(P,V) |
| 755 |
+#define __TBB_FetchAndStore4acquire(P,V) __TBB_machine_fetchstore4acquire(P,V) |
| 756 |
+#define __TBB_FetchAndStore4release(P,V) __TBB_machine_fetchstore4release(P,V) |
| 757 |
+#define __TBB_FetchAndStore8acquire(P,V) __TBB_machine_fetchstore8acquire(P,V) |
| 758 |
+#define __TBB_FetchAndStore8release(P,V) __TBB_machine_fetchstore8release(P,V) |
| 759 |
+ |
| 760 |
+#define __TBB_CompareAndSwap1acquire(P,V,C) __TBB_machine_cmpswp1acquire(P,V,C) |
| 761 |
+#define __TBB_CompareAndSwap1release(P,V,C) __TBB_machine_cmpswp1release(P,V,C) |
| 762 |
+#define __TBB_CompareAndSwap2acquire(P,V,C) __TBB_machine_cmpswp2acquire(P,V,C) |
| 763 |
+#define __TBB_CompareAndSwap2release(P,V,C) __TBB_machine_cmpswp2release(P,V,C) |
| 764 |
+#define __TBB_CompareAndSwap4(P,V,C) __TBB_machine_cmpswp4__TBB_full_fence(P,V,C) |
| 765 |
+#define __TBB_CompareAndSwap4acquire(P,V,C) __TBB_machine_cmpswp4acquire(P,V,C) |
| 766 |
+#define __TBB_CompareAndSwap4release(P,V,C) __TBB_machine_cmpswp4release(P,V,C) |
| 767 |
+#define __TBB_CompareAndSwap8(P,V,C) __TBB_machine_cmpswp8__TBB_full_fence(P,V,C) |
| 768 |
+#define __TBB_CompareAndSwap8acquire(P,V,C) __TBB_machine_cmpswp8acquire(P,V,C) |
| 769 |
+#define __TBB_CompareAndSwap8release(P,V,C) __TBB_machine_cmpswp8release(P,V,C) |
| 770 |
+ |
| 771 |
+#define __TBB_FetchAndAdd4(P,V) __TBB_machine_fetchadd4__TBB_full_fence(P,V) |
| 772 |
+#define __TBB_FetchAndAdd8(P,V) __TBB_machine_fetchadd8__TBB_full_fence(P,V) |
| 773 |
+ |
| 774 |
+#define __TBB_FetchAndStore1(P,V) __TBB_machine_fetchstore1__TBB_full_fence(P,V) |
| 775 |
+#define __TBB_FetchAndStore2(P,V) __TBB_machine_fetchstore2__TBB_full_fence(P,V) |
| 776 |
+#define __TBB_FetchAndStore4(P,V) __TBB_machine_fetchstore4__TBB_full_fence(P,V) |
| 777 |
+#define __TBB_FetchAndStore8(P,V) __TBB_machine_fetchstore8__TBB_full_fence(P,V) |
| 778 |
+ |
| 779 |
+#define __TBB_FetchAndIncrementWacquire(P) __TBB_FetchAndAdd8acquire(P,1) |
| 780 |
+#define __TBB_FetchAndDecrementWrelease(P) __TBB_FetchAndAdd8release(P,-1) |
| 781 |
+ |
| 782 |
+#ifndef __INTEL_COMPILER |
| 783 |
+template<typename T, typename V> |
| 784 |
+inline void __TBB_store_with_release_via_explicit_fence(volatile T& location, V value) { |
| 785 |
+ __asm__ __volatile__("": : :"memory"); |
| 786 |
+ location = value; |
| 787 |
+} |
| 788 |
+ |
| 789 |
+//! Load with acquire semantics, both for hardware and compiler. |
| 790 |
+/** Even though GCC imbues volatile loads with acquire semantics, |
| 791 |
+ it sometimes hoists loads over the acquire fence. We use |
| 792 |
+ an explicit memory fence to prevent such incorrect hoisting. */ |
| 793 |
+template<typename T> |
| 794 |
+inline T __TBB_load_with_acquire_via_explicit_fence(const volatile T& location) { |
| 795 |
+ T tmp = location; |
| 796 |
+ __asm__ __volatile__("": : :"memory"); |
| 797 |
+ return tmp; |
| 798 |
+} |
| 799 |
+#define __TBB_load_with_acquire(L) __TBB_load_with_acquire_via_explicit_fence(L) |
| 800 |
+#define __TBB_store_with_release(L,V) __TBB_store_with_release_via_explicit_fence(L,V) |
| 801 |
+#endif |
| 802 |
+ |
| 803 |
+// Special atomic functions |
| 804 |
+#define __TBB_CompareAndSwapW(P,V,C) __TBB_CompareAndSwap8(P,V,C) |
| 805 |
+#define __TBB_FetchAndStoreW(P,V) __TBB_FetchAndStore8(P,V) |
| 806 |
+#define __TBB_FetchAndAddW(P,V) __TBB_FetchAndAdd8(P,V) |
| 807 |
+#define __TBB_FetchAndAddWrelease(P,V) __TBB_FetchAndAdd8release(P,V) |
| 808 |
+ |
| 809 |
+// Not needed |
| 810 |
+#undef __TBB_Store8 |
| 811 |
+#undef __TBB_Load8 |
| 812 |
+ |
| 813 |
+// Definition of Lock functions |
| 814 |
+#define __TBB_TryLockByte(P) __TBB_machine_trylockbyte(P) |
| 815 |
+#undef __TBB_LockByte |
| 816 |
+ |
| 817 |
+// Definition of other utility functions |
| 818 |
+#define __TBB_Yield() sched_yield() |
| 819 |
+#define __TBB_Pause(V) __TBB_machine_pause(V) |
| 820 |
+#define __TBB_Log2(V) __TBB_machine_lg(V) |
| 821 |
+ |
| 822 |
diff -r 627751b671bb -r ac2c116b7cee include/tbb/tbb_machine.h |
| 823 |
--- a/include/tbb/tbb_machine.h Sat Sep 29 16:18:03 2007 -0700 |
| 824 |
+++ b/include/tbb/tbb_machine.h Sat Sep 29 16:51:17 2007 -0700 |
| 825 |
@@ -65,6 +65,16 @@ typedef unsigned __int64 uint64_t; |
| 826 |
#include "tbb/machine/linux_em64t.h" |
| 827 |
#elif __ia64__ |
| 828 |
#include "tbb/machine/linux_itanium.h" |
| 829 |
+#endif |
| 830 |
+ |
| 831 |
+#elif __FreeBSD__ |
| 832 |
+ |
| 833 |
+#if __i386__ |
| 834 |
+#include "tbb/machine/freebsd_ia32.h" |
| 835 |
+#elif __x86_64__ |
| 836 |
+#include "tbb/machine/freebsd_em64t.h" |
| 837 |
+#elif __ia64__ |
| 838 |
+#include "tbb/machine/freebsd_itanium.h" |
| 839 |
#endif |
| 840 |
|
| 841 |
#elif __APPLE__ |
| 842 |
diff -r 627751b671bb -r ac2c116b7cee src/tbb/cache_aligned_allocator.cpp |
| 843 |
--- a/src/tbb/cache_aligned_allocator.cpp Sat Sep 29 16:18:03 2007 -0700 |
| 844 |
+++ b/src/tbb/cache_aligned_allocator.cpp Sat Sep 29 16:51:17 2007 -0700 |
| 845 |
@@ -69,7 +69,7 @@ static const DynamicLinkDescriptor Mallo |
| 846 |
#define MALLOCLIB_NAME "tbbmalloc" DEBUG_SUFFIX ".dll" |
| 847 |
#elif __APPLE__ |
| 848 |
#define MALLOCLIB_NAME "libtbbmalloc" DEBUG_SUFFIX ".dylib" |
| 849 |
-#elif __linux__ |
| 850 |
+#elif __linux__ || __FreeBSD__ |
| 851 |
#define MALLOCLIB_NAME "libtbbmalloc" DEBUG_SUFFIX ".so" |
| 852 |
#else |
| 853 |
#error Unknown OS |
| 854 |
diff -r 627751b671bb -r ac2c116b7cee src/tbb/itt_notify.cpp |
| 855 |
--- a/src/tbb/itt_notify.cpp Sat Sep 29 16:18:03 2007 -0700 |
| 856 |
+++ b/src/tbb/itt_notify.cpp Sat Sep 29 16:51:17 2007 -0700 |
| 857 |
@@ -70,7 +70,7 @@ static const DynamicLinkDescriptor ITT_H |
| 858 |
// LIBITTNOTIFY_NAME is the name of the ITT notification library |
| 859 |
# if _WIN32||_WIN64 |
| 860 |
# define LIBITTNOTIFY_NAME "libittnotify.dll" |
| 861 |
-# elif __linux__ |
| 862 |
+# elif __linux__ || __FreeBSD__ |
| 863 |
# define LIBITTNOTIFY_NAME "libittnotify.so" |
| 864 |
# elif __APPLE__ |
| 865 |
# define LIBITTNOTIFY_NAME "libittnotify.dylib" |
| 866 |
diff -r 627751b671bb -r ac2c116b7cee src/tbb/tbb_misc.h |
| 867 |
--- a/src/tbb/tbb_misc.h Sat Sep 29 16:18:03 2007 -0700 |
| 868 |
+++ b/src/tbb/tbb_misc.h Sat Sep 29 16:51:17 2007 -0700 |
| 869 |
@@ -32,11 +32,8 @@ |
| 870 |
#include "tbb/tbb_stddef.h" |
| 871 |
#include "tbb/tbb_machine.h" |
| 872 |
|
| 873 |
-#if __linux__ |
| 874 |
-#include <sys/sysinfo.h> |
| 875 |
-#elif __APPLE__ |
| 876 |
-#include <sys/types.h> |
| 877 |
-#include <sys/sysctl.h> |
| 878 |
+#if defined(__linux__) || defined(__APPLE__) || defined(__FreeBSD__) |
| 879 |
+#include <unistd.h> |
| 880 |
#endif |
| 881 |
|
| 882 |
namespace tbb { |
| 883 |
@@ -59,24 +56,11 @@ static inline int DetectNumberOfWorkers( |
| 884 |
return number_of_workers; |
| 885 |
} |
| 886 |
|
| 887 |
-#elif __linux__ |
| 888 |
+#elif defined(__linux__) || defined(__APPLE__) || defined(__FreeBSD__) |
| 889 |
|
| 890 |
static inline int DetectNumberOfWorkers( void ) { |
| 891 |
if (!number_of_workers) { |
| 892 |
- number_of_workers = get_nprocs(); |
| 893 |
- } |
| 894 |
- return number_of_workers; |
| 895 |
-} |
| 896 |
- |
| 897 |
-#elif __APPLE__ |
| 898 |
- |
| 899 |
-static inline int DetectNumberOfWorkers( void ) { |
| 900 |
- if (!number_of_workers) { |
| 901 |
- int name[2] = {CTL_HW, HW_AVAILCPU}; |
| 902 |
- int ncpu; |
| 903 |
- size_t size = sizeof(ncpu); |
| 904 |
- sysctl( name, 2, &ncpu, &size, NULL, 0 ); |
| 905 |
- number_of_workers = ncpu; |
| 906 |
+ number_of_workers = sysconf(_SC_NPROCESSORS_ONLN); |
| 907 |
} |
| 908 |
return number_of_workers; |
| 909 |
} |
| 910 |
diff -r 627751b671bb -r ac2c116b7cee src/tbbmalloc/MemoryAllocator.cpp |
| 911 |
--- a/src/tbbmalloc/MemoryAllocator.cpp Sat Sep 29 16:18:03 2007 -0700 |
| 912 |
+++ b/src/tbbmalloc/MemoryAllocator.cpp Sat Sep 29 16:51:17 2007 -0700 |
| 913 |
@@ -324,7 +324,7 @@ static inline unsigned int highestBitPos |
| 914 |
unsigned int pos; |
| 915 |
#if __ARCH_x86_32||__ARCH_x86_64 |
| 916 |
|
| 917 |
-# if __linux__||__APPLE__ |
| 918 |
+# if __linux__||__APPLE__ || __FreeBSD__ |
| 919 |
__asm__ ("bsr %1,%0" : "=r"(pos) : "r"(number)); |
| 920 |
# elif (_WIN32 && (!_WIN64 || __INTEL_COMPILER)) |
| 921 |
__asm |
| 922 |
diff -r 627751b671bb -r ac2c116b7cee src/test/harness.h |
| 923 |
--- a/src/test/harness.h Sat Sep 29 16:18:03 2007 -0700 |
| 924 |
+++ b/src/test/harness.h Sat Sep 29 16:51:17 2007 -0700 |
| 925 |
@@ -38,7 +38,7 @@ |
| 926 |
#include "tbb/tbb_stddef.h" |
| 927 |
#include "harness_assert.h" |
| 928 |
|
| 929 |
-#if __linux__||__APPLE__ |
| 930 |
+#if __linux__||__APPLE__ || __FreeBSD__ |
| 931 |
#include <pthread.h> |
| 932 |
#elif _WIN32||WIN64 |
| 933 |
#include <windows.h> |
| 934 |
@@ -120,7 +120,7 @@ public: |
| 935 |
|
| 936 |
//! Start task |
| 937 |
void start() { |
| 938 |
-#if __linux__||__APPLE__ |
| 939 |
+#if __linux__||__APPLE__ || __FreeBSD__ |
| 940 |
int status = pthread_create(&thread_id, NULL, thread_function, this); |
| 941 |
ASSERT(0==status, "NativeParallelFor: pthread_create failed"); |
| 942 |
#else |
| 943 |
@@ -132,7 +132,7 @@ public: |
| 944 |
|
| 945 |
//! Wait for task to finish |
| 946 |
void wait_to_finish() { |
| 947 |
-#if __linux__||__APPLE__ |
| 948 |
+#if __linux__||__APPLE__ || __FreeBSD__ |
| 949 |
int status = pthread_join( thread_id, NULL ); |
| 950 |
ASSERT( !status, "pthread_join failed" ); |
| 951 |
#else |
| 952 |
@@ -148,7 +148,7 @@ public: |
| 953 |
Top-level caller should let index default to 0. */ |
| 954 |
static size_t build_task_array( const Range& range, const Body& body, NativeParalleForTask* array, size_t index ); |
| 955 |
private: |
| 956 |
-#if __linux__||__APPLE__ |
| 957 |
+#if __linux__||__APPLE__ || __FreeBSD__ |
| 958 |
pthread_t thread_id; |
| 959 |
#else |
| 960 |
HANDLE thread_handle; |
| 961 |
@@ -160,7 +160,7 @@ private: |
| 962 |
//! Body to invoke over the range. |
| 963 |
const Body body; |
| 964 |
|
| 965 |
-#if __linux__||__APPLE__ |
| 966 |
+#if __linux__||__APPLE__ || __FreeBSD__ |
| 967 |
static void* thread_function(void* object) |
| 968 |
#else |
| 969 |
static unsigned __stdcall thread_function( void* object ) |
| 970 |
--- a/src/test/test_concurrent_hash_map.cpp Sat Sep 29 16:51:17 2007 -0700 |
| 971 |
+++ b/src/test/test_concurrent_hash_map.cpp Sat Sep 29 17:08:18 2007 -0700 |
| 972 |
@@ -320,7 +320,7 @@ public: |
| 973 |
// more logical threads than physical threads, and should yield in |
| 974 |
// order to let suspended logical threads make progress. |
| 975 |
j = 0; |
| 976 |
-#if __linux__||__APPLE__ |
| 977 |
+#if __linux__ || __APPLE__ || __FreeBSD__ |
| 978 |
sched_yield(); |
| 979 |
#else |
| 980 |
Sleep(0); |