# This is a shell archive.  Save it in a file, remove anything before
# this line, and then unpack it by entering "sh file".  Note, it may
# create directories; files and directories will be owned by you and
# have default permissions.
#
# This archive contains:
#
#	psptoolchain-gcc
#	psptoolchain-gcc/pkg-descr
#	psptoolchain-gcc/files
#	psptoolchain-gcc/files/patch-gcc-config-mips-mips.c
#	psptoolchain-gcc/files/patch-gcc-config-mips-mips.md
#	psptoolchain-gcc/files/patch-gcc-config.gcc
#	psptoolchain-gcc/files/patch-gcc-version.c
#	psptoolchain-gcc/files/patch-config.sub
#	psptoolchain-gcc/files/patch-gcc-c-incpath.c
#	psptoolchain-gcc/files/patch-gcc-config-mips-allegrex.md
#	psptoolchain-gcc/files/patch-gcc-config-mips-mips.h
#	psptoolchain-gcc/files/patch-gcc-config-mips-psp.h
#	psptoolchain-gcc/files/patch-gcc-config-mips-t-allegrex
#	psptoolchain-gcc/Makefile
#	psptoolchain-gcc/distinfo
#	psptoolchain-gcc/pkg-plist
#
echo c - psptoolchain-gcc
mkdir -p psptoolchain-gcc > /dev/null 2>&1
echo x - psptoolchain-gcc/pkg-descr
sed 's/^X//' >psptoolchain-gcc/pkg-descr << 'END-of-psptoolchain-gcc/pkg-descr'
XThe PlayStation Portable Toolchain is a collection of tools and utilities
Xfor homebrew PSP development.
X
XWWW: http://www.ps2dev.org
END-of-psptoolchain-gcc/pkg-descr
echo c - psptoolchain-gcc/files
mkdir -p psptoolchain-gcc/files > /dev/null 2>&1
echo x - psptoolchain-gcc/files/patch-gcc-config-mips-mips.c
sed 's/^X//' >psptoolchain-gcc/files/patch-gcc-config-mips-mips.c << 'END-of-psptoolchain-gcc/files/patch-gcc-config-mips-mips.c'
X--- gcc/config/mips/mips.c.orig	2005-12-09 08:15:58.000000000 +0000
X+++ gcc/config/mips/mips.c	2006-05-07 18:37:50.000000000 +0100
X@@ -179,6 +179,12 @@
X   MIPS_VOID_FTYPE_V2HI_V2HI,
X   MIPS_VOID_FTYPE_V4QI_V4QI,
X 
X+  /* For the Sony ALLEGREX.  */
X+  MIPS_SI_FTYPE_QI,
X+  MIPS_SI_FTYPE_HI,
X+  MIPS_VOID_FTYPE_VOID,
X+  MIPS_SI_FTYPE_SF,
X+
X   /* The last type.  */
X   MIPS_MAX_FTYPE_MAX
X };
X@@ -220,6 +226,11 @@
X   /* As above, but the instruction only sets a single $fcc register.  */
X   MIPS_BUILTIN_CMP_SINGLE,
X 
X+   /* The builtin corresponds to the ALLEGREX cache instruction.  Operand 0
X+      is the function code (must be less than 32) and operand 1 is the base
X+      address.  */
X+   MIPS_BUILTIN_CACHE,
X+
X   /* For generating bposge32 branch instructions in MIPS32 DSP ASE.  */
X   MIPS_BUILTIN_BPOSGE32
X };
X@@ -405,6 +416,7 @@
X static rtx mips_expand_builtin_compare (enum mips_builtin_type,
X 					enum insn_code, enum mips_fp_condition,
X 					rtx, tree);
X+static rtx mips_expand_builtin_cache (enum insn_code icode, rtx, tree);
X static rtx mips_expand_builtin_bposge (enum mips_builtin_type, rtx);
X static void mips_encode_section_info (tree, rtx, int);
X 
X@@ -721,6 +733,7 @@
X 
X   /* MIPS II */
X   { "r6000", PROCESSOR_R6000, 2 },
X+  { "allegrex", PROCESSOR_ALLEGREX, 2 },
X 
X   /* MIPS III */
X   { "r4000", PROCESSOR_R4000, 3 },
X@@ -10169,6 +10182,67 @@
X   BPOSGE_BUILTIN (32, MASK_DSP)
X };
X 
X+/* Builtin functions for the Sony ALLEGREX processor.
X+
X+   These have the `__builtin_allgrex_' prefix instead of `__builtin_mips_'
X+   to maintain compatibility with Sony's ALLEGREX GCC port.
X+
X+   Some of the builtins may seem redundant, but they are the same as the
X+   builtins defined in the Sony compiler.  I chose to map redundant and
X+   trivial builtins to the original instruction instead of creating
X+   duplicate patterns specifically for the ALLEGREX (as Sony does).  */
X+
X+/* Define a MIPS_BUILTIN_DIRECT function for instruction CODE_FOR_allegrex_<INSN>.
X+   FUNCTION_TYPE and TARGET_FLAGS are builtin_description fields.  */
X+#define DIRECT_ALLEGREX_BUILTIN(INSN, FUNCTION_TYPE, TARGET_FLAGS)	\
X+  { CODE_FOR_allegrex_ ## INSN, 0, "__builtin_allegrex_" #INSN,		\
X+    MIPS_BUILTIN_DIRECT, FUNCTION_TYPE, TARGET_FLAGS }
X+
X+/* Same as the above, but mapped to an instruction that doesn't share the
X+   NAME.  NAME is the name of the builtin without the builtin prefix.  */
X+#define DIRECT_ALLEGREX_NAMED_BUILTIN(NAME, INSN, FUNCTION_TYPE, TARGET_FLAGS)	\
X+  { CODE_FOR_ ## INSN, 0, "__builtin_allegrex_" #NAME,				\
X+    MIPS_BUILTIN_DIRECT, FUNCTION_TYPE, TARGET_FLAGS }
X+
X+/* Define a MIPS_BUILTIN_DIRECT_NO_TARGET function for instruction
X+   CODE_FOR_allegrex_<INSN>.  FUNCTION_TYPE and TARGET_FLAGS are
X+   builtin_description fields.  */
X+#define DIRECT_ALLEGREX_NO_TARGET_BUILTIN(INSN, FUNCTION_TYPE, TARGET_FLAGS)	\
X+  { CODE_FOR_allegrex_ ## INSN, 0, "__builtin_allegrex_" #INSN,			\
X+    MIPS_BUILTIN_DIRECT_NO_TARGET, FUNCTION_TYPE, TARGET_FLAGS }
X+
X+/* Define a builtin with a specific function TYPE.  */
X+#define SPECIAL_ALLEGREX_BUILTIN(TYPE, INSN, FUNCTION_TYPE, TARGET_FLAGS)	\
X+  { CODE_FOR_allegrex_ ## INSN, 0, "__builtin_allegrex_" #INSN,			\
X+    MIPS_BUILTIN_ ## TYPE, FUNCTION_TYPE, TARGET_FLAGS }
X+
X+static const struct builtin_description allegrex_bdesc[] =
X+{
X+  DIRECT_ALLEGREX_BUILTIN(bitrev, MIPS_SI_FTYPE_SI, 0),
X+  DIRECT_ALLEGREX_BUILTIN(wsbh, MIPS_SI_FTYPE_SI, 0),
X+  DIRECT_ALLEGREX_BUILTIN(wsbw, MIPS_SI_FTYPE_SI, 0),
X+  DIRECT_ALLEGREX_NAMED_BUILTIN(clz, clzsi2, MIPS_SI_FTYPE_SI, 0),
X+  DIRECT_ALLEGREX_BUILTIN(clo, MIPS_SI_FTYPE_SI, 0),
X+  DIRECT_ALLEGREX_NAMED_BUILTIN(ctz, ctzsi2, MIPS_SI_FTYPE_SI, 0),
X+  DIRECT_ALLEGREX_BUILTIN(cto, MIPS_SI_FTYPE_SI, 0),
X+  DIRECT_ALLEGREX_NAMED_BUILTIN(rotr, rotrsi3, MIPS_SI_FTYPE_SI_SI, 0),
X+  DIRECT_ALLEGREX_NAMED_BUILTIN(rotl, rotlsi3, MIPS_SI_FTYPE_SI_SI, 0),
X+
X+  DIRECT_ALLEGREX_NAMED_BUILTIN(seb, extendqisi2, MIPS_SI_FTYPE_QI, 0),
X+  DIRECT_ALLEGREX_NAMED_BUILTIN(seh, extendhisi2, MIPS_SI_FTYPE_HI, 0),
X+  DIRECT_ALLEGREX_NAMED_BUILTIN(max, smaxsi3, MIPS_SI_FTYPE_SI_SI, 0),
X+  DIRECT_ALLEGREX_NAMED_BUILTIN(min, sminsi3, MIPS_SI_FTYPE_SI_SI, 0),
X+
X+  DIRECT_ALLEGREX_NO_TARGET_BUILTIN(sync, MIPS_VOID_FTYPE_VOID, 0),
X+  SPECIAL_ALLEGREX_BUILTIN(CACHE, cache, MIPS_VOID_FTYPE_SI_SI, 0),
X+
X+  DIRECT_ALLEGREX_NAMED_BUILTIN(sqrt_s, sqrtsf2, MIPS_SF_FTYPE_SF, 0),
X+  DIRECT_ALLEGREX_BUILTIN(ceil_w_s, MIPS_SI_FTYPE_SF, 0),
X+  DIRECT_ALLEGREX_BUILTIN(floor_w_s, MIPS_SI_FTYPE_SF, 0),
X+  DIRECT_ALLEGREX_BUILTIN(round_w_s, MIPS_SI_FTYPE_SF, 0),
X+  DIRECT_ALLEGREX_NAMED_BUILTIN(trunc_w_s, fix_truncsfsi2_insn, MIPS_SI_FTYPE_SF, 0)
X+};
X+
X /* This helps provide a mapping from builtin function codes to bdesc
X    arrays.  */
X 
X@@ -10189,6 +10263,7 @@
X {
X   { mips_bdesc, ARRAY_SIZE (mips_bdesc), PROCESSOR_MAX },
X   { sb1_bdesc, ARRAY_SIZE (sb1_bdesc), PROCESSOR_SB1 },
X+  { allegrex_bdesc, ARRAY_SIZE (allegrex_bdesc), PROCESSOR_ALLEGREX },
X   { dsp_bdesc, ARRAY_SIZE (dsp_bdesc), PROCESSOR_MAX }
X };
X 
X@@ -10292,6 +10367,9 @@
X     case MIPS_BUILTIN_BPOSGE32:
X       return mips_expand_builtin_bposge (type, target);
X 
X+    case MIPS_BUILTIN_CACHE:
X+      return mips_expand_builtin_cache (icode, target, arglist);
X+
X     default:
X       return 0;
X     }
X@@ -10310,8 +10388,8 @@
X   tree V4QI_type_node;
X   unsigned int offset;
X 
X-  /* We have only builtins for -mpaired-single, -mips3d and -mdsp.  */
X-  if (!TARGET_PAIRED_SINGLE_FLOAT && !TARGET_DSP)
X+  /* We have only builtins for -mpaired-single, -mips3d and -mdsp and the Sony ALLEGREX.  */
X+  if (!TARGET_PAIRED_SINGLE_FLOAT && !TARGET_DSP && !TARGET_ALLEGREX)
X     return;
X 
X   if (TARGET_PAIRED_SINGLE_FLOAT)
X@@ -10376,6 +10454,44 @@
X 				    double_type_node, double_type_node, NULL_TREE);
X     }
X 
X+   if (TARGET_ALLEGREX)
X+     {
X+       types[MIPS_SI_FTYPE_QI]
X+ 	= build_function_type_list (intSI_type_node,
X+ 				    intQI_type_node,
X+ 				    NULL_TREE);
X+ 
X+       types[MIPS_SI_FTYPE_HI]
X+ 	= build_function_type_list (intSI_type_node,
X+ 				    intHI_type_node,
X+ 				    NULL_TREE);
X+ 
X+       types[MIPS_SI_FTYPE_SI]
X+ 	= build_function_type_list (intSI_type_node,
X+ 				    intSI_type_node,
X+ 				    NULL_TREE);
X+ 
X+       types[MIPS_SI_FTYPE_SI_SI]
X+ 	= build_function_type_list (intSI_type_node,
X+ 				    intSI_type_node, intSI_type_node,
X+ 				    NULL_TREE);
X+ 
X+       types[MIPS_VOID_FTYPE_VOID]
X+ 	= build_function_type_list (void_type_node, void_type_node, NULL_TREE);
X+ 
X+       types[MIPS_VOID_FTYPE_SI_SI]
X+ 	= build_function_type_list (void_type_node,
X+ 				    intSI_type_node, intSI_type_node, NULL_TREE);
X+ 
X+       types[MIPS_SF_FTYPE_SF]
X+ 	= build_function_type_list (float_type_node,
X+ 				    float_type_node, NULL_TREE);
X+ 
X+       types[MIPS_SI_FTYPE_SF]
X+ 	= build_function_type_list (intSI_type_node,
X+ 				    float_type_node, NULL_TREE);
X+     }
X+
X   if (TARGET_DSP)
X     {
X       V2HI_type_node = build_vector_type_for_mode (intHI_type_node, V2HImode);
X@@ -10557,6 +10673,10 @@
X 
X   switch (i)
X     {
X+     case 0:
X+       emit_insn (GEN_FCN (icode) (0));
X+       break;
X+
X     case 2:
X       emit_insn (GEN_FCN (icode) (ops[0], ops[1]));
X       break;
X@@ -10767,4 +10887,26 @@
X     }
X }
X 
X+/* Expand a __builtin_allegrex_cache() function.  Make sure the passed
X+   cache function code is less than 32.  */
X+
X+static rtx
X+mips_expand_builtin_cache (enum insn_code icode, rtx target, tree arglist)
X+{
X+  rtx op0, op1;
X+
X+  op0 = mips_prepare_builtin_arg (icode, 0, &arglist);
X+  op1 = mips_prepare_builtin_arg (icode, 1, &arglist);
X+
X+  if (GET_CODE (op0) == CONST_INT)
X+    if (INTVAL (op0) < 0 || INTVAL (op0) > 0x1f)
X+      {
X+	error ("invalid function code '%d'", INTVAL (op0));
X+	return const0_rtx;
X+      }
X+
X+  emit_insn (GEN_FCN (icode) (op0, op1));
X+  return target;
X+}
X+
X #include "gt-mips.h"
END-of-psptoolchain-gcc/files/patch-gcc-config-mips-mips.c
echo x - psptoolchain-gcc/files/patch-gcc-config-mips-mips.md
sed 's/^X//' >psptoolchain-gcc/files/patch-gcc-config-mips-mips.md << 'END-of-psptoolchain-gcc/files/patch-gcc-config-mips-mips.md'
X--- gcc/config/mips/mips.md.orig	2005-07-29 18:25:27.000000000 +0100
X+++ gcc/config/mips/mips.md	2006-05-07 14:59:33.000000000 +0100
X@@ -142,6 +142,21 @@
X    (UNSPEC_MTHLIP		365)
X    (UNSPEC_WRDSP		366)
X    (UNSPEC_RDDSP		367)
X+
X+   ;; Sony ALLEGREX instructions
X+   (UNSPEC_WSBH 		401)
X+   (UNSPEC_WSBW 		402)
X+
X+   (UNSPEC_CLO			403)
X+   (UNSPEC_CTO			404)
X+
X+   (UNSPEC_CACHE		405)
X+   (UNSPEC_SYNC 		406)
X+
X+   (UNSPEC_CEIL_W_S		407)
X+   (UNSPEC_FLOOR_W_S		408)
X+   (UNSPEC_ROUND_W_S		409)
X+
X   ]
X )
X 
X@@ -1601,9 +1616,9 @@
X 	   (mult:DI
X 	      (any_extend:DI (match_operand:SI 1 "register_operand" "d"))
X 	      (any_extend:DI (match_operand:SI 2 "register_operand" "d")))))]
X-  "!TARGET_64BIT && ISA_HAS_MSAC"
X+  "!TARGET_64BIT && (ISA_HAS_MSAC || TARGET_ALLEGREX)"
X {
X-  if (TARGET_MIPS5500)
X+  if (TARGET_MIPS5500 || TARGET_ALLEGREX)
X     return "msub<u>\t%1,%2";
X   else
X     return "msac<u>\t$0,%1,%2";
X@@ -1718,12 +1733,12 @@
X 	 (mult:DI (any_extend:DI (match_operand:SI 1 "register_operand" "d"))
X 		  (any_extend:DI (match_operand:SI 2 "register_operand" "d")))
X 	 (match_operand:DI 3 "register_operand" "0")))]
X-  "(TARGET_MAD || ISA_HAS_MACC)
X+  "(TARGET_MAD || ISA_HAS_MACC || TARGET_ALLEGREX)
X    && !TARGET_64BIT"
X {
X   if (TARGET_MAD)
X     return "mad<u>\t%1,%2";
X-  else if (TARGET_MIPS5500)
X+  else if (TARGET_MIPS5500 || TARGET_ALLEGREX)
X     return "madd<u>\t%1,%2";
X   else
X     /* See comment in *macc.  */
X@@ -1995,6 +2010,32 @@
X ;;
X ;;  ....................
X ;;
X+;;	FIND FIRST BIT INSTRUCTION
X+;;
X+;;  ....................
X+;;
X+
X+(define_expand "ffs<mode>2"
X+  [(set (match_operand:GPR 0 "register_operand" "")
X+	(ffs:GPR (match_operand:GPR 1 "register_operand" "")))]
X+  "ISA_HAS_CLZ_CLO"
X+{
X+  rtx r1, r2, r3, r4;
X+
X+  r1 = gen_reg_rtx (<MODE>mode);
X+  r2 = gen_reg_rtx (<MODE>mode);
X+  r3 = gen_reg_rtx (<MODE>mode);
X+  r4 = gen_reg_rtx (<MODE>mode);
X+  emit_insn (gen_neg<mode>2 (r1, operands[1]));
X+  emit_insn (gen_and<mode>3 (r2, operands[1], r1));
X+  emit_insn (gen_clz<mode>2 (r3, r2));
X+  emit_move_insn (r4, GEN_INT (GET_MODE_BITSIZE (<MODE>mode)));
X+  emit_insn (gen_sub<mode>3 (operands[0], r4, r3));
X+  DONE;
X+})
X+;;
X+;;  ....................
X+;;
X ;;	NEGATION and ONE'S COMPLEMENT
X ;;
X ;;  ....................
X@@ -4193,6 +4234,25 @@
X   [(set_attr "type" "shift")
X    (set_attr "mode" "<MODE>")])
X 
X+(define_expand "rotl<mode>3"
X+  [(set (match_operand:GPR 0 "register_operand")
X+      	(rotate:GPR (match_operand:GPR 1 "register_operand")
X+		    (match_operand:SI 2 "arith_operand")))]
X+  "ISA_HAS_ROTR_<MODE>"
X+{
X+  rtx temp;
X+
X+  if (GET_CODE (operands[2]) == CONST_INT)
X+    temp = GEN_INT (GET_MODE_BITSIZE (<MODE>mode) - INTVAL (operands[2]));
X+  else
X+    {
X+      temp = gen_reg_rtx (<MODE>mode);
X+      emit_insn (gen_neg<mode>2 (temp, operands[2]));
X+    }
X+  emit_insn (gen_rotr<mode>3 (operands[0], operands[1], temp));
X+  DONE;
X+})
X+
X ;;
X ;;  ....................
X ;;
X@@ -5306,7 +5366,7 @@
X 		 (const_int 0)])
X 	 (match_operand:GPR 2 "reg_or_0_operand" "dJ,0")
X 	 (match_operand:GPR 3 "reg_or_0_operand" "0,dJ")))]
X-  "ISA_HAS_CONDMOVE"
X+  "ISA_HAS_CONDMOVE || ISA_HAS_INT_CONDMOVE"
X   "@
X     mov%T4\t%0,%z2,%1
X     mov%t4\t%0,%z3,%1"
X@@ -5336,8 +5396,12 @@
X 	(if_then_else:GPR (match_dup 5)
X 			  (match_operand:GPR 2 "reg_or_0_operand")
X 			  (match_operand:GPR 3 "reg_or_0_operand")))]
X-  "ISA_HAS_CONDMOVE"
X+  "ISA_HAS_CONDMOVE || ISA_HAS_INT_CONDMOVE"
X {
X+  if (ISA_HAS_INT_CONDMOVE
X+      && GET_MODE_CLASS (GET_MODE (cmp_operands[0])) == MODE_FLOAT)
X+    FAIL;
X+
X   gen_conditional_move (operands);
X   DONE;
X })
X@@ -5428,3 +5492,6 @@
X ; The MIPS DSP Instructions.
X 
X (include "mips-dsp.md")
X+
X+; Sony ALLEGREX instructions.
X+(include "allegrex.md")
END-of-psptoolchain-gcc/files/patch-gcc-config-mips-mips.md
echo x - psptoolchain-gcc/files/patch-gcc-config.gcc
sed 's/^X//' >psptoolchain-gcc/files/patch-gcc-config.gcc << 'END-of-psptoolchain-gcc/files/patch-gcc-config.gcc'
X--- gcc/config.gcc.orig	2006-02-06 16:07:46.000000000 +0000
X+++ gcc/config.gcc	2006-05-07 13:27:40.000000000 +0100
X@@ -406,12 +406,6 @@
X       tm_defines="${tm_defines} FBSD_MAJOR=5" ;;
X     *-*-freebsd6 | *-*-freebsd[6].*)
X       tm_defines="${tm_defines} FBSD_MAJOR=6" ;;
X-    *-*-freebsd7 | *-*-freebsd[7].*)
X-      tm_defines="${tm_defines} FBSD_MAJOR=7" ;;
X-    *-*-freebsd8 | *-*-freebsd[8].*)
X-      tm_defines="${tm_defines} FBSD_MAJOR=8" ;;
X-    *-*-freebsd9 | *-*-freebsd[9].*)
X-      tm_defines="${tm_defines} FBSD_MAJOR=9" ;;
X     *)
X       echo 'Please update *-*-freebsd* in gcc/config.gcc'
X       exit 1
X@@ -756,11 +750,6 @@
X         tmake_file=bfin/t-bfin-elf
X         use_collect2=no
X         ;;
X-bfin*-uclinux*)
X-	tm_file="${tm_file} dbxelf.h elfos.h bfin/elf.h bfin/uclinux.h"
X-        tmake_file=bfin/t-bfin-elf
X-        use_collect2=no
X-        ;;
X bfin*-*)
X 	tm_file="${tm_file} dbxelf.h elfos.h bfin/elf.h"
X         tmake_file=bfin/t-bfin
X@@ -1584,6 +1573,18 @@
X 	tmake_file=mips/t-r3900
X 	use_fixproto=yes
X 	;;
X+mipsallegrex-*-elf* | mipsallegrexel-*-elf*)
X+	tm_file="elfos.h ${tm_file} mips/elf.h"
X+	tmake_file=mips/t-allegrex
X+	target_cpu_default="MASK_SINGLE_FLOAT|MASK_DIVIDE_BREAKS"
X+	tm_defines="MIPS_ISA_DEFAULT=2 MIPS_CPU_STRING_DEFAULT=\\\"allegrex\\\" MIPS_ABI_DEFAULT=ABI_EABI"
X+	case ${target} in
X+	mipsallegrex*-psp-elf*)	
X+		tm_file="${tm_file} mips/psp.h"
X+		;;
X+	esac
X+	use_fixproto=yes
X+	;;
X mmix-knuth-mmixware)
X 	need_64bit_hwint=yes
X 	;;
END-of-psptoolchain-gcc/files/patch-gcc-config.gcc
echo x - psptoolchain-gcc/files/patch-gcc-version.c
sed 's/^X//' >psptoolchain-gcc/files/patch-gcc-version.c << 'END-of-psptoolchain-gcc/files/patch-gcc-version.c'
X--- gcc/version.c.orig	2005-03-16 06:04:10.000000000 +0000
X+++ gcc/version.c	2006-05-07 13:47:56.000000000 +0100
X@@ -8,7 +8,7 @@
X    in parentheses.  You may also wish to include a number indicating
X    the revision of your modified compiler.  */
X 
X-#define VERSUFFIX ""
X+#define VERSUFFIX " (PSPDEV 20060507)"
X 
X /* This is the location of the online document giving instructions for
X    reporting bugs.  If you distribute a modified version of GCC,
X@@ -17,7 +17,7 @@
X    forward us bugs reported to you, if you determine that they are
X    not bugs in your modifications.)  */
X 
X-const char bug_report_url[] = "<URL:http://gcc.gnu.org/bugs.html>";
X+const char bug_report_url[] = "<URL:http://wiki.pspdev.org/psp:toolchain#bugs>";
X 
X /* The complete version string, assembled from several pieces.
X    BASEVER, DATESTAMP, and DEVPHASE are defined by the Makefile.  */
END-of-psptoolchain-gcc/files/patch-gcc-version.c
echo x - psptoolchain-gcc/files/patch-config.sub
sed 's/^X//' >psptoolchain-gcc/files/patch-config.sub << 'END-of-psptoolchain-gcc/files/patch-config.sub'
X--- config.sub.orig	2005-12-16 12:57:40.000000000 +0000
X+++ config.sub	2006-05-07 13:27:40.000000000 +0100
X@@ -264,6 +264,7 @@
X 	| mipsisa64sb1 | mipsisa64sb1el \
X 	| mipsisa64sr71k | mipsisa64sr71kel \
X 	| mipstx39 | mipstx39el \
X+	| mipsallegrex | mipsallegrexel \
X 	| mn10200 | mn10300 \
X 	| mt \
X 	| msp430 \
X@@ -346,6 +347,7 @@
X 	| mipsisa64sb1-* | mipsisa64sb1el-* \
X 	| mipsisa64sr71k-* | mipsisa64sr71kel-* \
X 	| mipstx39-* | mipstx39el-* \
X+	| mipsallegrex-* | mipsallegrexel-* \
X 	| mmix-* \
X 	| mt-* \
X 	| msp430-* \
X@@ -689,6 +691,10 @@
X 		basic_machine=m68k-atari
X 		os=-mint
X 		;;
X+	psp)
X+		basic_machine=mipsallegrexel-psp
X+		os=-elf
X+		;;
X 	mips3*-*)
X 		basic_machine=`echo $basic_machine | sed -e 's/mips3/mips64/'`
X 		;;
END-of-psptoolchain-gcc/files/patch-config.sub
echo x - psptoolchain-gcc/files/patch-gcc-c-incpath.c
sed 's/^X//' >psptoolchain-gcc/files/patch-gcc-c-incpath.c << 'END-of-psptoolchain-gcc/files/patch-gcc-c-incpath.c'
X--- gcc/c-incpath.c.orig	2005-06-25 03:02:01.000000000 +0100
X+++ gcc/c-incpath.c	2006-05-07 13:27:40.000000000 +0100
X@@ -331,13 +331,18 @@
X   cpp_dir *p;
X 
X #if defined (HAVE_DOS_BASED_FILE_SYSTEM)
X-  /* Convert all backslashes to slashes.  The native CRT stat()
X-     function does not recognize a directory that ends in a backslash
X-     (unless it is a drive root dir, such "c:\").  Forward slashes,
X-     trailing or otherwise, cause no problems for stat().  */
X-  char* c;
X-  for (c = path; *c; c++)
X-    if (*c == '\\') *c = '/';
X+  /* Remove unnecessary trailing slashes.  On some versions of MS
X+     Windows, trailing  _forward_ slashes cause no problems for stat().
X+     On newer versions, stat() does not recognise a directory that ends
X+     in a '\\' or '/', unless it is a drive root dir, such as "c:/",
X+     where it is obligatory.  */
X+  int pathlen = strlen (path);
X+  char* end = path + pathlen - 1;
X+  /* Preserve the lead '/' or lead "c:/".  */
X+  char* start = path + (pathlen > 2 && path[1] == ':' ? 3 : 1);
X+   
X+  for (; end > start && IS_DIR_SEPARATOR (*end); end--)
X+    *end = 0;
X #endif
X 
X   p = xmalloc (sizeof (cpp_dir));
END-of-psptoolchain-gcc/files/patch-gcc-c-incpath.c
echo x - psptoolchain-gcc/files/patch-gcc-config-mips-allegrex.md
sed 's/^X//' >psptoolchain-gcc/files/patch-gcc-config-mips-allegrex.md << 'END-of-psptoolchain-gcc/files/patch-gcc-config-mips-allegrex.md'
X--- gcc/config/mips/allegrex.md.orig	1970-01-01 01:00:00.000000000 +0100
X+++ gcc/config/mips/allegrex.md	2006-05-07 13:27:40.000000000 +0100
X@@ -0,0 +1,183 @@
X+;; Sony ALLEGREX instructions.
X+;; Copyright (C) 2005 Free Software Foundation, Inc.
X+;;
X+;; This file is part of GCC.
X+;;
X+;; GCC is free software; you can redistribute it and/or modify
X+;; it under the terms of the GNU General Public License as published by
X+;; the Free Software Foundation; either version 2, or (at your option)
X+;; any later version.
X+;;
X+;; GCC is distributed in the hope that it will be useful,
X+;; but WITHOUT ANY WARRANTY; without even the implied warranty of
X+;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
X+;; GNU General Public License for more details.
X+;;
X+;; You should have received a copy of the GNU General Public License
X+;; along with GCC; see the file COPYING.  If not, write to
X+;; the Free Software Foundation, 59 Temple Place - Suite 330,
X+;; Boston, MA 02111-1307, USA.
X+
X+; Multiply Add and Subtract.
X+
X+(define_insn "allegrex_madd"
X+  [(set (match_operand:SI 0 "register_operand" "+l")
X+      	(plus:SI (mult:SI (match_operand:SI 1 "register_operand" "d")
X+			  (match_operand:SI 2 "register_operand" "d"))
X+		 (match_dup 0)))
X+   (clobber (match_scratch:SI 3 "=h"))]
X+  "TARGET_ALLEGREX"
X+  "madd\t%1,%2"
X+  [(set_attr "type"	"imadd")
X+   (set_attr "mode"	"SI")])
X+
X+(define_insn "allegrex_msub"
X+  [(set (match_operand:SI 0 "register_operand" "+l")
X+      	(minus:SI (match_dup 0)
X+		  (mult:SI (match_operand:SI 1 "register_operand" "d")
X+			   (match_operand:SI 2 "register_operand" "d"))))
X+   (clobber (match_scratch:SI 3 "=h"))]
X+  "TARGET_ALLEGREX"
X+  "msub\t%1,%2"
X+  [(set_attr "type"	"imadd")
X+   (set_attr "mode"	"SI")])
X+
X+
X+; Min and max.
X+
X+(define_insn "sminsi3"
X+  [(set (match_operand:SI 0 "register_operand" "=d")
X+        (smin:SI (match_operand:SI 1 "register_operand" "d")
X+                 (match_operand:SI 2 "register_operand" "d")))]
X+  "TARGET_ALLEGREX"
X+  "min\t%0,%1,%2"
X+  [(set_attr "type"	"arith")
X+   (set_attr "mode"	"SI")])
X+
X+(define_insn "smaxsi3"
X+  [(set (match_operand:SI 0 "register_operand" "=d")
X+        (smax:SI (match_operand:SI 1 "register_operand" "d")
X+                 (match_operand:SI 2 "register_operand" "d")))]
X+  "TARGET_ALLEGREX"
X+  "max\t%0,%1,%2"
X+  [(set_attr "type"	"arith")
X+   (set_attr "mode"	"SI")])
X+
X+
X+; Extended shift instructions.
X+
X+(define_insn "allegrex_bitrev"
X+  [(set (match_operand:SI 0 "register_operand" "=d")
X+	(unspec:SI [(match_operand:SI 1 "register_operand" "d")]
X+		   UNSPEC_BITREV))]
X+  "TARGET_ALLEGREX"
X+  "bitrev\t%0,%1"
X+  [(set_attr "type"	"arith")
X+   (set_attr "mode"	"SI")])
X+
X+(define_insn "allegrex_wsbh"
X+  [(set (match_operand:SI 0 "register_operand" "=d")
X+	(unspec:SI [(match_operand:SI 1 "register_operand" "d")]
X+		   UNSPEC_WSBH))]
X+  "TARGET_ALLEGREX"
X+  "wsbh\t%0,%1"
X+  [(set_attr "type"	"arith")
X+   (set_attr "mode"	"SI")])
X+
X+(define_insn "allegrex_wsbw"
X+  [(set (match_operand:SI 0 "register_operand" "=d")
X+	(unspec:SI [(match_operand:SI 1 "register_operand" "d")]
X+		   UNSPEC_WSBW))]
X+  "TARGET_ALLEGREX"
X+  "wsbw\t%0,%1"
X+  [(set_attr "type"	"arith")
X+   (set_attr "mode"	"SI")])
X+
X+
X+; Count leading ones, count trailing zeros, and count trailing ones (clz is
X+; already defined).
X+
X+(define_insn "allegrex_clo"
X+  [(set (match_operand:SI 0 "register_operand" "=d")
X+      	(unspec:SI [(match_operand:SI 1 "register_operand" "d")]
X+		   UNSPEC_CLO))]
X+  "TARGET_ALLEGREX"
X+  "clo\t%0,%1"
X+  [(set_attr "type"	"clz")
X+   (set_attr "mode"	"SI")])
X+
X+(define_expand "ctzsi2"
X+  [(set (match_operand:SI 0 "register_operand")
X+      	(ctz:SI (match_operand:SI 1 "register_operand")))]
X+  "TARGET_ALLEGREX"
X+{
X+  rtx r1;
X+
X+  r1 = gen_reg_rtx (SImode);
X+  emit_insn (gen_allegrex_bitrev (r1, operands[1]));
X+  emit_insn (gen_clzsi2 (operands[0], r1));
X+  DONE;
X+})
X+
X+(define_expand "allegrex_cto"
X+  [(set (match_operand:SI 0 "register_operand")
X+      	(unspec:SI [(match_operand:SI 1 "register_operand")]
X+		   UNSPEC_CTO))]
X+  "TARGET_ALLEGREX"
X+{
X+  rtx r1;
X+
X+  r1 = gen_reg_rtx (SImode);
X+  emit_insn (gen_allegrex_bitrev (r1, operands[1]));
X+  emit_insn (gen_allegrex_clo (operands[0], r1));
X+  DONE;
X+})
X+
X+
X+; Misc.
X+
X+(define_insn "allegrex_sync"
X+  [(unspec_volatile [(const_int 0)] UNSPEC_SYNC)]
X+  "TARGET_ALLEGREX"
X+  "sync"
X+  [(set_attr "type"	"unknown")
X+   (set_attr "mode"	"none")])
X+
X+(define_insn "allegrex_cache"
X+  [(unspec_volatile [(match_operand:SI 0 "const_int_operand" "")
X+		     (match_operand:SI 1 "register_operand" "d")]
X+		    UNSPEC_CACHE)]
X+  "TARGET_ALLEGREX"
X+  "cache\t%0,0(%1)"
X+  [(set_attr "type"	"unknown")
X+   (set_attr "mode"	"none")])
X+
X+
X+; Floating-point builtins.
X+
X+(define_insn "allegrex_ceil_w_s"
X+  [(set (match_operand:SI 0 "register_operand" "=f")
X+      	(unspec:SI [(match_operand:SF 1 "register_operand" "f")]
X+		   UNSPEC_CEIL_W_S))]
X+  "TARGET_ALLEGREX"
X+  "ceil.w.s\t%0,%1"
X+  [(set_attr "type"	"fcvt")
X+   (set_attr "mode"	"SF")])
X+
X+(define_insn "allegrex_floor_w_s"
X+  [(set (match_operand:SI 0 "register_operand" "=f")
X+      	(unspec:SI [(match_operand:SF 1 "register_operand" "f")]
X+		   UNSPEC_FLOOR_W_S))]
X+  "TARGET_ALLEGREX"
X+  "floor.w.s\t%0,%1"
X+  [(set_attr "type"	"fcvt")
X+   (set_attr "mode"	"SF")])
X+
X+(define_insn "allegrex_round_w_s"
X+  [(set (match_operand:SI 0 "register_operand" "=f")
X+      	(unspec:SI [(match_operand:SF 1 "register_operand" "f")]
X+		   UNSPEC_ROUND_W_S))]
X+  "TARGET_ALLEGREX"
X+  "round.w.s\t%0,%1"
X+  [(set_attr "type"	"fcvt")
X+   (set_attr "mode"	"SF")])
END-of-psptoolchain-gcc/files/patch-gcc-config-mips-allegrex.md
echo x - psptoolchain-gcc/files/patch-gcc-config-mips-mips.h
sed 's/^X//' >psptoolchain-gcc/files/patch-gcc-config-mips-mips.h << 'END-of-psptoolchain-gcc/files/patch-gcc-config-mips-mips.h'
X--- gcc/config/mips/mips.h.orig	2006-02-17 21:38:59.000000000 +0000
X+++ gcc/config/mips/mips.h	2006-05-07 18:37:54.000000000 +0100
X@@ -59,6 +59,7 @@
X   PROCESSOR_R9000,
X   PROCESSOR_SB1,
X   PROCESSOR_SR71000,
X+  PROCESSOR_ALLEGREX,
X   PROCESSOR_MAX
X };
X 
X@@ -194,6 +195,7 @@
X #define TARGET_MIPS9000             (mips_arch == PROCESSOR_R9000)
X #define TARGET_SB1                  (mips_arch == PROCESSOR_SB1)
X #define TARGET_SR71K                (mips_arch == PROCESSOR_SR71000)
X+#define TARGET_ALLEGREX             (mips_arch == PROCESSOR_ALLEGREX)
X 
X /* Scheduling target defines.  */
X #define TUNE_MIPS3000               (mips_tune == PROCESSOR_R3000)
X@@ -208,6 +210,7 @@
X #define TUNE_MIPS7000               (mips_tune == PROCESSOR_R7000)
X #define TUNE_MIPS9000               (mips_tune == PROCESSOR_R9000)
X #define TUNE_SB1                    (mips_tune == PROCESSOR_SB1)
X+#define TUNE_ALLEGREX               (mips_tune == PROCESSOR_ALLEGREX)
X 
X /* True if the pre-reload scheduler should try to create chains of
X    multiply-add or multiply-subtract instructions.  For example,
X@@ -578,6 +581,9 @@
X                                  && !TARGET_MIPS5500                    \
X 				 && !TARGET_MIPS16)
X 
X+/* ISA has just the integer condition move instructions (movn,movz) */
X+#define ISA_HAS_INT_CONDMOVE	(TARGET_ALLEGREX)
X+
X /* ISA has the mips4 FP condition code instructions: FP-compare to CC,
X    branch on CC, and move (both FP and non-FP) on CC.  */
X #define ISA_HAS_8CC		(ISA_MIPS4				\
X@@ -594,7 +600,8 @@
X 
X /* ISA has conditional trap instructions.  */
X #define ISA_HAS_COND_TRAP	(!ISA_MIPS1				\
X-				 && !TARGET_MIPS16)
X+				 && !TARGET_MIPS16			\
X+				 && !TARGET_ALLEGREX) 
X 
X /* ISA has integer multiply-accumulate instructions, madd and msub.  */
X #define ISA_HAS_MADD_MSUB       ((ISA_MIPS32				\
X@@ -612,6 +619,7 @@
X #define ISA_HAS_CLZ_CLO         ((ISA_MIPS32				\
X                                   || ISA_MIPS32R2			\
X                                   || ISA_MIPS64				\
X+                                  || TARGET_ALLEGREX			\
X                                  ) && !TARGET_MIPS16)
X 
X /* ISA has double-word count leading zeroes/ones instruction (not
X@@ -659,6 +667,7 @@
X                                      || TARGET_MIPS5400                 \
X                                      || TARGET_MIPS5500                 \
X                                      || TARGET_SR71K                    \
X+                                     || TARGET_ALLEGREX                 \
X                                      ))
X 
X /* ISA has 64-bit rotate right instruction.  */
X@@ -692,11 +701,13 @@
X /* ISA includes the MIPS32r2 seb and seh instructions.  */
X #define ISA_HAS_SEB_SEH         (!TARGET_MIPS16                        \
X                                  && (ISA_MIPS32R2                      \
X+                                     || TARGET_ALLEGREX                \
X                                      ))
X 
X /* ISA includes the MIPS32/64 rev 2 ext and ins instructions.  */
X #define ISA_HAS_EXT_INS         (!TARGET_MIPS16                        \
X                                  && (ISA_MIPS32R2                      \
X+                                     || TARGET_ALLEGREX                \
X                                      ))
X 
X /* True if the result of a load is not available to the next instruction.
X@@ -727,7 +738,8 @@
X #define ISA_HAS_HILO_INTERLOCKS	(ISA_MIPS32				\
X 				 || ISA_MIPS32R2			\
X 				 || ISA_MIPS64				\
X-				 || TARGET_MIPS5500)
X+				 || TARGET_MIPS5500			\
X+				 || TARGET_ALLEGREX)
X 
X /* Add -G xx support.  */
X 
X@@ -1143,6 +1155,11 @@
X #define CLZ_DEFINED_VALUE_AT_ZERO(MODE, VALUE) \
X   ((VALUE) = GET_MODE_BITSIZE (MODE), true)
X 
X+/* The [d]clz instructions have the natural values at 0.  */
X+
X+#define CLZ_DEFINED_VALUE_AT_ZERO(MODE, VALUE) \
X+  ((VALUE) = GET_MODE_BITSIZE (MODE), true)
X+
X /* Standard register usage.  */
X 
X /* Number of hardware registers.  We have:
END-of-psptoolchain-gcc/files/patch-gcc-config-mips-mips.h
echo x - psptoolchain-gcc/files/patch-gcc-config-mips-psp.h
sed 's/^X//' >psptoolchain-gcc/files/patch-gcc-config-mips-psp.h << 'END-of-psptoolchain-gcc/files/patch-gcc-config-mips-psp.h'
X--- gcc/config/mips/psp.h.orig	1970-01-01 01:00:00.000000000 +0100
X+++ gcc/config/mips/psp.h	2006-05-07 13:27:43.000000000 +0100
X@@ -0,0 +1,31 @@
X+/* Support for Sony's Playstation Portable (PSP).
X+   Copyright (C) 2005 Free Software Foundation, Inc.
X+   Contributed by Marcus R. Brown <mrbrown@ocgnet.org>
X+
X+This file is part of GCC.
X+
X+GCC is free software; you can redistribute it and/or modify
X+it under the terms of the GNU General Public License as published by
X+the Free Software Foundation; either version 2, or (at your option)
X+any later version.
X+
X+GCC is distributed in the hope that it will be useful,
X+but WITHOUT ANY WARRANTY; without even the implied warranty of
X+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
X+GNU General Public License for more details.
X+
X+You should have received a copy of the GNU General Public License
X+along with GCC; see the file COPYING.  If not, write to
X+the Free Software Foundation, 59 Temple Place - Suite 330,
X+Boston, MA 02111-1307, USA.  */
X+
X+/* Override the startfile spec to include crt0.o. */
X+#undef STARTFILE_SPEC
X+#define STARTFILE_SPEC "crt0%O%s crti%O%s crtbegin%O%s"
X+
X+#undef SUBTARGET_CPP_SPEC
X+#define SUBTARGET_CPP_SPEC "-DPSP=1 -D__psp__=1 -D_PSP=1"
X+
X+/* Get rid of the .pdr section. */
X+#undef SUBTARGET_ASM_SPEC
X+#define SUBTARGET_ASM_SPEC "-mno-pdr"
END-of-psptoolchain-gcc/files/patch-gcc-config-mips-psp.h
echo x - psptoolchain-gcc/files/patch-gcc-config-mips-t-allegrex
sed 's/^X//' >psptoolchain-gcc/files/patch-gcc-config-mips-t-allegrex << 'END-of-psptoolchain-gcc/files/patch-gcc-config-mips-t-allegrex'
X--- gcc/config/mips/t-allegrex.orig	1970-01-01 01:00:00.000000000 +0100
X+++ gcc/config/mips/t-allegrex	2006-05-07 13:27:43.000000000 +0100
X@@ -0,0 +1,29 @@
X+# Suppress building libgcc1.a, since the MIPS compiler port is complete
X+# and does not need anything from libgcc1.a.
X+LIBGCC1 =
X+CROSS_LIBGCC1 =
X+
X+EXTRA_MULTILIB_PARTS = crtbegin.o crtend.o crti.o crtn.o
X+# Don't let CTOR_LIST end up in sdata section.
X+CRTSTUFF_T_CFLAGS = -G 0
X+
X+# Assemble startup files.
X+$(T)crti.o: $(srcdir)/config/mips/crti.asm $(GCC_PASSES)
X+	$(GCC_FOR_TARGET) $(GCC_CFLAGS) $(MULTILIB_CFLAGS) $(INCLUDES) \
X+	-c -o $(T)crti.o -x assembler-with-cpp $(srcdir)/config/mips/crti.asm
X+
X+$(T)crtn.o: $(srcdir)/config/mips/crtn.asm $(GCC_PASSES)
X+	$(GCC_FOR_TARGET) $(GCC_CFLAGS) $(MULTILIB_CFLAGS) $(INCLUDES) \
X+	-c -o $(T)crtn.o -x assembler-with-cpp $(srcdir)/config/mips/crtn.asm
X+
X+# We must build libgcc2.a with -G 0, in case the user wants to link
X+# without the $gp register.
X+TARGET_LIBGCC2_CFLAGS = -G 0
X+
X+# Build the libraries for both hard and soft floating point
X+
X+MULTILIB_OPTIONS = 
X+MULTILIB_DIRNAMES = 
X+
X+LIBGCC = stmp-multilib
X+INSTALL_LIBGCC = install-multilib
END-of-psptoolchain-gcc/files/patch-gcc-config-mips-t-allegrex
echo x - psptoolchain-gcc/Makefile
sed 's/^X//' >psptoolchain-gcc/Makefile << 'END-of-psptoolchain-gcc/Makefile'
X# New ports collection makefile for: psptoolchain-gcc
X# Date created:        15 February 2009
X# Whom:                Tassilo Philipp <tphilipp@potion-studios.com>
X#
X# $FreeBSD$
X#
X
XPORTNAME?=		gcc
XPORTVERSION=		4.1.0
XCATEGORIES=		devel
XMASTER_SITES=		${MASTER_SITE_GCC}
XMASTER_SITE_SUBDIR=	releases/${DISTNAME}/
XPKGNAMEPREFIX=		psptoolchain-
X
XMAINTAINER=		tphilipp@potion-studios.com
XCOMMENT=		PlayStation Portable development toolchain ${PORTNAME}
X
XBUILD_DEPENDS+=		psp-addr2line:${PORTSDIR}/devel/psptoolchain-binutils \
X			psp-ar:${PORTSDIR}/devel/psptoolchain-binutils \
X			psp-as:${PORTSDIR}/devel/psptoolchain-binutils \
X			psp-c++filt:${PORTSDIR}/devel/psptoolchain-binutils \
X			psp-gprof:${PORTSDIR}/devel/psptoolchain-binutils \
X			psp-ld:${PORTSDIR}/devel/psptoolchain-binutils \
X			psp-nm:${PORTSDIR}/devel/psptoolchain-binutils \
X			psp-objcopy:${PORTSDIR}/devel/psptoolchain-binutils \
X			psp-objdump:${PORTSDIR}/devel/psptoolchain-binutils \
X			psp-ranlib:${PORTSDIR}/devel/psptoolchain-binutils \
X			psp-readelf:${PORTSDIR}/devel/psptoolchain-binutils \
X			psp-size:${PORTSDIR}/devel/psptoolchain-binutils \
X			psp-strings:${PORTSDIR}/devel/psptoolchain-binutils \
X			psp-strip:${PORTSDIR}/devel/psptoolchain-binutils
X
XUSE_BZIP2=		yes
XUSE_GMAKE=		yes
X
XHAS_CONFIGURE=		yes
XCONFIGURE_ARGS?=	--prefix=${PREFIX} --target="psp" --enable-languages="c" --with-newlib --without-headers --disable-libssp --disable-nls
X
XMAN1=			psp-cpp.1 \
X			psp-gcc.1 \
X			psp-gcov.1
XMAN7=			fsf-funding.7 \
X			gfdl.7 \
X			gpl.7
XINFO=			cpp \
X			cppinternals \
X			gcc \
X			gccinstall \
X			gccint
X
X.include <bsd.port.mk>
END-of-psptoolchain-gcc/Makefile
echo x - psptoolchain-gcc/distinfo
sed 's/^X//' >psptoolchain-gcc/distinfo << 'END-of-psptoolchain-gcc/distinfo'
XMD5 (gcc-4.1.0.tar.bz2) = 88785071f29ed0e0b6b61057a1079442
XSHA256 (gcc-4.1.0.tar.bz2) = 1159457a0e4c054b709547ae21ff624aebab2033e0d9e5bf46c9cf88b1970606
XSIZE (gcc-4.1.0.tar.bz2) = 38639061
END-of-psptoolchain-gcc/distinfo
echo x - psptoolchain-gcc/pkg-plist
sed 's/^X//' >psptoolchain-gcc/pkg-plist << 'END-of-psptoolchain-gcc/pkg-plist'
Xpsp/bin/gcc
Xlibexec/gcc/psp/4.1.0/install-tools/mkheaders
Xlibexec/gcc/psp/4.1.0/install-tools/fixproto
Xlibexec/gcc/psp/4.1.0/install-tools/fixincl
Xlibexec/gcc/psp/4.1.0/install-tools/fixinc.sh
Xlibexec/gcc/psp/4.1.0/install-tools/fix-header
Xlibexec/gcc/psp/4.1.0/collect2
Xlibexec/gcc/psp/4.1.0/cc1
Xlib/gcc/psp/4.1.0/libgcov.a
Xlib/gcc/psp/4.1.0/libgcc.a
Xlib/gcc/psp/4.1.0/install-tools/mkheaders.conf
Xlib/gcc/psp/4.1.0/install-tools/macro_list
Xlib/gcc/psp/4.1.0/install-tools/include/varargs.h
Xlib/gcc/psp/4.1.0/install-tools/include/unwind.h
Xlib/gcc/psp/4.1.0/install-tools/include/stddef.h
Xlib/gcc/psp/4.1.0/install-tools/include/stdbool.h
Xlib/gcc/psp/4.1.0/install-tools/include/stdarg.h
Xlib/gcc/psp/4.1.0/install-tools/include/limits.h
Xlib/gcc/psp/4.1.0/install-tools/include/iso646.h
Xlib/gcc/psp/4.1.0/install-tools/include/float.h
Xlib/gcc/psp/4.1.0/install-tools/include/README
Xlib/gcc/psp/4.1.0/install-tools/gsyslimits.h
Xlib/gcc/psp/4.1.0/include/varargs.h
Xlib/gcc/psp/4.1.0/include/unwind.h
Xlib/gcc/psp/4.1.0/include/syslimits.h
Xlib/gcc/psp/4.1.0/include/stddef.h
Xlib/gcc/psp/4.1.0/include/stdbool.h
Xlib/gcc/psp/4.1.0/include/stdarg.h
Xlib/gcc/psp/4.1.0/include/limits.h
Xlib/gcc/psp/4.1.0/include/iso646.h
Xlib/gcc/psp/4.1.0/include/float.h
Xlib/gcc/psp/4.1.0/include/fixed
Xlib/gcc/psp/4.1.0/include/README
Xlib/gcc/psp/4.1.0/crtn.o
Xlib/gcc/psp/4.1.0/crti.o
Xlib/gcc/psp/4.1.0/crtend.o
Xlib/gcc/psp/4.1.0/crtbegin.o
Xbin/psp-gcov
Xbin/psp-gccbug
Xbin/psp-gcc-4.1.0
Xbin/psp-gcc
Xbin/psp-cpp
X@dirrm libexec/gcc/psp/4.1.0/install-tools
X@dirrm libexec/gcc/psp/4.1.0
X@dirrm libexec/gcc/psp
X@dirrm lib/gcc/psp/4.1.0/install-tools/include
X@dirrm lib/gcc/psp/4.1.0/install-tools
X@dirrm lib/gcc/psp/4.1.0/include
X@dirrm lib/gcc/psp/4.1.0
X@dirrm lib/gcc/psp
END-of-psptoolchain-gcc/pkg-plist
exit