Bug 147638
| Summary: | [PATCH] [ath] Atheros R9280 has probrem at 8.1-PRERELEASE | ||
|---|---|---|---|
| Product: | Base System | Reporter: | MURAMATSU Atsushi <amura> |
| Component: | kern | Assignee: | Adrian Chadd <adrian> |
| Status: | Closed FIXED | ||
| Severity: | Affects Only Me | ||
| Priority: | Normal | ||
| Version: | 8.1-PRERELEASE | ||
| Hardware: | Any | ||
| OS: | Any | ||
Responsible Changed From-To: freebsd-bugs->freebsd-net Over to maintainer(s). I've tested this patch on my problematic ath (AR5B91) wireless card and no longer see the timeouts I was getting. I've also added this to my pr related to this (kern/146517) Thanks for the patch. -- regards, Vince Responsible Changed From-To: freebsd-net->rpaulo Actually, I think the AR_SREV_MERLIN_20() check should just go away. Responsible Changed From-To: rpaulo->adrian rpaulo has had his commit bit returned for safekeeping, so pass this along to adrian for a look. Hi, It looks like this may have been fixed by SVN revisons r209541 and r209548, which were committed before 8.1 was released. Can you confirm whether or not you still see this issue? Thanks, Gavin State Changed From-To: open->closed Submitter reports that he no longer sees the issues. |
I have notebook which has Atheros 9280 for Wi-fi. It worked correctly with 8-stable before 2nd March, but It doesn't work well with 8-stable at 6th June. Fix: I found this probrem is caused by changing sys/dev/ath/ath_hal/ar5416reg.h at r204580. In this change, AR_SERV_MERLIN_20 macro is changed to return false with Merlin 2.1 chip. I seemed my notebook has Merlin 2.1 chip from kernel messages, so I got problem. I wrote patch for this bug, and attach it this send-pr. I think PR146517 is a same probrem, this patch can fix it. Copyright (c) 1992-2010 The FreeBSD Project. Copyright (c) 1979, 1980, 1983, 1986, 1988, 1989, 1991, 1992, 1993, 1994 The Regents of the University of California. All rights reserved. FreeBSD is a registered trademark of The FreeBSD Foundation. FreeBSD 8.1-PRERELEASE #1 r208809M: Sun Jun 6 00:38:12 JST 2010 root@looxu.amura.dyndns.org:/usr/obj/usr/src/sys/LOOXU i386 Timecounter "i8254" frequency 1193182 Hz quality 0 CPU: Intel(R) Atom(TM) CPU Z530 @ 1.60GHz (1596.01-MHz 686-class CPU) Origin = "GenuineIntel" Id = 0x106c2 Family = 6 Model = 1c Stepping = 2 Features=0xbfe9fbff<FPU,VME,DE,PSE,TSC,MSR,PAE,MCE,CX8,APIC,SEP,MTRR,PGE,MCA,CMOV,PAT,CLFLUSH,DTS,ACPI,MMX,FXSR,SSE,SSE2,SS,HTT,TM,PBE> Features2=0x40c3bd<SSE3,DTES64,MON,DS_CPL,VMX,EST,TM2,SSSE3,xTPR,PDCM,MOVBE> AMD Features=0x100000<NX> AMD Features2=0x1<LAHF> TSC: P-state invariant real memory = 1073741824 (1024 MB) avail memory = 1025736704 (978 MB) -- snip -- ath0: <Atheros 9280> mem 0xfd500000-0xfd50ffff irq 17 at device 0.0 on pci8 ath0: [ITHREAD] ath0: AR9280 mac 128.2 RF5133 phy 13.0 -- snip -- --- dmesg ends here -----uSRiylstxzkDCmSZHJJjgFAFe6LmaYBSMHxdRNzPvwqmXJzn Content-Type: text/plain; name="ath.patch" Content-Transfer-Encoding: 7bit Content-Disposition: attachment; filename="ath.patch" Index: ath_hal/ar5416/ar9280_attach.c =================================================================== --- ath_hal/ar5416/ar9280_attach.c (revision 208809) +++ ath_hal/ar5416/ar9280_attach.c (working copy) @@ -346,7 +346,7 @@ regWrites = ath_hal_ini_write(ah, &AH5212(ah)->ah_ini_common, 1, regWrites); - if (AR_SREV_MERLIN_20(ah) && IS_5GHZ_FAST_CLOCK_EN(ah, chan)) { + if (AR_SREV_MERLIN_2x(ah) && IS_5GHZ_FAST_CLOCK_EN(ah, chan)) { /* 5GHz channels w/ Fast Clock use different modal values */ regWrites = ath_hal_ini_write(ah, &AH9280(ah)->ah_ini_xmodes, modesIndex, regWrites); Index: ath_hal/ar5416/ar5416reg.h =================================================================== --- ath_hal/ar5416/ar5416reg.h (revision 208809) +++ ath_hal/ar5416/ar5416reg.h (working copy) @@ -601,8 +601,11 @@ #define AR_SREV_MERLIN_20(_ah) \ (AR_SREV_MERLIN(_ah) && \ AH_PRIVATE((_ah))->ah_macRev == AR_XSREV_REVISION_MERLIN_20) +#define AR_SREV_MERLIN_2x(_ah) \ + (AR_SREV_MERLIN(_ah) && \ + AH_PRIVATE((_ah))->ah_macRev >= AR_XSREV_REVISION_MERLIN_20) #define AR_SREV_MERLIN_20_OR_LATER(_ah) \ - (AR_SREV_MERLIN_20(_ah) || \ + (AR_SREV_MERLIN_2x(_ah) || \ AH_PRIVATE((_ah))->ah_macVersion > AR_XSREV_VERSION_MERLIN) #define AR_SREV_KITE(_ah) \ Index: ath_hal/ar5416/ar5416_reset.c =================================================================== --- ath_hal/ar5416/ar5416_reset.c (revision 208809) +++ ath_hal/ar5416/ar5416_reset.c (working copy) @@ -627,7 +627,7 @@ /* treat channel B as channel G , no B mode suport in owl */ rfMode = IEEE80211_IS_CHAN_CCK(chan) ? AR_PHY_MODE_DYNAMIC : AR_PHY_MODE_OFDM; - if (AR_SREV_MERLIN_20(ah) && IS_5GHZ_FAST_CLOCK_EN(ah, chan)) { + if (AR_SREV_MERLIN_2x(ah) && IS_5GHZ_FAST_CLOCK_EN(ah, chan)) { /* phy mode bits for 5GHz channels require Fast Clock */ rfMode |= AR_PHY_MODE_DYNAMIC | AR_PHY_MODE_DYN_CCK_DISABLE; @@ -1114,7 +1114,7 @@ { uint32_t pll; - if (AR_SREV_MERLIN_20(ah) && + if (AR_SREV_MERLIN_2x(ah) && chan != AH_NULL && IEEE80211_IS_CHAN_5GHZ(chan)) { /* * PLL WAR for Merlin 2.0/2.1