Bug 255556
| Summary: | Add Apollo Lake SIO/LPSS UARTs PCI IDs | ||||||
|---|---|---|---|---|---|---|---|
| Product: | Base System | Reporter: | Jose Luis Duran <jlduran> | ||||
| Component: | kern | Assignee: | Konstantin Belousov <kib> | ||||
| Status: | Closed FIXED | ||||||
| Severity: | Affects Only Me | CC: | emaste | ||||
| Priority: | --- | ||||||
| Version: | CURRENT | ||||||
| Hardware: | Any | ||||||
| OS: | Any | ||||||
| Attachments: |
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A commit in branch main references this bug: URL: https://cgit.FreeBSD.org/src/commit/?id=5b8b6b26e40a81320f02a46df98b96bd8e93295a commit 5b8b6b26e40a81320f02a46df98b96bd8e93295a Author: Jose Luis Duran <jlduran@gmail.com> AuthorDate: 2021-05-02 21:20:25 +0000 Commit: Konstantin Belousov <kib@FreeBSD.org> CommitDate: 2021-05-03 11:38:52 +0000 uart_bus_pci.c: Style Wrap long lines, use tab instead of spaces. PR: 255556 Submitted by: Jose Luis Duran <jlduran@gmail.com> MFC after: 1 week sys/dev/uart/uart_bus_pci.c | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) A commit in branch main references this bug: URL: https://cgit.FreeBSD.org/src/commit/?id=8f1562430fbb83f6cedff6450e1aa1b593e3d7e7 commit 8f1562430fbb83f6cedff6450e1aa1b593e3d7e7 Author: Jose Luis Duran <jlduran@gmail.com> AuthorDate: 2021-05-02 21:20:25 +0000 Commit: Konstantin Belousov <kib@FreeBSD.org> CommitDate: 2021-05-03 11:38:52 +0000 Add Apollo Lake SIO/LPSS UARTs PCI IDs Add PCI IDs for Intel Apollo Lake Series HSUARTs: # pciconf -ll drv selector class rev hdr vendor device subven subdev uart0@pci0:0:24:0: 118000 0b 00 8086 5abc 8086 7270 uart1@pci0:0:24:1: 118000 0b 00 8086 5abe 8086 7270 uart2@pci0:0:24:2: 118000 0b 00 8086 5ac0 8086 7270 uart3@pci0:0:24:3: 118000 0b 00 8086 5aee 8086 7270 NB (Intel Document Number 336256-004US): 1. The E3900 and A3900 Series Processors support four LPSS_UART ports, while the N- and J- Series Processors support only LPSS_UART [2:1] ports. 2. The LPSS_UART1 port is dedicated for discrete Global Navigation Satellite System (GNSS). This port can be used for generic UART functionality if GNSS is not used. 3. The LPSS_UART2 port is dedicated for host OS debug. 4. The LPSS_UART0 and LPSS_UART3 ports are for generic UART functionality. 5. Only UART [1:0] ports support DMA. PR: 255556 Submitted by: Jose Luis Duran <jlduran@gmail.com> MFC after: 1 week sys/dev/uart/uart_bus_pci.c | 8 ++++++++ 1 file changed, 8 insertions(+) A commit in branch stable/12 references this bug: URL: https://cgit.FreeBSD.org/src/commit/?id=765f31a86876aae85e3ba1da95ea6053720e9b31 commit 765f31a86876aae85e3ba1da95ea6053720e9b31 Author: Jose Luis Duran <jlduran@gmail.com> AuthorDate: 2021-05-02 21:20:25 +0000 Commit: Konstantin Belousov <kib@FreeBSD.org> CommitDate: 2021-05-10 00:58:25 +0000 Add Apollo Lake SIO/LPSS UARTs PCI IDs PR: 255556 (cherry picked from commit 8f1562430fbb83f6cedff6450e1aa1b593e3d7e7) sys/dev/uart/uart_bus_pci.c | 8 ++++++++ 1 file changed, 8 insertions(+) A commit in branch stable/12 references this bug: URL: https://cgit.FreeBSD.org/src/commit/?id=87781d3962a8f22a8fef5e1c13dd4a8c36bed220 commit 87781d3962a8f22a8fef5e1c13dd4a8c36bed220 Author: Jose Luis Duran <jlduran@gmail.com> AuthorDate: 2021-05-02 21:20:25 +0000 Commit: Konstantin Belousov <kib@FreeBSD.org> CommitDate: 2021-05-10 00:58:25 +0000 uart_bus_pci.c: Style PR: 255556 (cherry picked from commit 5b8b6b26e40a81320f02a46df98b96bd8e93295a) sys/dev/uart/uart_bus_pci.c | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) A commit in branch stable/13 references this bug: URL: https://cgit.FreeBSD.org/src/commit/?id=b316c016e1958a8274133fdefc1251329beb8b42 commit b316c016e1958a8274133fdefc1251329beb8b42 Author: Jose Luis Duran <jlduran@gmail.com> AuthorDate: 2021-05-02 21:20:25 +0000 Commit: Konstantin Belousov <kib@FreeBSD.org> CommitDate: 2021-05-10 00:50:08 +0000 Add Apollo Lake SIO/LPSS UARTs PCI IDs PR: 255556 (cherry picked from commit 8f1562430fbb83f6cedff6450e1aa1b593e3d7e7) sys/dev/uart/uart_bus_pci.c | 8 ++++++++ 1 file changed, 8 insertions(+) A commit in branch stable/13 references this bug: URL: https://cgit.FreeBSD.org/src/commit/?id=2fb889b52071868e1da08251cce93a9d42edbb7e commit 2fb889b52071868e1da08251cce93a9d42edbb7e Author: Jose Luis Duran <jlduran@gmail.com> AuthorDate: 2021-05-02 21:20:25 +0000 Commit: Konstantin Belousov <kib@FreeBSD.org> CommitDate: 2021-05-10 00:50:02 +0000 uart_bus_pci.c: Style PR: 255556 (cherry picked from commit 5b8b6b26e40a81320f02a46df98b96bd8e93295a) sys/dev/uart/uart_bus_pci.c | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) ^Triage: assign to committer that resolved. |
Created attachment 224620 [details] Add PCI IDs for Intel Apollo Lake Series HSUARTs. Add PCI IDs for Intel Apollo Lake Series HSUARTs: # pciconf -ll drv selector class rev hdr vendor device subven subdev uart0@pci0:0:24:0: 118000 0b 00 8086 5abc 8086 7270 uart1@pci0:0:24:1: 118000 0b 00 8086 5abe 8086 7270 uart2@pci0:0:24:2: 118000 0b 00 8086 5ac0 8086 7270 uart3@pci0:0:24:3: 118000 0b 00 8086 5aee 8086 7270 NB (Intel Document Number 336256-004US): 1. The E3900 and A3900 Series Processors support four LPSS_UART ports, while the N- and J- Series Processors support only LPSS_UART [2:1] ports. 2. The LPSS_UART1 port is dedicated for discrete Global Navigation Satellite System (GNSS). This port can be used for generic UART functionality if GNSS is not used. 3. The LPSS_UART2 port is dedicated for host OS debug. 4. The LPSS_UART0 and LPSS_UART3 ports are for generic UART functionality. 5. Only UART [1:0] ports support DMA.