Bug 262836
| Summary: | [arm64] cacheline flush instruction (dc cvau) causes SIGSEGV from userland | ||||||
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| Product: | Base System | Reporter: | Dave Cottlehuber <dch> | ||||
| Component: | arm | Assignee: | Andrew Turner <Andrew> | ||||
| Status: | Closed FIXED | ||||||
| Severity: | Affects Some People | CC: | Andrew | ||||
| Priority: | --- | ||||||
| Version: | CURRENT | ||||||
| Hardware: | arm64 | ||||||
| OS: | Any | ||||||
| URL: | https://github.com/erlang/otp/issues/5817 | ||||||
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Description
Dave Cottlehuber
2022-03-26 16:12:27 UTC
See https://reviews.freebsd.org/D34675 for actual (WIP) port A commit in branch main references this bug: URL: https://cgit.FreeBSD.org/src/commit/?id=029c1c4828aab451ba262cd4e2e1d9362cf18b76 commit 029c1c4828aab451ba262cd4e2e1d9362cf18b76 Author: Andrew Turner <andrew@FreeBSD.org> AuthorDate: 2022-03-26 15:59:34 +0000 Commit: Andrew Turner <andrew@FreeBSD.org> CommitDate: 2022-03-28 09:10:15 +0000 Treat cache write as a read in arm64 data faults On arm64 we can ask the hardware to perform cache operations from userspace. These require read permission however when the memory is unmapped the kernel will receive a write exception. Add a check to see if the cause of the exception is from the cache and pass a memory read fault type to the vm subsystem. PR: 262836 Reported by: dch Sponsored by: The FreeBSD Foundation sys/arm64/arm64/trap.c | 12 ++++++++++-- 1 file changed, 10 insertions(+), 2 deletions(-) A commit in branch stable/13 references this bug: URL: https://cgit.FreeBSD.org/src/commit/?id=004da2d51f8427745c0d1287781d5ba546b19000 commit 004da2d51f8427745c0d1287781d5ba546b19000 Author: Andrew Turner <andrew@FreeBSD.org> AuthorDate: 2022-03-26 15:59:34 +0000 Commit: Andrew Turner <andrew@FreeBSD.org> CommitDate: 2022-03-31 11:09:07 +0000 Treat cache write as a read in arm64 data faults On arm64 we can ask the hardware to perform cache operations from userspace. These require read permission however when the memory is unmapped the kernel will receive a write exception. Add a check to see if the cause of the exception is from the cache and pass a memory read fault type to the vm subsystem. PR: 262836 Reported by: dch Sponsored by: The FreeBSD Foundation (cherry picked from commit 029c1c4828aab451ba262cd4e2e1d9362cf18b76) sys/arm64/arm64/trap.c | 12 ++++++++++-- 1 file changed, 10 insertions(+), 2 deletions(-) A commit in branch releng/13.1 references this bug: URL: https://cgit.FreeBSD.org/src/commit/?id=b57e321175768358fcae767e2828e04e3ce7fa3d commit b57e321175768358fcae767e2828e04e3ce7fa3d Author: Andrew Turner <andrew@FreeBSD.org> AuthorDate: 2022-03-26 15:59:34 +0000 Commit: Andrew Turner <andrew@FreeBSD.org> CommitDate: 2022-04-01 11:15:08 +0000 Treat cache write as a read in arm64 data faults On arm64 we can ask the hardware to perform cache operations from userspace. These require read permission however when the memory is unmapped the kernel will receive a write exception. Add a check to see if the cause of the exception is from the cache and pass a memory read fault type to the vm subsystem. PR: 262836 Reported by: dch Approved by: re (gjb) Sponsored by: The FreeBSD Foundation (cherry picked from commit 029c1c4828aab451ba262cd4e2e1d9362cf18b76) (cherry picked from commit 004da2d51f8427745c0d1287781d5ba546b19000) sys/arm64/arm64/trap.c | 12 ++++++++++-- 1 file changed, 10 insertions(+), 2 deletions(-) |