Bug 42414

This is output from boot:
========================================================================
i386 Copyright (c) 1992-2002 The FreeBSD Project.
Copyright (c) 1979, 1980, 1983, 1986, 1988, 1989, 1991, 1992, 1993, 1994
        The Regents of the University of California. All rights reserved.
FreeBSD 4.6-STABLE #3: Sat Jul 13 19:35:25 GMT 2002
    root@intel.kn.vutbr.cz:/usr/obj/usr/src/sys/01
Timecounter "i8254"  frequency 1193182 Hz
CPU: Pentium 4 (1794.19-MHz 686-class CPU)
  Origin = "GenuineIntel"  Id = 0xf24  Stepping = 4

Features=0x3febfbff<FPU,VME,DE,PSE,TSC,MSR,PAE,MCE,CX8,APIC,SEP,MTRR,PGE,MCA
,CMOV,PAT,PSE36,CLFLUSH,DTS,ACPI,MMX,FXSR,SSE,SSE2,SS,<b28>,ACC>
real memory  = 1073217536 (1048064K bytes)
avail memory = 1039933440 (1015560K bytes)
Programming 24 pins in IOAPIC #0
IOAPIC #0 intpin 2 -> irq 0
Programming 24 pins in IOAPIC #1
Programming 24 pins in IOAPIC #2
AP #1 (PHY# 6) failed!
panic y/n? [y]
======================================================================
I have flashed the bios to attempt a fix. (Intel bios version 1.14)
This did not fix the problem. I have also attempted Terry Lambert's fixes from freebsd-smp mailinglist as follows:

1)	Change:

	int     mp_ncpus;               /* # of CPUs, including BSP */

	To:

	volatile int     mp_ncpus;      /* # of CPUs, including BSP */

	In mp_machdep.c; it could be that the compiler options
	you are using are causing the value to end up being cached
	in a register in the loop (you would have to examine the
	assembly code to see if this were the case).

2)	In locore.s, change:

	begin:
        /* set up bootstrap stack */
        movl    _proc0paddr,%esp        /* location of in-kernel pages */
        addl    $UPAGES*PAGE_SIZE,%esp  /* bootstrap stack end location */
        xorl    %eax,%eax                       /* mark end of frames */
        movl    %eax,%ebp
        movl    _proc0paddr,%eax
        movl    _IdlePTD, %esi
        movl    %esi,PCB_CR3(%eax)
 
        testl   $CPUID_PGE, R(_cpu_feature)
        jz      1f
        movl    %cr4, %eax
        orl     $CR4_PGE, %eax
        movl    %eax, %cr4
1:

	To:

begin:
        /* set up bootstrap stack */
        movl    _proc0paddr,%esp        /* location of in-kernel pages */
        addl    $UPAGES*PAGE_SIZE,%esp  /* bootstrap stack end location */
        xorl    %eax,%eax                       /* mark end of frames */
        movl    %eax,%ebp
        movl    _proc0paddr,%eax
        movl    _IdlePTD, %esi
        movl    %esi,PCB_CR3(%eax)
 
        testl   $CPUID_PGE, R(_cpu_feature)
        jz      1f
/*
 * DISABLE PGE/GPE on Intel/AMD; eat performance hit on CR3 reload
 * in exchange for non-stale TLB contents on bogus motherboard with
 * bad MMU hardware and/or wiring and/or undocumented hardware bug.
 */
/*        movl    %cr4, %eax     */
/*        orl     $CR4_PGE, %eax */
/*        movl    %eax, %cr4     */
1:

3)	Add "options DISABLE_PSE" to the config file, and rebuild the
	kernel.

YMMV (of course).

-- Terry

None of these fixes worked.

Fix: 

unknown at present
How-To-Repeat: If the kernel is compiled with these options turned up the system panics booting the 2nd CPU:

#options        SMP                     # Symmetric MultiProcessor Kernel
#options        APIC_IO                 # Symmetric (APIC) I/O