This is a VHDL simulator for linux that works without any patching on FreeBSD. It works by compiling VHDL into c++ code, which then can be compiled into a simulation.
This is probably for after the Freeze, but I wanted to get done with the commit.
It has been suggested to me that this might actually belong into
cad (like iverilog). So whoever commits this, please change the
category if you think that devel is the wrong place.
I'll take it.
alepulver 2006-11-05 20:51:06 UTC
FreeBSD ports repository
cad/freehdl Makefile distinfo pkg-descr pkg-plist
The goals of the FreeHDL project are to develop a VHDL simulator that has
a graphical waveform viewer and a source level debugger. It also aims at
VHDL-93 compliancy. The project is at a very early development stage.
Submitted by: lon_kamikaze at gmx.de
Revision Changes Path
1.93 +1 -0 ports/cad/Makefile
1.1 +53 -0 ports/cad/freehdl/Makefile (new)
1.1 +3 -0 ports/cad/freehdl/distinfo (new)
1.1 +5 -0 ports/cad/freehdl/pkg-descr (new)
1.1 +110 -0 ports/cad/freehdl/pkg-plist (new)
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New port added, with minor changes. Thanks!