On a Netra X1, I am trying to upgrade from 8.0 to CURRENT, I get the following when booting the new kernel (GENERIC with no modifications): OK boot -s jumping to kernel entry at 0xc0088000. GDB: no debug ports present KDB: debugger backends: ddb KDB: current backend: ddb Copyright (c) 1992-2010 The FreeBSD Project. Copyright (c) 1979, 1980, 1983, 1986, 1988, 1989, 1991, 1992, 1993, 1994 The Regents of the University of California. All rights reserved. FreeBSD is a registered trademark of The FreeBSD Foundation. FreeBSD 9.0-CURRENT #0 r202962: Mon Jan 25 09:59:53 PST 2010 rfarmer@netra.predatorlabs.net:/obj/usr/src/sys/GENERIC sparc64 WARNING: WITNESS option enabled, expect reduced performance. real memory = 939524096 (896 MB) avail memory = 895680512 (854 MB) cpu0: Sun Microsystems UltraSparc-IIe Processor (500.00 MHz CPU) ispfw: registered firmware <isp_1000> ispfw: registered firmware <isp_1040> ispfw: registered firmware <isp_1040_it> ispfw: registered firmware <isp_1080> ispfw: registered firmware <isp_1080_it> ispfw: registered firmware <isp_12160> ispfw: registered firmware <isp_12160_it> ispfw: registered firmware <isp_2100> ispfw: registered firmware <isp_2200> ispfw: registered firmware <isp_2300> ispfw: registered firmware <isp_2322> ispfw: registered firmware <isp_2400> ispfw: registered firmware <isp_2400_multi> ispfw: registered firmware <isp_2500> ispfw: registered firmware <isp_2500_multi> kbd0 at kbdmux0 nexus0: <Open Firmware Nexus device> pcib0: <U2P UPA-PCI bridge> mem 0x1fe00000000-0x1fe0000ffff,0x1fe01000000-0x1fe010000ff irq 2032,2030,2031,2021 on nexus0 pcib0: Sabre, impl 0, version 0, IGN 0x1f, bus A, 66MHz pcib0: DVMA map: 0x60000000 to 0x63ffffff 8192 entries pcib0: [FILTER] pcib0: [FILTER] pcib0: [GIANT-LOCKED] pcib0: [ITHREAD] pcib0: [FILTER] pci0: <OFW PCI bus> on pcib0 isab0: <PCI-ISA bridge> at device 7.0 on pci0 isa0: <ISA bus> on isab0 pci0: <old, non-VGA display device> at device 3.0 (no driver attached) dc0: <Davicom DM9102A 10/100BaseTX> port 0x10000-0x100ff mem 0-0xff at device 12.0 on pci0 miibus0: <MII bus> on dc0 amphy0: <DM9102 10/100 media interface> PHY 1 on miibus0 amphy0: 10baseT, 10baseT-FDX, 100baseTX, 100baseTX-FDX, auto dc0: Ethernet address: 00:03:ba:0f:df:0d dc0: [ITHREAD] dc1: <Davicom DM9102A 10/100BaseTX> port 0x10100-0x101ff mem 0x2000-0x20ff at device 5.0 on pci0 miibus1: <MII bus> on dc1 amphy1: <DM9102 10/100 media interface> PHY 1 on miibus1 amphy1: 10baseT, 10baseT-FDX, 100baseTX, 100baseTX-FDX, auto dc1: Ethernet address: 00:03:ba:0f:df:0d dc1: [ITHREAD] ohci0: <AcerLabs M5237 (Aladdin-V) USB controller> mem 0x1000000-0x1000fff at device 10.0 on pci0 ohci0: [ITHREAD] usbus0: <AcerLabs M5237 (Aladdin-V) USB controller> on ohci0 atapci0: <AcerLabs M5229 UDMA66 controller> port 0x10200-0x10207,0x10218-0x1021b,0x10210-0x10217,0x10208-0x1020b,0x10220-0x1022f at device 13.0 on pci0 atapci0: [ITHREAD] atapci0: using PIO transfers above 137GB as workaround for 48bit DMA access bug, expect reduced performance ata2: <ATA channel 0> on atapci0 ata2: [ITHREAD] ata3: <ATA channel 1> on atapci0 ata3: [ITHREAD] nexus0: <syscons> type unknown (no driver attached) rtc0: <Real-Time Clock> at port 0x70-0x71 on isa0 uart0: <16550 or compatible> at port 0x3f8-0x3ff irq 43 on isa0 uart0: [FILTER] uart0: console (9600,n,8,1) uart1: <16550 or compatible> at port 0x2e8-0x2ef irq 43 on isa0 uart1: [FILTER] Timecounter "tick" frequency 500000000 Hz quality 1000 Timecounters tick every 1.000 msec usbus0: 12Mbps Full Speed USB v1.0 panic: blockable sleep lock (sleep mutex) system map @ /usr/src/sys/vm/vm_map.c:3532 cpuid = 0 KDB: enter: panic [thread pid 12 tid 100027 ] Stopped at kdb_enter+0x80: ta %xcc, 1 db> bt Tracing pid 12 tid 100027 td 0xfffff800011e6000 panic() at panic+0x20c witness_checkorder() at witness_checkorder+0x108 _mtx_lock_flags() at _mtx_lock_flags+0x110 _vm_map_lock_read() at _vm_map_lock_read+0x1c vm_map_lookup() at vm_map_lookup+0x4c vm_fault() at vm_fault+0x70 trap_pfault() at trap_pfault+0x338 trap() at trap+0x354 -- fast data access mmu miss tar=0xdeadc000 %o7=0xc03c2f54 -- _mtx_lock_spin_failed() at _mtx_lock_spin_failed+0x38 _thread_lock_flags() at _thread_lock_flags+0x20c sleepq_signal() at sleepq_signal+0x1a4 cv_signal() at cv_signal+0x2c _sema_post() at _sema_post+0x50 ata_completed() at ata_completed+0xad4 ata_finish() at ata_finish+0x58 ata_interrupt() at ata_interrupt+0x13c ata_generic_intr() at ata_generic_intr+0x18 intr_event_execute_handlers() at intr_event_execute_handlers+0x150 ithread_loop() at ithread_loop+0xf8 fork_exit() at fork_exit+0x9c fork_trampoline() at fork_trampoline+0x8 db> I'm not familiar with debugging kernel issues so tell me if I need to provide more information.
FYI, this is likely due to r202889. For now you should avoid updating to that revision or beyond. Marius
On Mon, Jan 25, 2010 at 11:44 AM, Marius Strobl <marius@alchemy.franken.de> wrote: > > FYI, this is likely due to r202889. For now you should avoid updating > to that revision or beyond. > Thanks for the quick response! I reverted to rev 202888 and it now boots up fine. -- Rob Farmer > Marius > >
On Mon, Jan 25, 2010 at 09:57:24PM -0800, Rob Farmer wrote: > On Mon, Jan 25, 2010 at 11:44 AM, Marius Strobl > <marius@alchemy.franken.de> wrote: > > > > FYI, this is likely due to r202889. For now you should avoid updating > > to that revision or beyond. > > > Thanks for the quick response! I reverted to rev 202888 and it now > boots up fine. > This is a tentative patch fixing the problem: http://people.freebsd.org/~marius/sparc64_cpu_switch_mtx.diff It seems to work fine but I'm waiting for it to pass a bunch of buildworlds before committing it. Marius
On Tue, Jan 26, 2010 at 10:25:52PM +0100, Marius Strobl wrote: > On Mon, Jan 25, 2010 at 09:57:24PM -0800, Rob Farmer wrote: > > On Mon, Jan 25, 2010 at 11:44 AM, Marius Strobl > > <marius@alchemy.franken.de> wrote: > > > > > > FYI, this is likely due to r202889. For now you should avoid updating > > > to that revision or beyond. > > > > > Thanks for the quick response! I reverted to rev 202888 and it now > > boots up fine. > > > > This is a tentative patch fixing the problem: > http://people.freebsd.org/~marius/sparc64_cpu_swtch_mtx.diff > It seems to work fine but I'm waiting for it to pass a bunch of > buildworlds before committing it. > Hrm, actually it doesn't work properly on SMP. I've to think some more about this ... Marius
State Changed From-To: open->patched Mark patched, a fix was committed as r203185.
On Sun, Jan 31, 2010 at 9:09 AM, <marius@freebsd.org> wrote: > Synopsis: [panic] Netra X1 @ CURRENT panic: blockable sleep lock (sleep mutex) system map > > State-Changed-From-To: open->patched > State-Changed-By: marius > State-Changed-When: Sun Jan 31 17:06:46 UTC 2010 > State-Changed-Why: > Mark patched, a fix was committed as r203185. Fix works for me. Thanks. -- Rob Farmer > > http://www.freebsd.org/cgi/query-pr.cgi?pr=143215 >
Author: marius Date: Sat Feb 6 17:33:39 2010 New Revision: 203554 URL: http://svn.freebsd.org/changeset/base/203554 Log: MFC: r203185 Implement handling of the third argument of cpu_switch(). PR: 143215 Modified: stable/8/sys/sparc64/sparc64/genassym.c stable/8/sys/sparc64/sparc64/swtch.S Directory Properties: stable/8/sys/ (props changed) stable/8/sys/amd64/include/xen/ (props changed) stable/8/sys/cddl/contrib/opensolaris/ (props changed) stable/8/sys/contrib/dev/acpica/ (props changed) stable/8/sys/contrib/pf/ (props changed) stable/8/sys/dev/xen/xenpci/ (props changed) Modified: stable/8/sys/sparc64/sparc64/genassym.c ============================================================================== --- stable/8/sys/sparc64/sparc64/genassym.c Sat Feb 6 17:02:33 2010 (r203553) +++ stable/8/sys/sparc64/sparc64/genassym.c Sat Feb 6 17:33:39 2010 (r203554) @@ -239,6 +239,7 @@ ASSYM(P_VMSPACE, offsetof(struct proc, p ASSYM(TD_FLAGS, offsetof(struct thread, td_flags)); ASSYM(TD_FRAME, offsetof(struct thread, td_frame)); ASSYM(TD_KSTACK, offsetof(struct thread, td_kstack)); +ASSYM(TD_LOCK, offsetof(struct thread, td_lock)); ASSYM(TD_PCB, offsetof(struct thread, td_pcb)); ASSYM(TD_PROC, offsetof(struct thread, td_proc)); ASSYM(TD_MD, offsetof(struct thread, td_md)); Modified: stable/8/sys/sparc64/sparc64/swtch.S ============================================================================== --- stable/8/sys/sparc64/sparc64/swtch.S Sat Feb 6 17:02:33 2010 (r203553) +++ stable/8/sys/sparc64/sparc64/swtch.S Sat Feb 6 17:33:39 2010 (r203554) @@ -46,15 +46,14 @@ ENTRY(cpu_throw) save %sp, -CCFSZ, %sp flushw ba %xcc, .Lsw1 - mov %i1, %i0 + mov %g0, %i2 END(cpu_throw) /* - * void cpu_switch(struct thread *old, struct thread *new) + * void cpu_switch(struct thread *old, struct thread *new, struct mtx *mtx) */ ENTRY(cpu_switch) save %sp, -CCFSZ, %sp - mov %i1, %i0 /* * If the current thread was using floating point in the kernel, save @@ -63,7 +62,7 @@ ENTRY(cpu_switch) */ rd %fprs, %l2 andcc %l2, FPRS_FEF, %g0 - bz,a,pt %xcc, 1f + bz,a,pt %xcc, 1f nop call savefpctx add PCB_REG, PCB_KFP, %o0 @@ -104,24 +103,24 @@ ENTRY(cpu_switch) .Lsw1: #if KTR_COMPILE & KTR_PROC CATR(KTR_PROC, "cpu_switch: new td=%p pc=%#lx fp=%#lx" - , %g1, %g2, %g3, 7, 8, 9) - stx %i0, [%g1 + KTR_PARM1] - ldx [%i0 + TD_PCB], %g2 + , %g1, %g2, %g3, 8, 9, 10) + stx %i1, [%g1 + KTR_PARM1] + ldx [%i1 + TD_PCB], %g2 ldx [%g2 + PCB_PC], %g3 stx %g3, [%g1 + KTR_PARM2] ldx [%g2 + PCB_SP], %g3 stx %g3, [%g1 + KTR_PARM3] -9: +10: #endif - ldx [%i0 + TD_PCB], %i1 + ldx [%i1 + TD_PCB], %l0 - stx %i0, [PCPU(CURTHREAD)] - stx %i1, [PCPU(CURPCB)] + stx %i1, [PCPU(CURTHREAD)] + stx %l0, [PCPU(CURPCB)] wrpr %g0, PSTATE_NORMAL, %pstate - mov %i1, PCB_REG + mov %l0, PCB_REG wrpr %g0, PSTATE_ALT, %pstate - mov %i1, PCB_REG + mov %l0, PCB_REG wrpr %g0, PSTATE_KERNEL, %pstate ldx [PCB_REG + PCB_SP], %fp @@ -132,24 +131,24 @@ ENTRY(cpu_switch) * Point to the pmaps of the new process, and of the last non-kernel * process to run. */ - ldx [%i0 + TD_PROC], %i2 + ldx [%i1 + TD_PROC], %l1 ldx [PCPU(PMAP)], %l2 - ldx [%i2 + P_VMSPACE], %i5 - add %i5, VM_PMAP, %i2 + ldx [%l1 + P_VMSPACE], %i5 + add %i5, VM_PMAP, %l1 #if KTR_COMPILE & KTR_PROC CATR(KTR_PROC, "cpu_switch: new pmap=%p old pmap=%p" - , %g1, %g2, %g3, 7, 8, 9) - stx %i2, [%g1 + KTR_PARM1] + , %g1, %g2, %g3, 8, 9, 10) + stx %l1, [%g1 + KTR_PARM1] stx %l2, [%g1 + KTR_PARM2] -9: +10: #endif /* * If they are the same we are done. */ - cmp %l2, %i2 - be,a,pn %xcc, 5f + cmp %l2, %l1 + be,a,pn %xcc, 7f nop /* @@ -158,21 +157,20 @@ ENTRY(cpu_switch) */ SET(vmspace0, %i4, %i3) cmp %i5, %i3 - be,a,pn %xcc, 5f + be,a,pn %xcc, 7f nop /* * If there was no non-kernel pmap, don't try to deactivate it. */ - brz,a,pn %l2, 3f - nop + brz,pn %l2, 3f + lduw [PCPU(CPUMASK)], %l4 /* * Mark the pmap of the last non-kernel vmspace to run as no longer * active on this CPU. */ lduw [%l2 + PM_ACTIVE], %l3 - lduw [PCPU(CPUMASK)], %l4 andn %l3, %l4, %l3 stw %l3, [%l2 + PM_ACTIVE] @@ -185,25 +183,28 @@ ENTRY(cpu_switch) mov -1, %l5 stw %l5, [%l3 + %l4] +3: cmp %i2, %g0 + be,pn %xcc, 4f + lduw [PCPU(TLB_CTX_MAX)], %i4 + stx %i2, [%i0 + TD_LOCK] + /* * Find a new TLB context. If we've run out we have to flush all * user mappings from the TLB and reset the context numbers. */ -3: lduw [PCPU(TLB_CTX)], %i3 - lduw [PCPU(TLB_CTX_MAX)], %i4 +4: lduw [PCPU(TLB_CTX)], %i3 cmp %i3, %i4 - bne,a,pt %xcc, 4f + bne,a,pt %xcc, 5f nop SET(tlb_flush_user, %i5, %i4) ldx [%i4], %i5 call %i5 - nop - lduw [PCPU(TLB_CTX_MIN)], %i3 + lduw [PCPU(TLB_CTX_MIN)], %i3 /* * Advance next free context. */ -4: add %i3, 1, %i4 +5: add %i3, 1, %i4 stw %i4, [PCPU(TLB_CTX)] /* @@ -211,36 +212,36 @@ ENTRY(cpu_switch) */ lduw [PCPU(CPUID)], %i4 sllx %i4, INT_SHIFT, %i4 - add %i2, PM_CONTEXT, %i5 + add %l1, PM_CONTEXT, %i5 stw %i3, [%i4 + %i5] /* * Mark the pmap as active on this CPU. */ - lduw [%i2 + PM_ACTIVE], %i4 + lduw [%l1 + PM_ACTIVE], %i4 lduw [PCPU(CPUMASK)], %i5 or %i4, %i5, %i4 - stw %i4, [%i2 + PM_ACTIVE] + stw %i4, [%l1 + PM_ACTIVE] /* * Make note of the change in pmap. */ - stx %i2, [PCPU(PMAP)] + stx %l1, [PCPU(PMAP)] /* * Fiddle the hardware bits. Set the TSB registers and install the * new context number in the CPU. */ - ldx [%i2 + PM_TSB], %i4 + ldx [%l1 + PM_TSB], %i4 mov AA_DMMU_TSB, %i5 stxa %i4, [%i5] ASI_DMMU mov AA_IMMU_TSB, %i5 stxa %i4, [%i5] ASI_IMMU setx TLB_PCXR_PGSZ_MASK, %i5, %i4 mov AA_DMMU_PCXR, %i5 - ldxa [%i5] ASI_DMMU, %i2 - and %i2, %i4, %i2 - or %i3, %i2, %i3 + ldxa [%i5] ASI_DMMU, %l1 + and %l1, %i4, %l1 + or %i3, %l1, %i3 sethi %hi(KERNBASE), %i4 stxa %i3, [%i5] ASI_DMMU flush %i4 @@ -248,7 +249,15 @@ ENTRY(cpu_switch) /* * Done, return and load the new process's window from the stack. */ -5: ret + +6: ret + restore + +7: cmp %i2, %g0 + be,a,pn %xcc, 6b + nop + stx %i2, [%i0 + TD_LOCK] + ret restore END(cpu_switch) _______________________________________________ svn-src-all@freebsd.org mailing list http://lists.freebsd.org/mailman/listinfo/svn-src-all To unsubscribe, send any mail to "svn-src-all-unsubscribe@freebsd.org"
Author: marius Date: Sat Feb 6 21:12:27 2010 New Revision: 203573 URL: http://svn.freebsd.org/changeset/base/203573 Log: MFC: r203185 Implement handling of the third argument of cpu_switch(). PR: 143215 Approved by: re (kib) Modified: stable/7/sys/sparc64/sparc64/genassym.c stable/7/sys/sparc64/sparc64/swtch.S Directory Properties: stable/7/sys/ (props changed) stable/7/sys/cddl/contrib/opensolaris/ (props changed) stable/7/sys/contrib/dev/acpica/ (props changed) stable/7/sys/contrib/pf/ (props changed) Modified: stable/7/sys/sparc64/sparc64/genassym.c ============================================================================== --- stable/7/sys/sparc64/sparc64/genassym.c Sat Feb 6 20:46:14 2010 (r203572) +++ stable/7/sys/sparc64/sparc64/genassym.c Sat Feb 6 21:12:27 2010 (r203573) @@ -239,6 +239,7 @@ ASSYM(P_VMSPACE, offsetof(struct proc, p ASSYM(TD_FLAGS, offsetof(struct thread, td_flags)); ASSYM(TD_FRAME, offsetof(struct thread, td_frame)); ASSYM(TD_KSTACK, offsetof(struct thread, td_kstack)); +ASSYM(TD_LOCK, offsetof(struct thread, td_lock)); ASSYM(TD_PCB, offsetof(struct thread, td_pcb)); ASSYM(TD_PROC, offsetof(struct thread, td_proc)); ASSYM(TD_MD, offsetof(struct thread, td_md)); Modified: stable/7/sys/sparc64/sparc64/swtch.S ============================================================================== --- stable/7/sys/sparc64/sparc64/swtch.S Sat Feb 6 20:46:14 2010 (r203572) +++ stable/7/sys/sparc64/sparc64/swtch.S Sat Feb 6 21:12:27 2010 (r203573) @@ -46,15 +46,14 @@ ENTRY(cpu_throw) save %sp, -CCFSZ, %sp flushw ba %xcc, .Lsw1 - mov %i1, %i0 + mov %g0, %i2 END(cpu_throw) /* - * void cpu_switch(struct thread *old, struct thread *new) + * void cpu_switch(struct thread *old, struct thread *new, struct mtx *mtx) */ ENTRY(cpu_switch) save %sp, -CCFSZ, %sp - mov %i1, %i0 /* * If the current thread was using floating point in the kernel, save @@ -63,7 +62,7 @@ ENTRY(cpu_switch) */ rd %fprs, %l2 andcc %l2, FPRS_FEF, %g0 - bz,a,pt %xcc, 1f + bz,a,pt %xcc, 1f nop call savefpctx add PCB_REG, PCB_KFP, %o0 @@ -104,24 +103,24 @@ ENTRY(cpu_switch) .Lsw1: #if KTR_COMPILE & KTR_PROC CATR(KTR_PROC, "cpu_switch: new td=%p pc=%#lx fp=%#lx" - , %g1, %g2, %g3, 7, 8, 9) - stx %i0, [%g1 + KTR_PARM1] - ldx [%i0 + TD_PCB], %g2 + , %g1, %g2, %g3, 8, 9, 10) + stx %i1, [%g1 + KTR_PARM1] + ldx [%i1 + TD_PCB], %g2 ldx [%g2 + PCB_PC], %g3 stx %g3, [%g1 + KTR_PARM2] ldx [%g2 + PCB_SP], %g3 stx %g3, [%g1 + KTR_PARM3] -9: +10: #endif - ldx [%i0 + TD_PCB], %i1 + ldx [%i1 + TD_PCB], %l0 - stx %i0, [PCPU(CURTHREAD)] - stx %i1, [PCPU(CURPCB)] + stx %i1, [PCPU(CURTHREAD)] + stx %l0, [PCPU(CURPCB)] wrpr %g0, PSTATE_NORMAL, %pstate - mov %i1, PCB_REG + mov %l0, PCB_REG wrpr %g0, PSTATE_ALT, %pstate - mov %i1, PCB_REG + mov %l0, PCB_REG wrpr %g0, PSTATE_KERNEL, %pstate ldx [PCB_REG + PCB_SP], %fp @@ -132,24 +131,24 @@ ENTRY(cpu_switch) * Point to the pmaps of the new process, and of the last non-kernel * process to run. */ - ldx [%i0 + TD_PROC], %i2 + ldx [%i1 + TD_PROC], %l1 ldx [PCPU(PMAP)], %l2 - ldx [%i2 + P_VMSPACE], %i5 - add %i5, VM_PMAP, %i2 + ldx [%l1 + P_VMSPACE], %i5 + add %i5, VM_PMAP, %l1 #if KTR_COMPILE & KTR_PROC CATR(KTR_PROC, "cpu_switch: new pmap=%p old pmap=%p" - , %g1, %g2, %g3, 7, 8, 9) - stx %i2, [%g1 + KTR_PARM1] + , %g1, %g2, %g3, 8, 9, 10) + stx %l1, [%g1 + KTR_PARM1] stx %l2, [%g1 + KTR_PARM2] -9: +10: #endif /* * If they are the same we are done. */ - cmp %l2, %i2 - be,a,pn %xcc, 5f + cmp %l2, %l1 + be,a,pn %xcc, 7f nop /* @@ -158,21 +157,20 @@ ENTRY(cpu_switch) */ SET(vmspace0, %i4, %i3) cmp %i5, %i3 - be,a,pn %xcc, 5f + be,a,pn %xcc, 7f nop /* * If there was no non-kernel pmap, don't try to deactivate it. */ - brz,a,pn %l2, 3f - nop + brz,pn %l2, 3f + lduw [PCPU(CPUMASK)], %l4 /* * Mark the pmap of the last non-kernel vmspace to run as no longer * active on this CPU. */ lduw [%l2 + PM_ACTIVE], %l3 - lduw [PCPU(CPUMASK)], %l4 andn %l3, %l4, %l3 stw %l3, [%l2 + PM_ACTIVE] @@ -185,25 +183,28 @@ ENTRY(cpu_switch) mov -1, %l5 stw %l5, [%l3 + %l4] +3: cmp %i2, %g0 + be,pn %xcc, 4f + lduw [PCPU(TLB_CTX_MAX)], %i4 + stx %i2, [%i0 + TD_LOCK] + /* * Find a new TLB context. If we've run out we have to flush all * user mappings from the TLB and reset the context numbers. */ -3: lduw [PCPU(TLB_CTX)], %i3 - lduw [PCPU(TLB_CTX_MAX)], %i4 +4: lduw [PCPU(TLB_CTX)], %i3 cmp %i3, %i4 - bne,a,pt %xcc, 4f + bne,a,pt %xcc, 5f nop SET(tlb_flush_user, %i5, %i4) ldx [%i4], %i5 call %i5 - nop - lduw [PCPU(TLB_CTX_MIN)], %i3 + lduw [PCPU(TLB_CTX_MIN)], %i3 /* * Advance next free context. */ -4: add %i3, 1, %i4 +5: add %i3, 1, %i4 stw %i4, [PCPU(TLB_CTX)] /* @@ -211,36 +212,36 @@ ENTRY(cpu_switch) */ lduw [PCPU(CPUID)], %i4 sllx %i4, INT_SHIFT, %i4 - add %i2, PM_CONTEXT, %i5 + add %l1, PM_CONTEXT, %i5 stw %i3, [%i4 + %i5] /* * Mark the pmap as active on this CPU. */ - lduw [%i2 + PM_ACTIVE], %i4 + lduw [%l1 + PM_ACTIVE], %i4 lduw [PCPU(CPUMASK)], %i5 or %i4, %i5, %i4 - stw %i4, [%i2 + PM_ACTIVE] + stw %i4, [%l1 + PM_ACTIVE] /* * Make note of the change in pmap. */ - stx %i2, [PCPU(PMAP)] + stx %l1, [PCPU(PMAP)] /* * Fiddle the hardware bits. Set the TSB registers and install the * new context number in the CPU. */ - ldx [%i2 + PM_TSB], %i4 + ldx [%l1 + PM_TSB], %i4 mov AA_DMMU_TSB, %i5 stxa %i4, [%i5] ASI_DMMU mov AA_IMMU_TSB, %i5 stxa %i4, [%i5] ASI_IMMU setx TLB_PCXR_PGSZ_MASK, %i5, %i4 mov AA_DMMU_PCXR, %i5 - ldxa [%i5] ASI_DMMU, %i2 - and %i2, %i4, %i2 - or %i3, %i2, %i3 + ldxa [%i5] ASI_DMMU, %l1 + and %l1, %i4, %l1 + or %i3, %l1, %i3 sethi %hi(KERNBASE), %i4 stxa %i3, [%i5] ASI_DMMU flush %i4 @@ -248,7 +249,15 @@ ENTRY(cpu_switch) /* * Done, return and load the new process's window from the stack. */ -5: ret + +6: ret + restore + +7: cmp %i2, %g0 + be,a,pn %xcc, 6b + nop + stx %i2, [%i0 + TD_LOCK] + ret restore END(cpu_switch) _______________________________________________ svn-src-all@freebsd.org mailing list http://lists.freebsd.org/mailman/listinfo/svn-src-all To unsubscribe, send any mail to "svn-src-all-unsubscribe@freebsd.org"
State Changed From-To: patched->closed close