Registers used in mge driver are valid for marvell kirkwood family soc, but they are not valid for armada xp and armada 370 socs.
As you can see in marvell documentation - registers are changed on armada 370 and armada xp.
kirkwood:
http://www.marvell.com/embedded-processors/kirkwood/assets/FS_88F6180_9x_6281_OpenSource.pdf
armada xp (same for armada 370):
http://www.marvell.com/embedded-processors/armada-xp/assets/ARMADA-XP-Functional-SpecDatasheet.pdf

So mge driver doesn't work in current distribution on armada xp and armada 370 SoCs.

So here is my diff.

diff --git a/sys/dev/mge/if_mge.c b/sys/dev/mge/if_mge.c
index c35dd04..e2305b8 100644
--- a/sys/dev/mge/if_mge.c
+++ b/sys/dev/mge/if_mge.c
@@ -1654,11 +1654,11 @@ mge_stop(struct mge_softc *sc)
        }
 
        /* Wait for end of transmission */
-       count = 0x100000;
-       while (count--) {
-               reg_val = MGE_READ(sc, MGE_PORT_STATUS);
-               if ( !(reg_val & MGE_STATUS_TX_IN_PROG) &&
-                   (reg_val & MGE_STATUS_TX_FIFO_EMPTY))
+       count = 0x100001;
+       while (--count) {
+               reg_val = MGE_READ(sc, MGE_ETH_PORT_STATUS);
+               if ( !(reg_val & MGE_ETH_STATUS_TX_IN_PROG) && 
+                    (reg_val & MGE_ETH_STATUS_TX_FIFO_EMPTY))
                        break;
                DELAY(100);
        }
diff --git a/sys/dev/mge/if_mgevar.h b/sys/dev/mge/if_mgevar.h
index 0ab28bf..7cfd20e 100644
--- a/sys/dev/mge/if_mgevar.h
+++ b/sys/dev/mge/if_mgevar.h
@@ -228,14 +228,21 @@ struct mge_softc {
 #define PORT_SERIAL_GMII_SPEED_1000    (1 << 23)
 #define PORT_SERIAL_MII_SPEED_100      (1 << 24)
 
-#define MGE_PORT_STATUS                        0x444
-#define MGE_STATUS_LINKUP              (1 << 1)
-#define MGE_STATUS_FULL_DUPLEX         (1 << 2)
-#define MGE_STATUS_FLOW_CONTROL                (1 << 3)
-#define MGE_STATUS_1000MB              (1 << 4)
-#define MGE_STATUS_100MB               (1 << 5)
-#define MGE_STATUS_TX_IN_PROG          (1 << 7)
-#define MGE_STATUS_TX_FIFO_EMPTY       (1 << 10)
+#define MGE_ETH_PORT_STATUS            0x444
+#define MGE_ETH_STATUS_RX_FIFO_EMPTY    (1 << 16)
+#define MGE_ETH_STATUS_TX_IN_PROG      (1 << 0)
+#define MGE_ETH_STATUS_TX_FIFO_EMPTY    (1 << 8)
+
+#define MGE_PORT_STATUS                        0xc10
+#define MGE_STATUS_LINKUP              (1 << 0)
+#define MGE_STATUS_GMII_SPEED          (1 << 1) /* 0 = 10/100 Mbps: Port speed is 10 Mbps or 100 Mbps according to <MIISpeed>. 1 = 1000 Mbps: Port speed is 1000 Mbps. */
+#define MGE_STATUS_MII_SPEED           (1 << 2) /* 0 = 10: Port speed is 10 Mbps. 1 = 100: Port speed is 100 Mbps. */
+#define MGE_STATUS_FULL_DUPLEX         (1 << 3) /* 0 = half-duplex: Port is in half-duplex mode. 1 = full-duplex: Port is in full-duplex mode. */
+#define MGE_STATUS_RX_FLOW_CONTROL     (1 << 4)
+#define MGE_STATUS_TX_FLOW_CONTROL     (1 << 5)
+#define MGE_STATUS_RX_PAUSE            (1 << 6)
+#define MGE_STATUS_TX_PAUSE            (1 << 7)
+#define MGE_STATUS_AUTONEG_DONE                (1 << 11)
 
 #define MGE_TX_QUEUE_CMD       0x448
 #define MGE_ENABLE_TXQ         (1 << 0)


Maybe we need to check soc id in header file and alter definition for registers? 
Can you add my changes to make possible usage of onchip ethernet controller on armada xp soc?