Created attachment 159354 [details]
The RT5350 is a MIPS SoC by RaLink.
The SoC is pretty similar to the already in-tree RT305X.
This patch adds :
- Support for the RT5350F
- Selection of SoC in kernel config
- Add kernel config RT5350_BASE and corresponding hint files with sane defaults.
- Add kernel config for the Olimex RT5350 EVB and hints files
- Configuration of GPIO via pinmask/pinon and function_set/fonction_clear hint value.
- Add a pinin hint value to configure a GPIO as input at boot.
Cool. I'll look at committing this soon.
Question: why'd you remove GPIO_BIT_SET/GPIO_BIT_CLR? You're directly calling the bus_read/bus_write code now. Is this intentional?
Does this also work with RT305x?
The macros were removed cause they didn't work and I was too lazy at the time to check what was the problem. And, of course, after I forgot to correct and use them.
I don't have any RT305x hardware to test so I don't know if I broke something or not.
ok, let's go see if I can find some RT305x and RT5350 hardware to test with.
(In reply to Emmanuel Vadot from comment #0)
Thanks for working on it. I have a diff that returns the clock frequency
from rt305x_clock_freq() instead of a hard coded PLATFORM_COUNTER_FREQ and
supports RAM size detection.
Could you test it? Thanks.
I'll try that next week.
Do you have any RT305x hardware to test if my patch have any regression ?
Mine is Hame MPR-A1. I haven't had time to test your gpio driver yet.
BTW, does rt work?
If rt == it == gpio, yes the gpios are working.
The only thing not working on the board now are the wifi chipset and the ethernet switch. I need to find some time to work on it.
Sorry, I mean the ethernet adapter (sys/dev/rt).
For bugs matching the following conditions:
- Status == In Progress
- Assignee == "bugs@FreeBSD.org"
- Last Modified Year <= 2017
- Set Status to "Open"