Bug 231024 - want early microcode loading for AMD
Summary: want early microcode loading for AMD
Status: New
Alias: None
Product: Base System
Classification: Unclassified
Component: kern (show other bugs)
Version: CURRENT
Hardware: Any Any
: --- Affects Some People
Assignee: Mark Johnston
URL:
Keywords:
Depends on:
Blocks: 231027
  Show dependency treegraph
 
Reported: 2018-08-30 14:52 UTC by Mark Johnston
Modified: 2019-07-11 14:26 UTC (History)
3 users (show)

See Also:


Attachments

Note You need to log in before you can comment on or make changes to this bug.
Description Mark Johnston freebsd_committer 2018-08-30 14:52:59 UTC
The current early microcode loading code only supports Intel CPUs.  We want AMD support as well.
Comment 1 Conrad Meyer freebsd_committer 2018-08-30 16:10:07 UTC
So I know earlier I said the AMD microcode updates for 17h appeared to only support Epyc models, and I believe that was true at the time.  But the current microcodes support Zen1 consumers CPUs (800f11):

amd10h_update: installed_cpu: 0x600f20
amd10h_update: installed_cpu: 0x610f01
amd10h_update: installed_cpu: 0x700f01
amd10h_update: installed_cpu: 0x800f12
amd10h_update: installed_cpu: 0x800f11

TR1 and Ryzen1 are 800f11 ("ZP-B1"), and Epyc1 is 800f12 ("ZP-B2").  (Zeppelin steppings 1 and 2.)

Per the errata document for 17h models 00-0Fh, 800f82 (not covered by this update file) would be "PiR-B2" (Pinnacle Ridge, stepping 2).

(The 700f01 appears to be family 16h APUs, while the 610f01 number is a 15h APU and 600f20 is a 15h non-APU?  It's unclear what these are doing in the 17h microcode file.)