Bug 234040 - Failing tests: lib.msun.{cbrt_test.cbrtl_powl,trig_test.reduction} after clang700-import merge
Summary: Failing tests: lib.msun.{cbrt_test.cbrtl_powl,trig_test.reduction} after clan...
Status: Closed FIXED
Alias: None
Product: Base System
Classification: Unclassified
Component: bin (show other bugs)
Version: CURRENT
Hardware: Any Any
: --- Affects Some People
Assignee: Dimitry Andric
URL:
Keywords:
Depends on:
Blocks: 230240
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Reported: 2018-12-15 19:34 UTC by Li-Wen Hsu
Modified: 2019-02-16 19:49 UTC (History)
2 users (show)

See Also:


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Comment 1 Dimitry Andric freebsd_committer 2018-12-16 22:18:17 UTC
I'm taking a look at this.  Bisection shows that the following upstream revision breaks those particular tests:

https://reviews.llvm.org/rL329339

"[X86] Remove some InstRWs for plain store instructions on Sandy Bridge."

Not sure yet why this particular change causes the test results to be different.
Comment 2 Dimitry Andric freebsd_committer 2019-01-02 19:20:43 UTC
Created upstream bug https://bugs.llvm.org/show_bug.cgi?id=40206
Comment 3 commit-hook freebsd_committer 2019-01-25 18:48:43 UTC
A commit references this bug:

Author: lwhsu
Date: Fri Jan 25 18:48:21 UTC 2019
New revision: 343442
URL: https://svnweb.freebsd.org/changeset/base/343442

Log:
  Temporarily mark lib.msun.{cbrt_test.cbrtl_powl,trig_test.reduction}
  expected failure after clang700-import merge

  PR:		234040
  Reviewed by:	ngie, markj
  Approved by:	markj (mentor)
  Sponsored by:	The FreeBSD Foundation
  Differential Revision:	https://reviews.freebsd.org/D18938

Changes:
  head/contrib/netbsd-tests/lib/libm/t_cbrt.c
  head/lib/msun/tests/trig_test.c
Comment 4 commit-hook freebsd_committer 2019-02-08 18:25:08 UTC
A commit references this bug:

Author: dim
Date: Fri Feb  8 18:24:54 UTC 2019
New revision: 343916
URL: https://svnweb.freebsd.org/changeset/base/343916

Log:
  Pull in r352607 from upstream llvm trunk (by Craig Topper):

    [X86] Add FPSW as a Def on some FP instructions that were missing it.

  Pull in r353141 from upstream llvm trunk (by Craig Topper):

    [X86] Connect the default fpsr and dirflag clobbers in inline
    assembly to the registers we have defined for them.

    Summary:
    We don't currently map these constraints to physical register numbers
    so they don't make it to the MachineIR representation of inline
    assembly.

    This could have problems for proper dependency tracking in the
    machine schedulers though I don't have a test case that shows that.

    Reviewers: rnk

    Reviewed By: rnk

    Subscribers: eraman, llvm-commits

    Tags: #llvm

    Differential Revision: https://reviews.llvm.org/D57641

  Pull in r353489 from upstream llvm trunk (by Craig Topper):

    [X86] Add FPCW as a register and start using it as an implicit use on
    floating point instructions.

    Summary:
    FPCW contains the rounding mode control which we manipulate to
    implement fp to integer conversion by changing the roudning mode,
    storing the value to the stack, and then changing the rounding mode
    back. Because we didn't model FPCW and its dependency chain, other
    instructions could be scheduled into the middle of the sequence.

    This patch introduces the register and adds it as an implciit def of
    FLDCW and implicit use of the FP binary arithmetic instructions and
    store instructions. There are more instructions that need to be
    updated, but this is a good start. I believe this fixes at least the
    reduced test case from PR40529.

    Reviewers: RKSimon, spatel, rnk, efriedma, andrew.w.kaylor

    Subscribers: dim, llvm-commits

    Tags: #llvm

    Differential Revision: https://reviews.llvm.org/D57735

  These should fix a problem in clang 7.0 where it would sometimes emit
  long double floating point instructions in a slightly wrong order,
  leading to failures in our libm tests.  In particular, the cbrt_test
  test case 'cbrtl_powl' and the trig_test test case 'reduction'.

  Also bump __FreeBSD_cc_version, to be able to detect this in our test
  suite.

  Reported by:    lwhsu
  PR:		234040
  Upstream PR:	https://bugs.llvm.org/show_bug.cgi?id=40206
  MFC after:	1 week

Changes:
  head/contrib/llvm/lib/Target/X86/X86ISelLowering.cpp
  head/contrib/llvm/lib/Target/X86/X86InstrFPStack.td
  head/contrib/llvm/lib/Target/X86/X86RegisterInfo.cpp
  head/contrib/llvm/lib/Target/X86/X86RegisterInfo.td
  head/lib/clang/freebsd_cc_version.h
Comment 5 commit-hook freebsd_committer 2019-02-08 18:32:16 UTC
A commit references this bug:

Author: dim
Date: Fri Feb  8 18:31:55 UTC 2019
New revision: 343917
URL: https://svnweb.freebsd.org/changeset/base/343917

Log:
  Amend r343442, by only expecting the lib.msun.cbrt_test.cbrtl_powl and
  trig_test.reduction test cases to fail, if the fixes from r343916 have
  not yet been applied to the base compiler.

  Reported by:    lwhsu
  PR:		234040
  Upstream PR:	https://bugs.llvm.org/show_bug.cgi?id=40206
  MFC after:	1 week

Changes:
  head/contrib/netbsd-tests/lib/libm/t_cbrt.c
  head/lib/msun/tests/trig_test.c
Comment 6 commit-hook freebsd_committer 2019-02-10 12:46:27 UTC
A commit references this bug:

Author: dim
Date: Sun Feb 10 12:45:36 UTC 2019
New revision: 343955
URL: https://svnweb.freebsd.org/changeset/base/343955

Log:
  Pull in r352607 from upstream llvm trunk (by Craig Topper):

    [X86] Add FPSW as a Def on some FP instructions that were missing it.

  Pull in r352608 from upstream llvm trunk (by Craig Topper):

    [X86] Remove a couple places where we unnecessarily pass 0 to the
    EmitPriority of some FP instruction aliases. NFC

    As far as I can tell we already won't emit these aliases due to an
    operand count check in the tablegen code. Removing these because I
    couldn't make sense of the inconsistency between fadd and fmul from
    reading the code.

    I checked the AsmMatcher and AsmWriter files before and after this
    change and there were no differences.

  Pull in r353015 from upstream llvm trunk (by Craig Topper):

    [X86] Print %st(0) as %st when its implicit to the instruction.
    Continue printing it as %st(0) when its encoded in the instruction.

    This is a step back from the change I made in r352985. This appears
    to be more consistent with gcc and objdump behavior.

  Pull in r353061 from upstream llvm trunk (by Craig Topper):

    [X86] Print all register forms of x87 fadd/fsub/fdiv/fmul as having
    two arguments where on is %st.

    All of these instructions consume one encoded register and the other
    register is %st. They either write the result to %st or the encoded
    register. Previously we printed both arguments when the encoded
    register was written. And we printed one argument when the result was
    written to %st. For the stack popping forms the encoded register is
    always the destination and we didn't print both operands. This was
    inconsistent with gcc and objdump and just makes the output assembly
    code harder to read.

    This patch changes things to always print both operands making us
    consistent with gcc and objdump. The parser should still be able to
    handle the single register forms just as it did before. This also
    matches the GNU assembler behavior.

  Pull in r353141 from upstream llvm trunk (by Craig Topper):

    [X86] Connect the default fpsr and dirflag clobbers in inline
    assembly to the registers we have defined for them.

    Summary:
    We don't currently map these constraints to physical register numbers
    so they don't make it to the MachineIR representation of inline
    assembly.

    This could have problems for proper dependency tracking in the
    machine schedulers though I don't have a test case that shows that.

    Reviewers: rnk

    Reviewed By: rnk

    Subscribers: eraman, llvm-commits

    Tags: #llvm

    Differential Revision: https://reviews.llvm.org/D57641

  Pull in r353489 from upstream llvm trunk (by Craig Topper):

    [X86] Add FPCW as a register and start using it as an implicit use on
    floating point instructions.

    Summary:
    FPCW contains the rounding mode control which we manipulate to
    implement fp to integer conversion by changing the roudning mode,
    storing the value to the stack, and then changing the rounding mode
    back. Because we didn't model FPCW and its dependency chain, other
    instructions could be scheduled into the middle of the sequence.

    This patch introduces the register and adds it as an implciit def of
    FLDCW and implicit use of the FP binary arithmetic instructions and
    store instructions. There are more instructions that need to be
    updated, but this is a good start. I believe this fixes at least the
    reduced test case from PR40529.

    Reviewers: RKSimon, spatel, rnk, efriedma, andrew.w.kaylor

    Subscribers: dim, llvm-commits

    Tags: #llvm

    Differential Revision: https://reviews.llvm.org/D57735

  These should fix a problem in clang 7.0 where it would sometimes emit
  long double floating point instructions in a slightly wrong order,
  leading to failures in our libm tests.  In particular, the cbrt_test
  test case 'cbrtl_powl' and the trig_test test case 'reduction'.

  Reported by:	lwhsu
  PR:		234040
  Upstream PR:	https://bugs.llvm.org/show_bug.cgi?id=40206

Changes:
  projects/clang800-import/contrib/llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
  projects/clang800-import/contrib/llvm/lib/Target/X86/InstPrinter/X86ATTInstPrinter.cpp
  projects/clang800-import/contrib/llvm/lib/Target/X86/InstPrinter/X86ATTInstPrinter.h
  projects/clang800-import/contrib/llvm/lib/Target/X86/InstPrinter/X86IntelInstPrinter.cpp
  projects/clang800-import/contrib/llvm/lib/Target/X86/InstPrinter/X86IntelInstPrinter.h
  projects/clang800-import/contrib/llvm/lib/Target/X86/X86ISelLowering.cpp
  projects/clang800-import/contrib/llvm/lib/Target/X86/X86InstrFPStack.td
  projects/clang800-import/contrib/llvm/lib/Target/X86/X86InstrInfo.td
  projects/clang800-import/contrib/llvm/lib/Target/X86/X86RegisterInfo.cpp
  projects/clang800-import/contrib/llvm/lib/Target/X86/X86RegisterInfo.td
  projects/clang800-import/contrib/llvm/utils/TableGen/X86RecognizableInstr.cpp