Bug 248086 - cad/verilator: Update 4.036 -> 4.038
Summary: cad/verilator: Update 4.036 -> 4.038
Status: Closed FIXED
Alias: None
Product: Ports & Packages
Classification: Unclassified
Component: Individual Port(s) (show other bugs)
Version: Latest
Hardware: Any Any
: --- Affects Only Me
Assignee: Yuri Victorovich
URL:
Keywords: buildisok
Depends on:
Blocks:
 
Reported: 2020-07-18 22:42 UTC by Yuri Victorovich
Modified: 2020-07-18 23:02 UTC (History)
1 user (show)

See Also:
kevinz5000: maintainer-feedback+


Attachments
patch (2.02 KB, patch)
2020-07-18 22:42 UTC, Yuri Victorovich
no flags Details | Diff

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Description Yuri Victorovich freebsd_committer 2020-07-18 22:42:28 UTC
Created attachment 216559 [details]
patch
Comment 1 Kevin Zheng 2020-07-18 22:43:37 UTC
Approved. Good find with the clang-format fix!
Comment 2 Yuri Victorovich freebsd_committer 2020-07-18 23:01:17 UTC
Committed.

Thanks for a quick approval!
Comment 3 commit-hook freebsd_committer 2020-07-18 23:01:40 UTC
A commit references this bug:

Author: yuri
Date: Sat Jul 18 23:00:45 UTC 2020
New revision: 542536
URL: https://svnweb.freebsd.org/changeset/ports/542536

Log:
  cad/verilator: Update 4.036 -> 4.038

  PR:		248086
  Approved by:	kevinz5000@gmail.com (maintainer)

Changes:
  head/cad/verilator/Makefile
  head/cad/verilator/distinfo
  head/cad/verilator/files/patch-src-verilog.y
Comment 4 Automation User 2020-07-18 23:02:30 UTC
Build info is available at https://gitlab.com/swills/freebsd-ports/pipelines/168180758