The fix to bug#248155 forces the build of qt5-3d to generate AVX2 instructions even on systems that do not support it. On a Q9650 penryn (which does not support AVX2), with or without CPUTYPE set to core2: Use SSE2 instructions .................. yes Use AVX2 instructions .................. yes results during configuration. As a result, use of qt5-3d after building it on a pre-AVX2 machine results in failure via SIGILL. This includes attempting to build the dependent port pyside2, and is the source of bug#255753. The problem is related to comment#6 in bug#248155: "Yeah, someone should invest some time in why the AVX2 detection fails." However, until that problem is fixed it would be better to tolerate the diminished performance resulting from underestimating CPU capabilities than the cryptic failure of dependent systems to run at all. Perhaps in the meanwhile the use of AVX2 instructions should be made a port configuration option? Thanks!
Fixed by revision of fix to bug#255753.