Target is i3-540 (westmere) Build machine is E5-2660v3 (haswell) - but that's not relevant. Result is this: # ./xz < /dev/zero > /dev/null Illegal instruction (core dumped) Wikipedia says that the i3-540 is westmere. The compiler itself, when configured CPUTYPE?=native, says that the chip is westmere (but it shows a lot of more detailed flags in addition). But when then compiling for cpu westmere, the code is defect. (Compiling on-site with cpu "native", gives working code.) Bottomline: one cannot currently compile for target westmere on a build machine. $ /usr/bin/env -i /usr/bin/clang -v -x c -march=3Dnative -fsyntax-only -o = /dev/null /dev/null 2>&1 FreeBSD clang version 14.0.5 (https://github.com/llvm/llvm-project.git llvm= org-14.0.5-0-gc12386ae247c) Target: x86_64-unknown-freebsd13.2 Thread model: posix InstalledDir: /usr/bin (in-process) "/usr/bin/clang" -cc1 -triple x86_64-unknown-freebsd13.2 -fsyntax-only -di= sable-free -clear-ast-before-backend -disable-llvm-verifier -discard-value-= names -main-file-name null -mrelocation-model static -mframe-pointer=3Dall = -ffp-contract=3Don -fno-rounding-math -mconstructor-aliases -funwind-tables= =3D2 -target-cpu westmere -target-feature -avx512pf -target-feature -tsxldt= rk -target-feature +cx16 -target-feature +sahf -target-feature -tbm -target= -feature -avx512ifma -target-feature -sha -target-feature +crc32 -target-fe= ature -fma4 -target-feature -vpclmulqdq -target-feature -prfchw -target-fea= ture -bmi2 -target-feature -cldemote -target-feature -fsgsbase -target-feat= ure -ptwrite -target-feature -amx-tile -target-feature -uintr -target-featu= re -gfni -target-feature +popcnt -target-feature -widekl -target-feature -a= es -target-feature -avx512bitalg -target-feature -movdiri -target-feature -= xsaves -target-feature -avx512er -target-feature -avxvnni -target-feature -= avx512fp16 -target-feature -avx512vnni -target-feature -amx-bf16 -target-fe= ature -avx512vpopcntdq -target-feature -pconfig -target-feature -clwb -targ= et-feature -avx512f -target-feature -xsavec -target-feature -clzero -target= -feature -pku -target-feature +mmx -target-feature -lwp -target-feature -rd= pid -target-feature -xop -target-feature -rdseed -target-feature -waitpkg -= target-feature -kl -target-feature -movdir64b -target-feature -sse4a -targe= t-feature -avx512bw -target-feature -clflushopt -target-feature -xsave -tar= get-feature -avx512vbmi2 -target-feature +64bit -target-feature -avx512vl -= target-feature -serialize -target-feature -hreset -target-feature -invpcid = -target-feature -avx512cd -target-feature -avx -target-feature -vaes -targe= t-feature -avx512bf16 -target-feature +cx8 -target-feature -fma -target-fea= ture -rtm -target-feature -bmi -target-feature -enqcmd -target-feature -rdr= nd -target-feature -mwaitx -target-feature +sse4.1 -target-feature +sse4.2 = -target-feature -avx2 -target-feature +fxsr -target-feature -wbnoinvd -targ= et-feature +sse -target-feature -lzcnt -target-feature -pclmul -target-feat= ure -prefetchwt1 -target-feature -f16c -target-feature +ssse3 -target-featu= re -sgx -target-feature -shstk -target-feature +cmov -target-feature -avx51= 2vbmi -target-feature -amx-int8 -target-feature -movbe -target-feature -avx= 512vp2intersect -target-feature -xsaveopt -target-feature -avx512dq -target= -feature +sse2 -target-feature -adx -target-feature +sse3 -mllvm -treat-sca= lable-fixed-error-as-warning -debugger-tuning=3Dgdb -v -fcoverage-compilati= on-dir=3D/home/operator -resource-dir /usr/lib/clang/14.0.5 -fdebug-compila= tion-dir=3D/home/operator -ferror-limit 19 -fgnuc-version=3D4.2.1 -faddrsig= -D__GCC_HAVE_DWARF2_CFI_ASM=3D1 -x c /dev/null clang -cc1 version 14.0.5 based upon LLVM 14.0.5 default target x86_64-unkn= own-freebsd13.2 #include "..." search starts here: #include <...> search starts here: /usr/lib/clang/14.0.5/include /usr/include End of search list. $ /usr/bin/env -i /usr/bin/clang -v -x c -march=3Dwestmere -fsyntax-only -= o /dev/null /dev/null 2>&1 FreeBSD clang version 14.0.5 (https://github.com/llvm/llvm-project.git llvm= org-14.0.5-0-gc12386ae247c) Target: x86_64-unknown-freebsd13.2 Thread model: posix InstalledDir: /usr/bin (in-process) "/usr/bin/clang" -cc1 -triple x86_64-unknown-freebsd13.2 -fsyntax-only -di=
Created attachment 240357 [details] pasting above went a bit wrong, here as attachment
Can you get a core dump and/or disassembly? Because it isn't possible to guess what kind of instruction it crashed on (it could be anything).
Sure I can make a coredump (lldb) bt * thread #1, name = 'xz', stop reason = signal SIGILL * frame #0: 0x0000206b53f99114 liblzma.so.5`lzma_stream_encoder_mt_memusage + 308 frame #1: 0x0000206b53f98d67 liblzma.so.5`___lldb_unnamed_symbol445 + 663 frame #2: 0x0000206b53f8dc70 liblzma.so.5`lzma_str_to_filters + 1440 frame #3: 0x0000206b53f906d4 liblzma.so.5`lzma_filters_update + 212 frame #4: 0x0000206b53f890d8 liblzma.so.5 frame #5: 0x00002063314013be xz`___lldb_unnamed_symbol238 + 1534 frame #6: 0x000020633140573c xz`___lldb_unnamed_symbol272 + 828 frame #7: 0x00002063313ff602 xz (lldb) disassemble [...] 0x206b53f990bd <+221>: callq 0x31360 ; symbol stub for: lzma_outq_memusage 0x206b53f990c2 <+226>: cmpq $-0x1, %rax 0x206b53f990c6 <+230>: je 0x1f10c ; <+300> 0x206b53f990c8 <+232>: imulq -0xf8(%rbp), %r15 0x206b53f990d0 <+240>: movl 0x4(%rbx), %ecx 0x206b53f990d3 <+243>: imulq $0x1d8, %rcx, %rcx ; imm = 0x1D8 0x206b53f990da <+250>: movq $-0x81f1, %rdx ; imm = 0xFFFF7E0F 0x206b53f990e1 <+257>: subq %rcx, %rdx 0x206b53f990e4 <+260>: cmpq %r15, %rdx 0x206b53f990e7 <+263>: jb 0x1f10c ; <+300> 0x206b53f990e9 <+265>: imulq -0xf8(%rbp), %r12 0x206b53f990f1 <+273>: leaq 0x81f0(%r15,%rcx), %rcx 0x206b53f990f9 <+281>: addq %r12, %rcx 0x206b53f990fc <+284>: jb 0x1f10c ; <+300> 0x206b53f990fe <+286>: addq %rax, %rcx 0x206b53f99101 <+289>: movq $-0x1, %r14 0x206b53f99108 <+296>: cmovaeq %rcx, %r14 0x206b53f9910c <+300>: movq (%r13), %rax 0x206b53f99110 <+304>: cmpq -0x30(%rbp), %rax -> 0x206b53f99114 <+308>: jne 0x1f12b ; <+331> 0x206b53f99116 <+310>: movq %r14, %rax 0x206b53f99119 <+313>: addq $0xd8, %rsp 0x206b53f99120 <+320>: popq %rbx 0x206b53f99121 <+321>: popq %r12 0x206b53f99123 <+323>: popq %r13 0x206b53f99125 <+325>: popq %r14 0x206b53f99127 <+327>: popq %r15 0x206b53f99129 <+329>: popq %rbp 0x206b53f9912a <+330>: retq 0x206b53f9912b <+331>: callq 0x30540 ; symbol stub for: __stack_chk_fail Is this suitable? (I don't get a clue of it)
Please disregard prev. message (wrong binary)
Now this looks more interesting (I don't do that every day) * thread #1, name = 'xz', stop reason = signal SIGILL * frame #0: 0x0000042592c15114 liblzma.so.5`lzma_crc64 + 276 frame #1: 0x0000042592c14d67 liblzma.so.5`lzma_check_update + 87 frame #2: 0x0000042592c09c70 liblzma.so.5`___lldb_unnamed_symbol389 + 256 frame #3: 0x0000042592c0c6d4 liblzma.so.5`___lldb_unnamed_symbol407 + 484 frame #4: 0x0000042592c050d8 liblzma.so.5`lzma_code + 424 frame #5: 0x0000041d7187a3be xz`___lldb_unnamed_symbol238 + 1534 frame #6: 0x0000041d7187e73c xz`___lldb_unnamed_symbol272 + 828 frame #7: 0x0000041d71878602 xz 0x42592c150f7 <+247>: shlq $0x4, %rsi 0x42592c150fb <+251>: xorl %eax, %eax 0x42592c150fd <+253>: movq %r8, %xmm0 0x42592c15102 <+258>: movdqa -0x199ba(%rip), %xmm4 0x42592c1510a <+266>: nopw (%rax,%rax) 0x42592c15110 <+272>: movdqa %xmm1, %xmm5 -> 0x42592c15114 <+276>: pclmulqdq $0x0, %xmm0, %xmm5 0x42592c1511a <+282>: pxor %xmm3, %xmm5 0x42592c1511e <+286>: pclmulqdq $0x11, %xmm4, %xmm1 0x42592c15124 <+292>: pxor %xmm5, %xmm1 0x42592c15128 <+296>: movdqa 0x10(%rdi), %xmm3 0x42592c1512d <+301>: addq $0x10, %rdi Googling... hmm... https://www.intel.com/content/dam/www/public/us/en/documents/white-papers/carry-less-multiplication-instruction-in-gcm-mode-paper.pdf "The Intel® PCLMULQDQ instruction is a new instruction available beginning with the all new 2010 Intel® Core™ processor family based on the 32nm Intel® microarchitecture codename Westmere." CPU: Intel(R) Core(TM) i3 CPU 540 @ 3.07GHz (3059.12-MHz K8-class CPU) Origin="GenuineIntel" Id=0x20655 Family=0x6 Model=0x25 Stepping=5 Features=0xbfebfbff<FPU,VME,DE,PSE,TSC,MSR,PAE,MCE,CX8,APIC,SEP,MTRR,PGE,MCA,CMOV,PAT,PSE36,CLFLUSH,DTS,ACPI,MMX,FXSR,SSE,SSE2,SS,HTT,TM,PBE> Features2=0x9ae3bd<SSE3,DTES64,MON,DS_CPL,VMX,EST,TM2,SSSE3,CX16,xTPR,PDCM,PCID,SSE4.1,SSE4.2,POPCNT> AMD Features=0x28100800<SYSCALL,NX,RDTSCP,LM> AMD Features2=0x1<LAHF> Structured Extended Features3=0xc000000<IBPB,STIBP> VT-x: PAT,HLT,MTF,PAUSE,EPT,UG,VPID TSC: P-state invariant, performance statistics Launch Date Q1'10 Intel® AES New Instructions No Hm. So AES is only present in i7 series, not in Clarkdale and only part of Arrandale. I knew the chip doesn't support AES, but didn't know that they mixed it up so horribly...